diff options
author | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-30 21:57:33 -0400 |
---|---|---|
committer | Lucas De Marchi <lucas.demarchi@profusion.mobi> | 2011-03-31 10:26:23 -0400 |
commit | 25985edcedea6396277003854657b5f3cb31a628 (patch) | |
tree | f026e810210a2ee7290caeb737c23cb6472b7c38 /drivers/spi/amba-pl022.c | |
parent | 6aba74f2791287ec407e0f92487a725a25908067 (diff) |
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'drivers/spi/amba-pl022.c')
-rw-r--r-- | drivers/spi/amba-pl022.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c index 5a4e0afb9ad6..5825370bad25 100644 --- a/drivers/spi/amba-pl022.c +++ b/drivers/spi/amba-pl022.c | |||
@@ -661,7 +661,7 @@ static void readwriter(struct pl022 *pl022) | |||
661 | { | 661 | { |
662 | 662 | ||
663 | /* | 663 | /* |
664 | * The FIFO depth is different inbetween primecell variants. | 664 | * The FIFO depth is different between primecell variants. |
665 | * I believe filling in too much in the FIFO might cause | 665 | * I believe filling in too much in the FIFO might cause |
666 | * errons in 8bit wide transfers on ARM variants (just 8 words | 666 | * errons in 8bit wide transfers on ARM variants (just 8 words |
667 | * FIFO, means only 8x8 = 64 bits in FIFO) at least. | 667 | * FIFO, means only 8x8 = 64 bits in FIFO) at least. |
@@ -722,7 +722,7 @@ static void readwriter(struct pl022 *pl022) | |||
722 | * This inner reader takes care of things appearing in the RX | 722 | * This inner reader takes care of things appearing in the RX |
723 | * FIFO as we're transmitting. This will happen a lot since the | 723 | * FIFO as we're transmitting. This will happen a lot since the |
724 | * clock starts running when you put things into the TX FIFO, | 724 | * clock starts running when you put things into the TX FIFO, |
725 | * and then things are continously clocked into the RX FIFO. | 725 | * and then things are continuously clocked into the RX FIFO. |
726 | */ | 726 | */ |
727 | while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE) | 727 | while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE) |
728 | && (pl022->rx < pl022->rx_end)) { | 728 | && (pl022->rx < pl022->rx_end)) { |
@@ -842,7 +842,7 @@ static void dma_callback(void *data) | |||
842 | 842 | ||
843 | unmap_free_dma_scatter(pl022); | 843 | unmap_free_dma_scatter(pl022); |
844 | 844 | ||
845 | /* Update total bytes transfered */ | 845 | /* Update total bytes transferred */ |
846 | msg->actual_length += pl022->cur_transfer->len; | 846 | msg->actual_length += pl022->cur_transfer->len; |
847 | if (pl022->cur_transfer->cs_change) | 847 | if (pl022->cur_transfer->cs_change) |
848 | pl022->cur_chip-> | 848 | pl022->cur_chip-> |
@@ -1224,7 +1224,7 @@ static irqreturn_t pl022_interrupt_handler(int irq, void *dev_id) | |||
1224 | "number of bytes on a 16bit bus?)\n", | 1224 | "number of bytes on a 16bit bus?)\n", |
1225 | (u32) (pl022->rx - pl022->rx_end)); | 1225 | (u32) (pl022->rx - pl022->rx_end)); |
1226 | } | 1226 | } |
1227 | /* Update total bytes transfered */ | 1227 | /* Update total bytes transferred */ |
1228 | msg->actual_length += pl022->cur_transfer->len; | 1228 | msg->actual_length += pl022->cur_transfer->len; |
1229 | if (pl022->cur_transfer->cs_change) | 1229 | if (pl022->cur_transfer->cs_change) |
1230 | pl022->cur_chip-> | 1230 | pl022->cur_chip-> |
@@ -1415,11 +1415,11 @@ static void do_polling_transfer(struct pl022 *pl022) | |||
1415 | SSP_CR1(pl022->virtbase)); | 1415 | SSP_CR1(pl022->virtbase)); |
1416 | 1416 | ||
1417 | dev_dbg(&pl022->adev->dev, "polling transfer ongoing ...\n"); | 1417 | dev_dbg(&pl022->adev->dev, "polling transfer ongoing ...\n"); |
1418 | /* FIXME: insert a timeout so we don't hang here indefinately */ | 1418 | /* FIXME: insert a timeout so we don't hang here indefinitely */ |
1419 | while (pl022->tx < pl022->tx_end || pl022->rx < pl022->rx_end) | 1419 | while (pl022->tx < pl022->tx_end || pl022->rx < pl022->rx_end) |
1420 | readwriter(pl022); | 1420 | readwriter(pl022); |
1421 | 1421 | ||
1422 | /* Update total byte transfered */ | 1422 | /* Update total byte transferred */ |
1423 | message->actual_length += pl022->cur_transfer->len; | 1423 | message->actual_length += pl022->cur_transfer->len; |
1424 | if (pl022->cur_transfer->cs_change) | 1424 | if (pl022->cur_transfer->cs_change) |
1425 | pl022->cur_chip->cs_control(SSP_CHIP_DESELECT); | 1425 | pl022->cur_chip->cs_control(SSP_CHIP_DESELECT); |
@@ -2129,7 +2129,7 @@ pl022_probe(struct amba_device *adev, const struct amba_id *id) | |||
2129 | "probe - problem registering spi master\n"); | 2129 | "probe - problem registering spi master\n"); |
2130 | goto err_spi_register; | 2130 | goto err_spi_register; |
2131 | } | 2131 | } |
2132 | dev_dbg(dev, "probe succeded\n"); | 2132 | dev_dbg(dev, "probe succeeded\n"); |
2133 | /* | 2133 | /* |
2134 | * Disable the silicon block pclk and any voltage domain and just | 2134 | * Disable the silicon block pclk and any voltage domain and just |
2135 | * power it up and clock it when it's needed | 2135 | * power it up and clock it when it's needed |
@@ -2184,7 +2184,7 @@ pl022_remove(struct amba_device *adev) | |||
2184 | spi_unregister_master(pl022->master); | 2184 | spi_unregister_master(pl022->master); |
2185 | spi_master_put(pl022->master); | 2185 | spi_master_put(pl022->master); |
2186 | amba_set_drvdata(adev, NULL); | 2186 | amba_set_drvdata(adev, NULL); |
2187 | dev_dbg(&adev->dev, "remove succeded\n"); | 2187 | dev_dbg(&adev->dev, "remove succeeded\n"); |
2188 | return 0; | 2188 | return 0; |
2189 | } | 2189 | } |
2190 | 2190 | ||