spi/spi-fsl-spi: Add support for Aeroflex Gaisler GRLIB cores normally running on SPARC

This adds support for the mostly register-compatible SPICTRL cores from the
GRLIB VHDL IP core library from Aeroflex Gaisler. They are normally running on
SPARC. A different entry in of_fsl_spi_match matches this core and indicates a
different hardware type that is used to set up different function pointers and
special cases.

The GRLIB core operates in cpu mode. The number of bits per word might be
limited. There might be native chipselects selected via a slave select
register. These differences to the FSL type cores, if present, are indicated by
a capabilities register. Other register and function differences exists but are
not relevant to the driver.

Acked-by: Anton Vorontsov <anton@enomsg.org>
Signed-off-by: Andreas Larsson <andreas@gaisler.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

1 files changed, 3 insertions, 1 deletions

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 3524bec5ae5b..2946ab4736f6 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -236,7 +236,7 @@ config SPI_FSL_CPM
         depends on FSL_SOC
 
 config SPI_FSL_SPI
-        bool "Freescale SPI controller"
+        bool "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
         depends on OF
         select SPI_FSL_LIB
         select SPI_FSL_CPM if FSL_SOC
@@ -244,6 +244,8 @@ config SPI_FSL_SPI
           This enables using the Freescale SPI controllers in master mode.
           MPC83xx platform uses the controller in cpu mode or CPM/QE mode.
           MPC8569 uses the controller in QE mode, MPC8610 in cpu mode.
+          This also enables using the Aeroflex Gaisler GRLIB SPI controller in
+          master mode.
 
 config SPI_FSL_ESPI
         bool "Freescale eSPI controller"