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authorPaul Mundt <lethal@linux-sh.org>2012-07-09 23:08:14 -0400
committerPaul Mundt <lethal@linux-sh.org>2012-07-09 23:08:14 -0400
commitca5481c68e9fbcea62bb3c78ae6cccf99ca8fb73 (patch)
tree977e9adb0bc0b8588b111c851e7d9230d72cd3b3 /drivers/sh
parent72c7afa10f272710028f244da65d35e571144085 (diff)
sh: pfc: Rudimentary pinctrl-backed GPIO support.
This begins the migration of the PFC core to the pinctrl subsystem. Initial support is very basic, with the bulk of the implementation simply being nopped out in such a way to allow registration with the pinctrl core to succeed. The gpio chip driver is stripped down considerably now relying purely on pinctrl API calls to manage the bulk of its operations. This provides a basis for further PFC refactoring, including decoupling pin functions from the GPIO API, establishing pin groups, and so forth. These will all be dealt with incrementally so as to introduce as few growing and migratory pains to tree-wide PFC pinmux users today. When the interfaces have been well established and in-tree users have been migrated off of the legacy interfaces it will be possible to strip down the core considerably, leading to eventual drivers/pinctrl rehoming. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/sh')
-rw-r--r--drivers/sh/pfc/Kconfig13
-rw-r--r--drivers/sh/pfc/Makefile1
-rw-r--r--drivers/sh/pfc/core.c81
-rw-r--r--drivers/sh/pfc/gpio.c102
-rw-r--r--drivers/sh/pfc/pinctrl.c371
5 files changed, 437 insertions, 131 deletions
diff --git a/drivers/sh/pfc/Kconfig b/drivers/sh/pfc/Kconfig
index 95b04f4edb88..b743aaa543f8 100644
--- a/drivers/sh/pfc/Kconfig
+++ b/drivers/sh/pfc/Kconfig
@@ -4,8 +4,21 @@ config SH_PFC
4 # XXX move off the gpio dependency 4 # XXX move off the gpio dependency
5 depends on GENERIC_GPIO 5 depends on GENERIC_GPIO
6 select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB 6 select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
7 select PINCTRL_SH_PFC
7 def_bool y 8 def_bool y
8 9
10#
11# Placeholder for now, rehome to drivers/pinctrl once the PFC APIs
12# have settled.
13#
14config PINCTRL_SH_PFC
15 tristate "SuperH PFC pin controller driver"
16 depends on SH_PFC
17 select PINCTRL
18 select PINMUX
19 select PINCONF
20 select GENERIC_PINCONF
21
9config GPIO_SH_PFC 22config GPIO_SH_PFC
10 tristate "SuperH PFC GPIO support" 23 tristate "SuperH PFC GPIO support"
11 depends on SH_PFC && GPIOLIB 24 depends on SH_PFC && GPIOLIB
diff --git a/drivers/sh/pfc/Makefile b/drivers/sh/pfc/Makefile
index d81707744b27..7916027cce37 100644
--- a/drivers/sh/pfc/Makefile
+++ b/drivers/sh/pfc/Makefile
@@ -1,2 +1,3 @@
1obj-y += core.o 1obj-y += core.o
2obj-$(CONFIG_PINCTRL_SH_PFC) += pinctrl.o
2obj-$(CONFIG_GPIO_SH_PFC) += gpio.o 3obj-$(CONFIG_GPIO_SH_PFC) += gpio.o
diff --git a/drivers/sh/pfc/core.c b/drivers/sh/pfc/core.c
index ce4579ebd602..02e9f62e2b28 100644
--- a/drivers/sh/pfc/core.c
+++ b/drivers/sh/pfc/core.c
@@ -19,6 +19,7 @@
19#include <linux/bitops.h> 19#include <linux/bitops.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/ioport.h> 21#include <linux/ioport.h>
22#include <linux/pinctrl/machine.h>
22 23
23static struct sh_pfc *sh_pfc __read_mostly; 24static struct sh_pfc *sh_pfc __read_mostly;
24 25
@@ -501,49 +502,6 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
501} 502}
502EXPORT_SYMBOL_GPL(sh_pfc_config_gpio); 503EXPORT_SYMBOL_GPL(sh_pfc_config_gpio);
503 504
504int sh_pfc_set_direction(struct sh_pfc *pfc, unsigned gpio,
505 int new_pinmux_type)
506{
507 int pinmux_type;
508 int ret = -EINVAL;
509
510 if (!pfc)
511 goto err_out;
512
513 pinmux_type = pfc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
514
515 switch (pinmux_type) {
516 case PINMUX_TYPE_GPIO:
517 break;
518 case PINMUX_TYPE_OUTPUT:
519 case PINMUX_TYPE_INPUT:
520 case PINMUX_TYPE_INPUT_PULLUP:
521 case PINMUX_TYPE_INPUT_PULLDOWN:
522 sh_pfc_config_gpio(pfc, gpio, pinmux_type, GPIO_CFG_FREE);
523 break;
524 default:
525 goto err_out;
526 }
527
528 if (sh_pfc_config_gpio(pfc, gpio,
529 new_pinmux_type,
530 GPIO_CFG_DRYRUN) != 0)
531 goto err_out;
532
533 if (sh_pfc_config_gpio(pfc, gpio,
534 new_pinmux_type,
535 GPIO_CFG_REQ) != 0)
536 BUG();
537
538 pfc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
539 pfc->gpios[gpio].flags |= new_pinmux_type;
540
541 ret = 0;
542 err_out:
543 return ret;
544}
545EXPORT_SYMBOL_GPL(sh_pfc_set_direction);
546
547int register_sh_pfc(struct sh_pfc *pfc) 505int register_sh_pfc(struct sh_pfc *pfc)
548{ 506{
549 int (*initroutine)(struct sh_pfc *) = NULL; 507 int (*initroutine)(struct sh_pfc *) = NULL;
@@ -563,16 +521,49 @@ int register_sh_pfc(struct sh_pfc *pfc)
563 521
564 spin_lock_init(&pfc->lock); 522 spin_lock_init(&pfc->lock);
565 523
524 pinctrl_provide_dummies();
566 setup_data_regs(pfc); 525 setup_data_regs(pfc);
567 526
568 sh_pfc = pfc; 527 sh_pfc = pfc;
569 pr_info("%s support registered\n", pfc->name);
570 528
529 /*
530 * Initialize pinctrl bindings first
531 */
532 initroutine = symbol_request(sh_pfc_register_pinctrl);
533 if (initroutine) {
534 ret = (*initroutine)(pfc);
535 symbol_put_addr(initroutine);
536
537 if (unlikely(ret != 0))
538 goto err;
539 }
540
541 /*
542 * Then the GPIO chip
543 */
571 initroutine = symbol_request(sh_pfc_register_gpiochip); 544 initroutine = symbol_request(sh_pfc_register_gpiochip);
572 if (initroutine) { 545 if (initroutine) {
573 (*initroutine)(pfc); 546 ret = (*initroutine)(pfc);
574 symbol_put_addr(initroutine); 547 symbol_put_addr(initroutine);
548
549 /*
550 * If the GPIO chip fails to come up we still leave the
551 * PFC state as it is, given that there are already
552 * extant users of it that have succeeded by this point.
553 */
554 if (unlikely(ret != 0)) {
555 pr_notice("failed to init GPIO chip, ignoring...\n");
556 ret = 0;
557 }
575 } 558 }
576 559
560 pr_info("%s support registered\n", pfc->name);
561
577 return 0; 562 return 0;
563
564err:
565 pfc_iounmap(pfc);
566 sh_pfc = NULL;
567
568 return ret;
578} 569}
diff --git a/drivers/sh/pfc/gpio.c b/drivers/sh/pfc/gpio.c
index d74e5a96024b..f37f0c6d89b3 100644
--- a/drivers/sh/pfc/gpio.c
+++ b/drivers/sh/pfc/gpio.c
@@ -16,6 +16,7 @@
16#include <linux/spinlock.h> 16#include <linux/spinlock.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/pinctrl/consumer.h>
19 20
20struct sh_pfc_chip { 21struct sh_pfc_chip {
21 struct sh_pfc *pfc; 22 struct sh_pfc *pfc;
@@ -34,80 +35,12 @@ static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
34 35
35static int sh_gpio_request(struct gpio_chip *gc, unsigned offset) 36static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
36{ 37{
37 struct sh_pfc *pfc = gpio_to_pfc(gc); 38 return pinctrl_request_gpio(offset);
38 struct pinmux_data_reg *dummy;
39 unsigned long flags;
40 int i, ret, pinmux_type;
41
42 ret = -EINVAL;
43
44 if (!pfc)
45 goto err_out;
46
47 spin_lock_irqsave(&pfc->lock, flags);
48
49 if ((pfc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
50 goto err_unlock;
51
52 /* setup pin function here if no data is associated with pin */
53
54 if (sh_pfc_get_data_reg(pfc, offset, &dummy, &i) != 0)
55 pinmux_type = PINMUX_TYPE_FUNCTION;
56 else
57 pinmux_type = PINMUX_TYPE_GPIO;
58
59 if (pinmux_type == PINMUX_TYPE_FUNCTION) {
60 if (sh_pfc_config_gpio(pfc, offset,
61 pinmux_type,
62 GPIO_CFG_DRYRUN) != 0)
63 goto err_unlock;
64
65 if (sh_pfc_config_gpio(pfc, offset,
66 pinmux_type,
67 GPIO_CFG_REQ) != 0)
68 BUG();
69 }
70
71 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
72 pfc->gpios[offset].flags |= pinmux_type;
73
74 ret = 0;
75 err_unlock:
76 spin_unlock_irqrestore(&pfc->lock, flags);
77 err_out:
78 return ret;
79} 39}
80 40
81static void sh_gpio_free(struct gpio_chip *gc, unsigned offset) 41static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
82{ 42{
83 struct sh_pfc *pfc = gpio_to_pfc(gc); 43 pinctrl_free_gpio(offset);
84 unsigned long flags;
85 int pinmux_type;
86
87 if (!pfc)
88 return;
89
90 spin_lock_irqsave(&pfc->lock, flags);
91
92 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
93 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
94 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
95 pfc->gpios[offset].flags |= PINMUX_TYPE_NONE;
96
97 spin_unlock_irqrestore(&pfc->lock, flags);
98}
99
100static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
101{
102 struct sh_pfc *pfc = gpio_to_pfc(gc);
103 unsigned long flags;
104 int ret;
105
106 spin_lock_irqsave(&pfc->lock, flags);
107 ret = sh_pfc_set_direction(pfc, offset, PINMUX_TYPE_INPUT);
108 spin_unlock_irqrestore(&pfc->lock, flags);
109
110 return ret;
111} 44}
112 45
113static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value) 46static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
@@ -121,22 +54,6 @@ static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
121 sh_pfc_write_bit(dr, bit, value); 54 sh_pfc_write_bit(dr, bit, value);
122} 55}
123 56
124static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
125 int value)
126{
127 struct sh_pfc *pfc = gpio_to_pfc(gc);
128 unsigned long flags;
129 int ret;
130
131 sh_gpio_set_value(pfc, offset, value);
132
133 spin_lock_irqsave(&pfc->lock, flags);
134 ret = sh_pfc_set_direction(pfc, offset, PINMUX_TYPE_OUTPUT);
135 spin_unlock_irqrestore(&pfc->lock, flags);
136
137 return ret;
138}
139
140static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio) 57static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
141{ 58{
142 struct pinmux_data_reg *dr = NULL; 59 struct pinmux_data_reg *dr = NULL;
@@ -148,6 +65,19 @@ static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
148 return sh_pfc_read_bit(dr, bit); 65 return sh_pfc_read_bit(dr, bit);
149} 66}
150 67
68static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
69{
70 return pinctrl_gpio_direction_input(offset);
71}
72
73static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
74 int value)
75{
76 sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
77
78 return pinctrl_gpio_direction_output(offset);
79}
80
151static int sh_gpio_get(struct gpio_chip *gc, unsigned offset) 81static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
152{ 82{
153 return sh_gpio_get_value(gpio_to_pfc(gc), offset); 83 return sh_gpio_get_value(gpio_to_pfc(gc), offset);
diff --git a/drivers/sh/pfc/pinctrl.c b/drivers/sh/pfc/pinctrl.c
new file mode 100644
index 000000000000..6008328594ff
--- /dev/null
+++ b/drivers/sh/pfc/pinctrl.c
@@ -0,0 +1,371 @@
1/*
2 * SuperH Pin Function Controller pinmux support.
3 *
4 * Copyright (C) 2012 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/sh_pfc.h>
15#include <linux/err.h>
16#include <linux/slab.h>
17#include <linux/platform_device.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/pinctrl/pinctrl.h>
20#include <linux/pinctrl/pinconf.h>
21#include <linux/pinctrl/pinmux.h>
22#include <linux/pinctrl/pinconf-generic.h>
23
24struct sh_pfc_pinctrl {
25 struct pinctrl_dev *pctl;
26 struct sh_pfc *pfc;
27
28 struct pinctrl_pin_desc *pads;
29 unsigned int nr_pads;
30};
31
32static struct sh_pfc_pinctrl *sh_pfc_pmx;
33
34/*
35 * No group support yet
36 */
37static int sh_pfc_get_noop_count(struct pinctrl_dev *pctldev)
38{
39 return 0;
40}
41
42static const char *sh_pfc_get_noop_name(struct pinctrl_dev *pctldev,
43 unsigned selector)
44{
45 return NULL;
46}
47
48static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
49 const unsigned **pins, unsigned *num_pins)
50{
51 return -ENOTSUPP;
52}
53
54static struct pinctrl_ops sh_pfc_pinctrl_ops = {
55 .get_groups_count = sh_pfc_get_noop_count,
56 .get_group_name = sh_pfc_get_noop_name,
57 .get_group_pins = sh_pfc_get_group_pins,
58};
59
60
61/*
62 * No function support yet
63 */
64static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
65 const char * const **groups,
66 unsigned * const num_groups)
67{
68 return 0;
69}
70
71static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
72 unsigned group)
73{
74 return 0;
75}
76
77static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
78 unsigned group)
79{
80}
81
82static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
83 struct pinctrl_gpio_range *range,
84 unsigned offset)
85{
86 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
87 struct sh_pfc *pfc = pmx->pfc;
88 struct pinmux_data_reg *dummy;
89 unsigned long flags;
90 int i, ret, pinmux_type;
91
92 ret = -EINVAL;
93
94 spin_lock_irqsave(&pfc->lock, flags);
95
96 if ((pfc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
97 goto err;
98
99 /* setup pin function here if no data is associated with pin */
100 if (sh_pfc_get_data_reg(pfc, offset, &dummy, &i) != 0) {
101 pinmux_type = PINMUX_TYPE_FUNCTION;
102
103 if (sh_pfc_config_gpio(pfc, offset,
104 pinmux_type,
105 GPIO_CFG_DRYRUN) != 0)
106 goto err;
107
108 if (sh_pfc_config_gpio(pfc, offset,
109 pinmux_type,
110 GPIO_CFG_REQ) != 0)
111 goto err;
112 } else
113 pinmux_type = PINMUX_TYPE_GPIO;
114
115 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
116 pfc->gpios[offset].flags |= pinmux_type;
117
118 ret = 0;
119
120err:
121 spin_unlock_irqrestore(&pfc->lock, flags);
122
123 return ret;
124}
125
126static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
127 struct pinctrl_gpio_range *range,
128 unsigned offset)
129{
130 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
131 struct sh_pfc *pfc = pmx->pfc;
132 unsigned long flags;
133 int pinmux_type;
134
135 spin_lock_irqsave(&pfc->lock, flags);
136
137 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
138
139 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
140
141 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
142 pfc->gpios[offset].flags |= PINMUX_TYPE_NONE;
143
144 spin_unlock_irqrestore(&pfc->lock, flags);
145}
146
147static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
148 struct pinctrl_gpio_range *range,
149 unsigned offset, bool input)
150{
151 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
152 struct sh_pfc *pfc = pmx->pfc;
153 unsigned long flags;
154 int pinmux_type, new_pinmux_type;
155 int ret = -EINVAL;
156
157 new_pinmux_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
158
159 spin_lock_irqsave(&pfc->lock, flags);
160
161 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
162
163 switch (pinmux_type) {
164 case PINMUX_TYPE_GPIO:
165 break;
166 case PINMUX_TYPE_OUTPUT:
167 case PINMUX_TYPE_INPUT:
168 case PINMUX_TYPE_INPUT_PULLUP:
169 case PINMUX_TYPE_INPUT_PULLDOWN:
170 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
171 break;
172 default:
173 goto err;
174 }
175
176 if (sh_pfc_config_gpio(pfc, offset,
177 new_pinmux_type,
178 GPIO_CFG_DRYRUN) != 0)
179 goto err;
180
181 if (sh_pfc_config_gpio(pfc, offset,
182 new_pinmux_type,
183 GPIO_CFG_REQ) != 0)
184 BUG();
185
186 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
187 pfc->gpios[offset].flags |= new_pinmux_type;
188
189 ret = 0;
190
191err:
192 spin_unlock_irqrestore(&pfc->lock, flags);
193
194 return ret;
195}
196
197static struct pinmux_ops sh_pfc_pinmux_ops = {
198 .get_functions_count = sh_pfc_get_noop_count,
199 .get_function_name = sh_pfc_get_noop_name,
200 .get_function_groups = sh_pfc_get_function_groups,
201 .enable = sh_pfc_noop_enable,
202 .disable = sh_pfc_noop_disable,
203 .gpio_request_enable = sh_pfc_gpio_request_enable,
204 .gpio_disable_free = sh_pfc_gpio_disable_free,
205 .gpio_set_direction = sh_pfc_gpio_set_direction,
206};
207
208static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
209 unsigned long *config)
210{
211 return -ENOTSUPP;
212}
213
214static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
215 unsigned long config)
216{
217 return -EINVAL;
218}
219
220static struct pinconf_ops sh_pfc_pinconf_ops = {
221 .is_generic = true,
222 .pin_config_get = sh_pfc_pinconf_get,
223 .pin_config_set = sh_pfc_pinconf_set,
224};
225
226static struct pinctrl_gpio_range sh_pfc_gpio_range = {
227 .name = KBUILD_MODNAME,
228 .id = 0,
229};
230
231static struct pinctrl_desc sh_pfc_pinctrl_desc = {
232 .name = KBUILD_MODNAME,
233 .owner = THIS_MODULE,
234 .pctlops = &sh_pfc_pinctrl_ops,
235 .pmxops = &sh_pfc_pinmux_ops,
236 .confops = &sh_pfc_pinconf_ops,
237};
238
239int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
240{
241 sh_pfc_pmx = kmalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
242 if (unlikely(!sh_pfc_pmx))
243 return -ENOMEM;
244
245 sh_pfc_pmx->pfc = pfc;
246
247 return 0;
248}
249
250/* pinmux ranges -> pinctrl pin descs */
251static int __devinit sh_pfc_map_gpios(struct sh_pfc *pfc,
252 struct sh_pfc_pinctrl *pmx)
253{
254 int i;
255
256 pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1;
257
258 pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
259 GFP_KERNEL);
260 if (unlikely(!pmx->pads)) {
261 pmx->nr_pads = 0;
262 return -ENOMEM;
263 }
264
265 /*
266 * We don't necessarily have a 1:1 mapping between pin and linux
267 * GPIO number, as the latter maps to the associated enum_id.
268 * Care needs to be taken to translate back to pin space when
269 * dealing with any pin configurations.
270 */
271 for (i = 0; i < pmx->nr_pads; i++) {
272 struct pinctrl_pin_desc *pin = pmx->pads + i;
273 struct pinmux_gpio *gpio = pfc->gpios + i;
274
275 pin->number = pfc->first_gpio + i;
276 pin->name = gpio->name;
277 }
278
279 sh_pfc_pinctrl_desc.pins = pmx->pads;
280 sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
281
282 return 0;
283}
284
285static int __devinit sh_pfc_pinctrl_probe(struct platform_device *pdev)
286{
287 struct sh_pfc *pfc;
288 int ret;
289
290 if (unlikely(!sh_pfc_pmx))
291 return -ENODEV;
292
293 pfc = sh_pfc_pmx->pfc;
294
295 ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx);
296 if (unlikely(ret != 0))
297 return ret;
298
299 sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
300 sh_pfc_pmx);
301 if (IS_ERR(sh_pfc_pmx->pctl)) {
302 ret = PTR_ERR(sh_pfc_pmx->pctl);
303 goto out;
304 }
305
306 sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1;
307 sh_pfc_gpio_range.base = pfc->first_gpio;
308 sh_pfc_gpio_range.pin_base = pfc->first_gpio;
309
310 pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);
311
312 platform_set_drvdata(pdev, sh_pfc_pmx);
313
314 return 0;
315
316out:
317 kfree(sh_pfc_pmx->pads);
318 kfree(sh_pfc_pmx);
319 return ret;
320}
321
322static int __devexit sh_pfc_pinctrl_remove(struct platform_device *pdev)
323{
324 struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev);
325
326 pinctrl_remove_gpio_range(pmx->pctl, &sh_pfc_gpio_range);
327 pinctrl_unregister(pmx->pctl);
328
329 platform_set_drvdata(pdev, NULL);
330
331 kfree(sh_pfc_pmx->pads);
332 kfree(sh_pfc_pmx);
333
334 return 0;
335}
336
337static struct platform_driver sh_pfc_pinctrl_driver = {
338 .probe = sh_pfc_pinctrl_probe,
339 .remove = __devexit_p(sh_pfc_pinctrl_remove),
340 .driver = {
341 .name = KBUILD_MODNAME,
342 .owner = THIS_MODULE,
343 },
344};
345
346static struct platform_device sh_pfc_pinctrl_device = {
347 .name = KBUILD_MODNAME,
348 .id = -1,
349};
350
351static int __init sh_pfc_pinctrl_init(void)
352{
353 int rc;
354
355 rc = platform_driver_register(&sh_pfc_pinctrl_driver);
356 if (likely(!rc)) {
357 rc = platform_device_register(&sh_pfc_pinctrl_device);
358 if (unlikely(rc))
359 platform_driver_unregister(&sh_pfc_pinctrl_driver);
360 }
361
362 return rc;
363}
364
365static void __exit sh_pfc_pinctrl_exit(void)
366{
367 platform_driver_unregister(&sh_pfc_pinctrl_driver);
368}
369
370subsys_initcall(sh_pfc_pinctrl_init);
371module_exit(sh_pfc_pinctrl_exit);