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authorOlof Johansson <olof@lixom.net>2013-01-29 11:54:38 -0500
committerOlof Johansson <olof@lixom.net>2013-01-29 11:56:25 -0500
commit7e5fc7793179ea5ef12f4287512b142813c6ac7c (patch)
treec787ede9714ffcc6f63076e3d7e6113953c70bc0 /drivers/sh
parent949db153b6466c6f7cad5a427ecea94985927311 (diff)
parentc3323806a67c0c656e27956b7340e37ba6c6968b (diff)
Merge branch 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/sh-pinmux
From Simon Horman. Based on agreement between me, Paul Mundt, Linus Walleij and Simon, we're mergning this large branch of pinctrl conversion through arm-soc, even though it contains the corresponding conversions for arch/sh. Main reason for this is tight dependencies (that will now mostly be broken) between the arch/sh and mach-shmobile implementations. There will be more of this in 3.10 to do device-tree bindings, but this is the initial conversion. * 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (80 commits) sh-pfc: Move sh_pfc.h from include/linux/ to driver directory sh-pfc: Remove pinmux_info definition sh: Remove unused sh_pfc_register_info() function sh: shx3: pinmux: Use driver-provided pinmux info sh: sh7786: pinmux: Use driver-provided pinmux info sh: sh7785: pinmux: Use driver-provided pinmux info sh: sh7757: pinmux: Use driver-provided pinmux info sh: sh7734: pinmux: Use driver-provided pinmux info sh: sh7724: pinmux: Use driver-provided pinmux info sh: sh7723: pinmux: Use driver-provided pinmux info sh: sh7722: pinmux: Use driver-provided pinmux info sh: sh7720: pinmux: Use driver-provided pinmux info sh: sh7269: pinmux: Use driver-provided pinmux info sh: sh7264: pinmux: Use driver-provided pinmux info sh: sh7203: pinmux: Use driver-provided pinmux info ARM: shmobile: sh73a0: Use driver-provided pinmux info ARM: shmobile: sh7372: Use driver-provided pinmux info ARM: shmobile: r8a7779: Use driver-provided pinmux info ARM: shmobile: r8a7740: Use driver-provided pinmux info sh-pfc: Add shx3 pinmux support ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/sh')
-rw-r--r--drivers/sh/Kconfig1
-rw-r--r--drivers/sh/Makefile1
-rw-r--r--drivers/sh/pfc/Kconfig26
-rw-r--r--drivers/sh/pfc/Makefile3
-rw-r--r--drivers/sh/pfc/core.c572
-rw-r--r--drivers/sh/pfc/gpio.c240
-rw-r--r--drivers/sh/pfc/pinctrl.c527
7 files changed, 0 insertions, 1370 deletions
diff --git a/drivers/sh/Kconfig b/drivers/sh/Kconfig
index d860ef743568..f168a6159961 100644
--- a/drivers/sh/Kconfig
+++ b/drivers/sh/Kconfig
@@ -1,6 +1,5 @@
1menu "SuperH / SH-Mobile Driver Options" 1menu "SuperH / SH-Mobile Driver Options"
2 2
3source "drivers/sh/intc/Kconfig" 3source "drivers/sh/intc/Kconfig"
4source "drivers/sh/pfc/Kconfig"
5 4
6endmenu 5endmenu
diff --git a/drivers/sh/Makefile b/drivers/sh/Makefile
index e57895b1a425..fc67f564f02c 100644
--- a/drivers/sh/Makefile
+++ b/drivers/sh/Makefile
@@ -5,7 +5,6 @@ obj-y := intc/
5 5
6obj-$(CONFIG_HAVE_CLK) += clk/ 6obj-$(CONFIG_HAVE_CLK) += clk/
7obj-$(CONFIG_MAPLE) += maple/ 7obj-$(CONFIG_MAPLE) += maple/
8obj-$(CONFIG_SH_PFC) += pfc/
9obj-$(CONFIG_SUPERHYWAY) += superhyway/ 8obj-$(CONFIG_SUPERHYWAY) += superhyway/
10 9
11obj-y += pm_runtime.o 10obj-y += pm_runtime.o
diff --git a/drivers/sh/pfc/Kconfig b/drivers/sh/pfc/Kconfig
deleted file mode 100644
index 804f9ad1bf4a..000000000000
--- a/drivers/sh/pfc/Kconfig
+++ /dev/null
@@ -1,26 +0,0 @@
1comment "Pin function controller options"
2
3config SH_PFC
4 # XXX move off the gpio dependency
5 depends on GENERIC_GPIO
6 select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
7 select PINCTRL_SH_PFC
8 def_bool y
9
10#
11# Placeholder for now, rehome to drivers/pinctrl once the PFC APIs
12# have settled.
13#
14config PINCTRL_SH_PFC
15 tristate "SuperH PFC pin controller driver"
16 depends on SH_PFC
17 select PINCTRL
18 select PINMUX
19 select PINCONF
20
21config GPIO_SH_PFC
22 tristate "SuperH PFC GPIO support"
23 depends on SH_PFC && GPIOLIB
24 help
25 This enables support for GPIOs within the SoC's pin function
26 controller.
diff --git a/drivers/sh/pfc/Makefile b/drivers/sh/pfc/Makefile
deleted file mode 100644
index 7916027cce37..000000000000
--- a/drivers/sh/pfc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1obj-y += core.o
2obj-$(CONFIG_PINCTRL_SH_PFC) += pinctrl.o
3obj-$(CONFIG_GPIO_SH_PFC) += gpio.o
diff --git a/drivers/sh/pfc/core.c b/drivers/sh/pfc/core.c
deleted file mode 100644
index 68169373c98b..000000000000
--- a/drivers/sh/pfc/core.c
+++ /dev/null
@@ -1,572 +0,0 @@
1/*
2 * SuperH Pin Function Controller support.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt
12
13#include <linux/errno.h>
14#include <linux/kernel.h>
15#include <linux/sh_pfc.h>
16#include <linux/module.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/bitops.h>
20#include <linux/slab.h>
21#include <linux/ioport.h>
22#include <linux/pinctrl/machine.h>
23
24static struct sh_pfc *sh_pfc __read_mostly;
25
26static inline bool sh_pfc_initialized(void)
27{
28 return !!sh_pfc;
29}
30
31static void pfc_iounmap(struct sh_pfc *pfc)
32{
33 int k;
34
35 for (k = 0; k < pfc->num_resources; k++)
36 if (pfc->window[k].virt)
37 iounmap(pfc->window[k].virt);
38
39 kfree(pfc->window);
40 pfc->window = NULL;
41}
42
43static int pfc_ioremap(struct sh_pfc *pfc)
44{
45 struct resource *res;
46 int k;
47
48 if (!pfc->num_resources)
49 return 0;
50
51 pfc->window = kzalloc(pfc->num_resources * sizeof(*pfc->window),
52 GFP_NOWAIT);
53 if (!pfc->window)
54 goto err1;
55
56 for (k = 0; k < pfc->num_resources; k++) {
57 res = pfc->resource + k;
58 WARN_ON(resource_type(res) != IORESOURCE_MEM);
59 pfc->window[k].phys = res->start;
60 pfc->window[k].size = resource_size(res);
61 pfc->window[k].virt = ioremap_nocache(res->start,
62 resource_size(res));
63 if (!pfc->window[k].virt)
64 goto err2;
65 }
66
67 return 0;
68
69err2:
70 pfc_iounmap(pfc);
71err1:
72 return -1;
73}
74
75static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
76 unsigned long address)
77{
78 struct pfc_window *window;
79 int k;
80
81 /* scan through physical windows and convert address */
82 for (k = 0; k < pfc->num_resources; k++) {
83 window = pfc->window + k;
84
85 if (address < window->phys)
86 continue;
87
88 if (address >= (window->phys + window->size))
89 continue;
90
91 return window->virt + (address - window->phys);
92 }
93
94 /* no windows defined, register must be 1:1 mapped virt:phys */
95 return (void __iomem *)address;
96}
97
98static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
99{
100 if (enum_id < r->begin)
101 return 0;
102
103 if (enum_id > r->end)
104 return 0;
105
106 return 1;
107}
108
109static unsigned long gpio_read_raw_reg(void __iomem *mapped_reg,
110 unsigned long reg_width)
111{
112 switch (reg_width) {
113 case 8:
114 return ioread8(mapped_reg);
115 case 16:
116 return ioread16(mapped_reg);
117 case 32:
118 return ioread32(mapped_reg);
119 }
120
121 BUG();
122 return 0;
123}
124
125static void gpio_write_raw_reg(void __iomem *mapped_reg,
126 unsigned long reg_width,
127 unsigned long data)
128{
129 switch (reg_width) {
130 case 8:
131 iowrite8(data, mapped_reg);
132 return;
133 case 16:
134 iowrite16(data, mapped_reg);
135 return;
136 case 32:
137 iowrite32(data, mapped_reg);
138 return;
139 }
140
141 BUG();
142}
143
144int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
145{
146 unsigned long pos;
147
148 pos = dr->reg_width - (in_pos + 1);
149
150 pr_debug("read_bit: addr = %lx, pos = %ld, "
151 "r_width = %ld\n", dr->reg, pos, dr->reg_width);
152
153 return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
154}
155EXPORT_SYMBOL_GPL(sh_pfc_read_bit);
156
157void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
158 unsigned long value)
159{
160 unsigned long pos;
161
162 pos = dr->reg_width - (in_pos + 1);
163
164 pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
165 "r_width = %ld\n",
166 dr->reg, !!value, pos, dr->reg_width);
167
168 if (value)
169 set_bit(pos, &dr->reg_shadow);
170 else
171 clear_bit(pos, &dr->reg_shadow);
172
173 gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
174}
175EXPORT_SYMBOL_GPL(sh_pfc_write_bit);
176
177static void config_reg_helper(struct sh_pfc *pfc,
178 struct pinmux_cfg_reg *crp,
179 unsigned long in_pos,
180 void __iomem **mapped_regp,
181 unsigned long *maskp,
182 unsigned long *posp)
183{
184 int k;
185
186 *mapped_regp = pfc_phys_to_virt(pfc, crp->reg);
187
188 if (crp->field_width) {
189 *maskp = (1 << crp->field_width) - 1;
190 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
191 } else {
192 *maskp = (1 << crp->var_field_width[in_pos]) - 1;
193 *posp = crp->reg_width;
194 for (k = 0; k <= in_pos; k++)
195 *posp -= crp->var_field_width[k];
196 }
197}
198
199static int read_config_reg(struct sh_pfc *pfc,
200 struct pinmux_cfg_reg *crp,
201 unsigned long field)
202{
203 void __iomem *mapped_reg;
204 unsigned long mask, pos;
205
206 config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
207
208 pr_debug("read_reg: addr = %lx, field = %ld, "
209 "r_width = %ld, f_width = %ld\n",
210 crp->reg, field, crp->reg_width, crp->field_width);
211
212 return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
213}
214
215static void write_config_reg(struct sh_pfc *pfc,
216 struct pinmux_cfg_reg *crp,
217 unsigned long field, unsigned long value)
218{
219 void __iomem *mapped_reg;
220 unsigned long mask, pos, data;
221
222 config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
223
224 pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
225 "r_width = %ld, f_width = %ld\n",
226 crp->reg, value, field, crp->reg_width, crp->field_width);
227
228 mask = ~(mask << pos);
229 value = value << pos;
230
231 data = gpio_read_raw_reg(mapped_reg, crp->reg_width);
232 data &= mask;
233 data |= value;
234
235 if (pfc->unlock_reg)
236 gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->unlock_reg),
237 32, ~data);
238
239 gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
240}
241
242static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
243{
244 struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
245 struct pinmux_data_reg *data_reg;
246 int k, n;
247
248 if (!enum_in_range(gpiop->enum_id, &pfc->data))
249 return -1;
250
251 k = 0;
252 while (1) {
253 data_reg = pfc->data_regs + k;
254
255 if (!data_reg->reg_width)
256 break;
257
258 data_reg->mapped_reg = pfc_phys_to_virt(pfc, data_reg->reg);
259
260 for (n = 0; n < data_reg->reg_width; n++) {
261 if (data_reg->enum_ids[n] == gpiop->enum_id) {
262 gpiop->flags &= ~PINMUX_FLAG_DREG;
263 gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
264 gpiop->flags &= ~PINMUX_FLAG_DBIT;
265 gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
266 return 0;
267 }
268 }
269 k++;
270 }
271
272 BUG();
273
274 return -1;
275}
276
277static void setup_data_regs(struct sh_pfc *pfc)
278{
279 struct pinmux_data_reg *drp;
280 int k;
281
282 for (k = pfc->first_gpio; k <= pfc->last_gpio; k++)
283 setup_data_reg(pfc, k);
284
285 k = 0;
286 while (1) {
287 drp = pfc->data_regs + k;
288
289 if (!drp->reg_width)
290 break;
291
292 drp->reg_shadow = gpio_read_raw_reg(drp->mapped_reg,
293 drp->reg_width);
294 k++;
295 }
296}
297
298int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
299 struct pinmux_data_reg **drp, int *bitp)
300{
301 struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
302 int k, n;
303
304 if (!enum_in_range(gpiop->enum_id, &pfc->data))
305 return -1;
306
307 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
308 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
309 *drp = pfc->data_regs + k;
310 *bitp = n;
311 return 0;
312}
313EXPORT_SYMBOL_GPL(sh_pfc_get_data_reg);
314
315static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
316 struct pinmux_cfg_reg **crp,
317 int *fieldp, int *valuep,
318 unsigned long **cntp)
319{
320 struct pinmux_cfg_reg *config_reg;
321 unsigned long r_width, f_width, curr_width, ncomb;
322 int k, m, n, pos, bit_pos;
323
324 k = 0;
325 while (1) {
326 config_reg = pfc->cfg_regs + k;
327
328 r_width = config_reg->reg_width;
329 f_width = config_reg->field_width;
330
331 if (!r_width)
332 break;
333
334 pos = 0;
335 m = 0;
336 for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
337 if (f_width)
338 curr_width = f_width;
339 else
340 curr_width = config_reg->var_field_width[m];
341
342 ncomb = 1 << curr_width;
343 for (n = 0; n < ncomb; n++) {
344 if (config_reg->enum_ids[pos + n] == enum_id) {
345 *crp = config_reg;
346 *fieldp = m;
347 *valuep = n;
348 *cntp = &config_reg->cnt[m];
349 return 0;
350 }
351 }
352 pos += ncomb;
353 m++;
354 }
355 k++;
356 }
357
358 return -1;
359}
360
361int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
362 pinmux_enum_t *enum_idp)
363{
364 pinmux_enum_t enum_id = pfc->gpios[gpio].enum_id;
365 pinmux_enum_t *data = pfc->gpio_data;
366 int k;
367
368 if (!enum_in_range(enum_id, &pfc->data)) {
369 if (!enum_in_range(enum_id, &pfc->mark)) {
370 pr_err("non data/mark enum_id for gpio %d\n", gpio);
371 return -1;
372 }
373 }
374
375 if (pos) {
376 *enum_idp = data[pos + 1];
377 return pos + 1;
378 }
379
380 for (k = 0; k < pfc->gpio_data_size; k++) {
381 if (data[k] == enum_id) {
382 *enum_idp = data[k + 1];
383 return k + 1;
384 }
385 }
386
387 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
388 return -1;
389}
390EXPORT_SYMBOL_GPL(sh_pfc_gpio_to_enum);
391
392int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
393 int cfg_mode)
394{
395 struct pinmux_cfg_reg *cr = NULL;
396 pinmux_enum_t enum_id;
397 struct pinmux_range *range;
398 int in_range, pos, field, value;
399 unsigned long *cntp;
400
401 switch (pinmux_type) {
402
403 case PINMUX_TYPE_FUNCTION:
404 range = NULL;
405 break;
406
407 case PINMUX_TYPE_OUTPUT:
408 range = &pfc->output;
409 break;
410
411 case PINMUX_TYPE_INPUT:
412 range = &pfc->input;
413 break;
414
415 case PINMUX_TYPE_INPUT_PULLUP:
416 range = &pfc->input_pu;
417 break;
418
419 case PINMUX_TYPE_INPUT_PULLDOWN:
420 range = &pfc->input_pd;
421 break;
422
423 default:
424 goto out_err;
425 }
426
427 pos = 0;
428 enum_id = 0;
429 field = 0;
430 value = 0;
431 while (1) {
432 pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id);
433 if (pos <= 0)
434 goto out_err;
435
436 if (!enum_id)
437 break;
438
439 /* first check if this is a function enum */
440 in_range = enum_in_range(enum_id, &pfc->function);
441 if (!in_range) {
442 /* not a function enum */
443 if (range) {
444 /*
445 * other range exists, so this pin is
446 * a regular GPIO pin that now is being
447 * bound to a specific direction.
448 *
449 * for this case we only allow function enums
450 * and the enums that match the other range.
451 */
452 in_range = enum_in_range(enum_id, range);
453
454 /*
455 * special case pass through for fixed
456 * input-only or output-only pins without
457 * function enum register association.
458 */
459 if (in_range && enum_id == range->force)
460 continue;
461 } else {
462 /*
463 * no other range exists, so this pin
464 * must then be of the function type.
465 *
466 * allow function type pins to select
467 * any combination of function/in/out
468 * in their MARK lists.
469 */
470 in_range = 1;
471 }
472 }
473
474 if (!in_range)
475 continue;
476
477 if (get_config_reg(pfc, enum_id, &cr,
478 &field, &value, &cntp) != 0)
479 goto out_err;
480
481 switch (cfg_mode) {
482 case GPIO_CFG_DRYRUN:
483 if (!*cntp ||
484 (read_config_reg(pfc, cr, field) != value))
485 continue;
486 break;
487
488 case GPIO_CFG_REQ:
489 write_config_reg(pfc, cr, field, value);
490 *cntp = *cntp + 1;
491 break;
492
493 case GPIO_CFG_FREE:
494 *cntp = *cntp - 1;
495 break;
496 }
497 }
498
499 return 0;
500 out_err:
501 return -1;
502}
503EXPORT_SYMBOL_GPL(sh_pfc_config_gpio);
504
505int register_sh_pfc(struct sh_pfc *pfc)
506{
507 int (*initroutine)(struct sh_pfc *) = NULL;
508 int ret;
509
510 /*
511 * Ensure that the type encoding fits
512 */
513 BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
514
515 if (sh_pfc)
516 return -EBUSY;
517
518 ret = pfc_ioremap(pfc);
519 if (unlikely(ret < 0))
520 return ret;
521
522 spin_lock_init(&pfc->lock);
523
524 pinctrl_provide_dummies();
525 setup_data_regs(pfc);
526
527 sh_pfc = pfc;
528
529 /*
530 * Initialize pinctrl bindings first
531 */
532 initroutine = symbol_request(sh_pfc_register_pinctrl);
533 if (initroutine) {
534 ret = (*initroutine)(pfc);
535 symbol_put_addr(initroutine);
536
537 if (unlikely(ret != 0))
538 goto err;
539 } else {
540 pr_err("failed to initialize pinctrl bindings\n");
541 goto err;
542 }
543
544 /*
545 * Then the GPIO chip
546 */
547 initroutine = symbol_request(sh_pfc_register_gpiochip);
548 if (initroutine) {
549 ret = (*initroutine)(pfc);
550 symbol_put_addr(initroutine);
551
552 /*
553 * If the GPIO chip fails to come up we still leave the
554 * PFC state as it is, given that there are already
555 * extant users of it that have succeeded by this point.
556 */
557 if (unlikely(ret != 0)) {
558 pr_notice("failed to init GPIO chip, ignoring...\n");
559 ret = 0;
560 }
561 }
562
563 pr_info("%s support registered\n", pfc->name);
564
565 return 0;
566
567err:
568 pfc_iounmap(pfc);
569 sh_pfc = NULL;
570
571 return ret;
572}
diff --git a/drivers/sh/pfc/gpio.c b/drivers/sh/pfc/gpio.c
deleted file mode 100644
index 6a24f07c2013..000000000000
--- a/drivers/sh/pfc/gpio.c
+++ /dev/null
@@ -1,240 +0,0 @@
1/*
2 * SuperH Pin Function Controller GPIO driver.
3 *
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt
12
13#include <linux/init.h>
14#include <linux/gpio.h>
15#include <linux/slab.h>
16#include <linux/spinlock.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/pinctrl/consumer.h>
20#include <linux/sh_pfc.h>
21
22struct sh_pfc_chip {
23 struct sh_pfc *pfc;
24 struct gpio_chip gpio_chip;
25};
26
27static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
28{
29 return container_of(gc, struct sh_pfc_chip, gpio_chip);
30}
31
32static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
33{
34 return gpio_to_pfc_chip(gc)->pfc;
35}
36
37static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
38{
39 return pinctrl_request_gpio(offset);
40}
41
42static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
43{
44 pinctrl_free_gpio(offset);
45}
46
47static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
48{
49 struct pinmux_data_reg *dr = NULL;
50 int bit = 0;
51
52 if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
53 BUG();
54 else
55 sh_pfc_write_bit(dr, bit, value);
56}
57
58static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
59{
60 struct pinmux_data_reg *dr = NULL;
61 int bit = 0;
62
63 if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
64 return -EINVAL;
65
66 return sh_pfc_read_bit(dr, bit);
67}
68
69static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
70{
71 return pinctrl_gpio_direction_input(offset);
72}
73
74static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
75 int value)
76{
77 sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
78
79 return pinctrl_gpio_direction_output(offset);
80}
81
82static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
83{
84 return sh_gpio_get_value(gpio_to_pfc(gc), offset);
85}
86
87static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
88{
89 sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
90}
91
92static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
93{
94 struct sh_pfc *pfc = gpio_to_pfc(gc);
95 pinmux_enum_t enum_id;
96 pinmux_enum_t *enum_ids;
97 int i, k, pos;
98
99 pos = 0;
100 enum_id = 0;
101 while (1) {
102 pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id);
103 if (pos <= 0 || !enum_id)
104 break;
105
106 for (i = 0; i < pfc->gpio_irq_size; i++) {
107 enum_ids = pfc->gpio_irq[i].enum_ids;
108 for (k = 0; enum_ids[k]; k++) {
109 if (enum_ids[k] == enum_id)
110 return pfc->gpio_irq[i].irq;
111 }
112 }
113 }
114
115 return -ENOSYS;
116}
117
118static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
119{
120 struct sh_pfc *pfc = chip->pfc;
121 struct gpio_chip *gc = &chip->gpio_chip;
122
123 gc->request = sh_gpio_request;
124 gc->free = sh_gpio_free;
125 gc->direction_input = sh_gpio_direction_input;
126 gc->get = sh_gpio_get;
127 gc->direction_output = sh_gpio_direction_output;
128 gc->set = sh_gpio_set;
129 gc->to_irq = sh_gpio_to_irq;
130
131 WARN_ON(pfc->first_gpio != 0); /* needs testing */
132
133 gc->label = pfc->name;
134 gc->owner = THIS_MODULE;
135 gc->base = pfc->first_gpio;
136 gc->ngpio = (pfc->last_gpio - pfc->first_gpio) + 1;
137}
138
139int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
140{
141 struct sh_pfc_chip *chip;
142 int ret;
143
144 chip = kzalloc(sizeof(struct sh_pfc_chip), GFP_KERNEL);
145 if (unlikely(!chip))
146 return -ENOMEM;
147
148 chip->pfc = pfc;
149
150 sh_pfc_gpio_setup(chip);
151
152 ret = gpiochip_add(&chip->gpio_chip);
153 if (unlikely(ret < 0))
154 kfree(chip);
155
156 pr_info("%s handling gpio %d -> %d\n",
157 pfc->name, pfc->first_gpio, pfc->last_gpio);
158
159 return ret;
160}
161EXPORT_SYMBOL_GPL(sh_pfc_register_gpiochip);
162
163static int sh_pfc_gpio_match(struct gpio_chip *gc, void *data)
164{
165 return !!strstr(gc->label, data);
166}
167
168static int sh_pfc_gpio_probe(struct platform_device *pdev)
169{
170 struct sh_pfc_chip *chip;
171 struct gpio_chip *gc;
172
173 gc = gpiochip_find("_pfc", sh_pfc_gpio_match);
174 if (unlikely(!gc)) {
175 pr_err("Cant find gpio chip\n");
176 return -ENODEV;
177 }
178
179 chip = gpio_to_pfc_chip(gc);
180 platform_set_drvdata(pdev, chip);
181
182 pr_info("attaching to GPIO chip %s\n", chip->pfc->name);
183
184 return 0;
185}
186
187static int sh_pfc_gpio_remove(struct platform_device *pdev)
188{
189 struct sh_pfc_chip *chip = platform_get_drvdata(pdev);
190 int ret;
191
192 ret = gpiochip_remove(&chip->gpio_chip);
193 if (unlikely(ret < 0))
194 return ret;
195
196 kfree(chip);
197 return 0;
198}
199
200static struct platform_driver sh_pfc_gpio_driver = {
201 .probe = sh_pfc_gpio_probe,
202 .remove = sh_pfc_gpio_remove,
203 .driver = {
204 .name = KBUILD_MODNAME,
205 .owner = THIS_MODULE,
206 },
207};
208
209static struct platform_device sh_pfc_gpio_device = {
210 .name = KBUILD_MODNAME,
211 .id = -1,
212};
213
214static int __init sh_pfc_gpio_init(void)
215{
216 int rc;
217
218 rc = platform_driver_register(&sh_pfc_gpio_driver);
219 if (likely(!rc)) {
220 rc = platform_device_register(&sh_pfc_gpio_device);
221 if (unlikely(rc))
222 platform_driver_unregister(&sh_pfc_gpio_driver);
223 }
224
225 return rc;
226}
227
228static void __exit sh_pfc_gpio_exit(void)
229{
230 platform_device_unregister(&sh_pfc_gpio_device);
231 platform_driver_unregister(&sh_pfc_gpio_driver);
232}
233
234module_init(sh_pfc_gpio_init);
235module_exit(sh_pfc_gpio_exit);
236
237MODULE_AUTHOR("Magnus Damm, Paul Mundt");
238MODULE_DESCRIPTION("GPIO driver for SuperH pin function controller");
239MODULE_LICENSE("GPL v2");
240MODULE_ALIAS("platform:pfc-gpio");
diff --git a/drivers/sh/pfc/pinctrl.c b/drivers/sh/pfc/pinctrl.c
deleted file mode 100644
index 4109b769eac0..000000000000
--- a/drivers/sh/pfc/pinctrl.c
+++ /dev/null
@@ -1,527 +0,0 @@
1/*
2 * SuperH Pin Function Controller pinmux support.
3 *
4 * Copyright (C) 2012 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#define DRV_NAME "pinctrl-sh_pfc"
11
12#define pr_fmt(fmt) DRV_NAME " " KBUILD_MODNAME ": " fmt
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/sh_pfc.h>
17#include <linux/err.h>
18#include <linux/slab.h>
19#include <linux/spinlock.h>
20#include <linux/platform_device.h>
21#include <linux/pinctrl/consumer.h>
22#include <linux/pinctrl/pinctrl.h>
23#include <linux/pinctrl/pinconf.h>
24#include <linux/pinctrl/pinmux.h>
25#include <linux/pinctrl/pinconf-generic.h>
26
27struct sh_pfc_pinctrl {
28 struct pinctrl_dev *pctl;
29 struct sh_pfc *pfc;
30
31 struct pinmux_gpio **functions;
32 unsigned int nr_functions;
33
34 struct pinctrl_pin_desc *pads;
35 unsigned int nr_pads;
36
37 spinlock_t lock;
38};
39
40static struct sh_pfc_pinctrl *sh_pfc_pmx;
41
42static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
43{
44 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
45
46 return pmx->nr_pads;
47}
48
49static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
50 unsigned selector)
51{
52 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
53
54 return pmx->pads[selector].name;
55}
56
57static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
58 const unsigned **pins, unsigned *num_pins)
59{
60 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
61
62 *pins = &pmx->pads[group].number;
63 *num_pins = 1;
64
65 return 0;
66}
67
68static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
69 unsigned offset)
70{
71 seq_printf(s, "%s", DRV_NAME);
72}
73
74static struct pinctrl_ops sh_pfc_pinctrl_ops = {
75 .get_groups_count = sh_pfc_get_groups_count,
76 .get_group_name = sh_pfc_get_group_name,
77 .get_group_pins = sh_pfc_get_group_pins,
78 .pin_dbg_show = sh_pfc_pin_dbg_show,
79};
80
81static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
82{
83 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
84
85 return pmx->nr_functions;
86}
87
88static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
89 unsigned selector)
90{
91 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
92
93 return pmx->functions[selector]->name;
94}
95
96static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
97 const char * const **groups,
98 unsigned * const num_groups)
99{
100 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
101
102 *groups = &pmx->functions[func]->name;
103 *num_groups = 1;
104
105 return 0;
106}
107
108static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
109 unsigned group)
110{
111 return 0;
112}
113
114static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
115 unsigned group)
116{
117}
118
119static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
120{
121 if (sh_pfc_config_gpio(pfc, offset,
122 PINMUX_TYPE_FUNCTION,
123 GPIO_CFG_DRYRUN) != 0)
124 return -EINVAL;
125
126 if (sh_pfc_config_gpio(pfc, offset,
127 PINMUX_TYPE_FUNCTION,
128 GPIO_CFG_REQ) != 0)
129 return -EINVAL;
130
131 return 0;
132}
133
134static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
135 int new_type)
136{
137 unsigned long flags;
138 int pinmux_type;
139 int ret = -EINVAL;
140
141 spin_lock_irqsave(&pfc->lock, flags);
142
143 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
144
145 /*
146 * See if the present config needs to first be de-configured.
147 */
148 switch (pinmux_type) {
149 case PINMUX_TYPE_GPIO:
150 break;
151 case PINMUX_TYPE_OUTPUT:
152 case PINMUX_TYPE_INPUT:
153 case PINMUX_TYPE_INPUT_PULLUP:
154 case PINMUX_TYPE_INPUT_PULLDOWN:
155 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
156 break;
157 default:
158 goto err;
159 }
160
161 /*
162 * Dry run
163 */
164 if (sh_pfc_config_gpio(pfc, offset, new_type,
165 GPIO_CFG_DRYRUN) != 0)
166 goto err;
167
168 /*
169 * Request
170 */
171 if (sh_pfc_config_gpio(pfc, offset, new_type,
172 GPIO_CFG_REQ) != 0)
173 goto err;
174
175 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
176 pfc->gpios[offset].flags |= new_type;
177
178 ret = 0;
179
180err:
181 spin_unlock_irqrestore(&pfc->lock, flags);
182
183 return ret;
184}
185
186
187static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
188 struct pinctrl_gpio_range *range,
189 unsigned offset)
190{
191 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
192 struct sh_pfc *pfc = pmx->pfc;
193 unsigned long flags;
194 int ret, pinmux_type;
195
196 spin_lock_irqsave(&pfc->lock, flags);
197
198 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
199
200 switch (pinmux_type) {
201 case PINMUX_TYPE_FUNCTION:
202 pr_notice_once("Use of GPIO API for function requests is "
203 "deprecated, convert to pinctrl\n");
204 /* handle for now */
205 ret = sh_pfc_config_function(pfc, offset);
206 if (unlikely(ret < 0))
207 goto err;
208
209 break;
210 case PINMUX_TYPE_GPIO:
211 case PINMUX_TYPE_INPUT:
212 case PINMUX_TYPE_OUTPUT:
213 break;
214 default:
215 pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
216 ret = -ENOTSUPP;
217 goto err;
218 }
219
220 ret = 0;
221
222err:
223 spin_unlock_irqrestore(&pfc->lock, flags);
224
225 return ret;
226}
227
228static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
229 struct pinctrl_gpio_range *range,
230 unsigned offset)
231{
232 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
233 struct sh_pfc *pfc = pmx->pfc;
234 unsigned long flags;
235 int pinmux_type;
236
237 spin_lock_irqsave(&pfc->lock, flags);
238
239 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
240
241 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
242
243 spin_unlock_irqrestore(&pfc->lock, flags);
244}
245
246static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
247 struct pinctrl_gpio_range *range,
248 unsigned offset, bool input)
249{
250 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
251 int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
252
253 return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
254}
255
256static struct pinmux_ops sh_pfc_pinmux_ops = {
257 .get_functions_count = sh_pfc_get_functions_count,
258 .get_function_name = sh_pfc_get_function_name,
259 .get_function_groups = sh_pfc_get_function_groups,
260 .enable = sh_pfc_noop_enable,
261 .disable = sh_pfc_noop_disable,
262 .gpio_request_enable = sh_pfc_gpio_request_enable,
263 .gpio_disable_free = sh_pfc_gpio_disable_free,
264 .gpio_set_direction = sh_pfc_gpio_set_direction,
265};
266
267static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
268 unsigned long *config)
269{
270 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
271 struct sh_pfc *pfc = pmx->pfc;
272
273 *config = pfc->gpios[pin].flags & PINMUX_FLAG_TYPE;
274
275 return 0;
276}
277
278static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
279 unsigned long config)
280{
281 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
282
283 /* Validate the new type */
284 if (config >= PINMUX_FLAG_TYPE)
285 return -EINVAL;
286
287 return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
288}
289
290static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
291 struct seq_file *s, unsigned pin)
292{
293 const char *pinmux_type_str[] = {
294 [PINMUX_TYPE_NONE] = "none",
295 [PINMUX_TYPE_FUNCTION] = "function",
296 [PINMUX_TYPE_GPIO] = "gpio",
297 [PINMUX_TYPE_OUTPUT] = "output",
298 [PINMUX_TYPE_INPUT] = "input",
299 [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
300 [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
301 };
302 unsigned long config;
303 int rc;
304
305 rc = sh_pfc_pinconf_get(pctldev, pin, &config);
306 if (unlikely(rc != 0))
307 return;
308
309 seq_printf(s, " %s", pinmux_type_str[config]);
310}
311
312static struct pinconf_ops sh_pfc_pinconf_ops = {
313 .pin_config_get = sh_pfc_pinconf_get,
314 .pin_config_set = sh_pfc_pinconf_set,
315 .pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
316};
317
318static struct pinctrl_gpio_range sh_pfc_gpio_range = {
319 .name = DRV_NAME,
320 .id = 0,
321};
322
323static struct pinctrl_desc sh_pfc_pinctrl_desc = {
324 .name = DRV_NAME,
325 .owner = THIS_MODULE,
326 .pctlops = &sh_pfc_pinctrl_ops,
327 .pmxops = &sh_pfc_pinmux_ops,
328 .confops = &sh_pfc_pinconf_ops,
329};
330
331static inline void sh_pfc_map_one_gpio(struct sh_pfc *pfc,
332 struct sh_pfc_pinctrl *pmx,
333 struct pinmux_gpio *gpio,
334 unsigned offset)
335{
336 struct pinmux_data_reg *dummy;
337 unsigned long flags;
338 int bit;
339
340 gpio->flags &= ~PINMUX_FLAG_TYPE;
341
342 if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
343 gpio->flags |= PINMUX_TYPE_GPIO;
344 else {
345 gpio->flags |= PINMUX_TYPE_FUNCTION;
346
347 spin_lock_irqsave(&pmx->lock, flags);
348 pmx->nr_functions++;
349 spin_unlock_irqrestore(&pmx->lock, flags);
350 }
351}
352
353/* pinmux ranges -> pinctrl pin descs */
354static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
355{
356 unsigned long flags;
357 int i;
358
359 pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1;
360
361 pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
362 GFP_KERNEL);
363 if (unlikely(!pmx->pads)) {
364 pmx->nr_pads = 0;
365 return -ENOMEM;
366 }
367
368 spin_lock_irqsave(&pfc->lock, flags);
369
370 /*
371 * We don't necessarily have a 1:1 mapping between pin and linux
372 * GPIO number, as the latter maps to the associated enum_id.
373 * Care needs to be taken to translate back to pin space when
374 * dealing with any pin configurations.
375 */
376 for (i = 0; i < pmx->nr_pads; i++) {
377 struct pinctrl_pin_desc *pin = pmx->pads + i;
378 struct pinmux_gpio *gpio = pfc->gpios + i;
379
380 pin->number = pfc->first_gpio + i;
381 pin->name = gpio->name;
382
383 /* XXX */
384 if (unlikely(!gpio->enum_id))
385 continue;
386
387 sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
388 }
389
390 spin_unlock_irqrestore(&pfc->lock, flags);
391
392 sh_pfc_pinctrl_desc.pins = pmx->pads;
393 sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
394
395 return 0;
396}
397
398static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
399{
400 unsigned long flags;
401 int i, fn;
402
403 pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *),
404 GFP_KERNEL);
405 if (unlikely(!pmx->functions))
406 return -ENOMEM;
407
408 spin_lock_irqsave(&pmx->lock, flags);
409
410 for (i = fn = 0; i < pmx->nr_pads; i++) {
411 struct pinmux_gpio *gpio = pfc->gpios + i;
412
413 if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
414 pmx->functions[fn++] = gpio;
415 }
416
417 spin_unlock_irqrestore(&pmx->lock, flags);
418
419 return 0;
420}
421
422static int sh_pfc_pinctrl_probe(struct platform_device *pdev)
423{
424 struct sh_pfc *pfc;
425 int ret;
426
427 if (unlikely(!sh_pfc_pmx))
428 return -ENODEV;
429
430 pfc = sh_pfc_pmx->pfc;
431
432 ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx);
433 if (unlikely(ret != 0))
434 return ret;
435
436 ret = sh_pfc_map_functions(pfc, sh_pfc_pmx);
437 if (unlikely(ret != 0))
438 goto free_pads;
439
440 sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
441 sh_pfc_pmx);
442 if (IS_ERR(sh_pfc_pmx->pctl)) {
443 ret = PTR_ERR(sh_pfc_pmx->pctl);
444 goto free_functions;
445 }
446
447 sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1;
448 sh_pfc_gpio_range.base = pfc->first_gpio;
449 sh_pfc_gpio_range.pin_base = pfc->first_gpio;
450
451 pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);
452
453 platform_set_drvdata(pdev, sh_pfc_pmx);
454
455 return 0;
456
457free_functions:
458 kfree(sh_pfc_pmx->functions);
459free_pads:
460 kfree(sh_pfc_pmx->pads);
461 kfree(sh_pfc_pmx);
462
463 return ret;
464}
465
466static int sh_pfc_pinctrl_remove(struct platform_device *pdev)
467{
468 struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev);
469
470 pinctrl_unregister(pmx->pctl);
471
472 platform_set_drvdata(pdev, NULL);
473
474 kfree(sh_pfc_pmx->functions);
475 kfree(sh_pfc_pmx->pads);
476 kfree(sh_pfc_pmx);
477
478 return 0;
479}
480
481static struct platform_driver sh_pfc_pinctrl_driver = {
482 .probe = sh_pfc_pinctrl_probe,
483 .remove = sh_pfc_pinctrl_remove,
484 .driver = {
485 .name = DRV_NAME,
486 .owner = THIS_MODULE,
487 },
488};
489
490static struct platform_device sh_pfc_pinctrl_device = {
491 .name = DRV_NAME,
492 .id = -1,
493};
494
495static int sh_pfc_pinctrl_init(void)
496{
497 int rc;
498
499 rc = platform_driver_register(&sh_pfc_pinctrl_driver);
500 if (likely(!rc)) {
501 rc = platform_device_register(&sh_pfc_pinctrl_device);
502 if (unlikely(rc))
503 platform_driver_unregister(&sh_pfc_pinctrl_driver);
504 }
505
506 return rc;
507}
508
509int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
510{
511 sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
512 if (unlikely(!sh_pfc_pmx))
513 return -ENOMEM;
514
515 spin_lock_init(&sh_pfc_pmx->lock);
516
517 sh_pfc_pmx->pfc = pfc;
518
519 return sh_pfc_pinctrl_init();
520}
521EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl);
522
523static void __exit sh_pfc_pinctrl_exit(void)
524{
525 platform_driver_unregister(&sh_pfc_pinctrl_driver);
526}
527module_exit(sh_pfc_pinctrl_exit);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 16:23:37 -0500