diff options
author | Paul Mundt <lethal@linux-sh.org> | 2009-09-16 00:48:32 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-09-16 00:48:32 -0400 |
commit | ea88023b3491a384575ebcd5e8a449e841a28a24 (patch) | |
tree | f46e3d8302e44dc55ce31823501e100472d29683 /drivers/serial | |
parent | a6f15ade97989d414e9bf33874c9d5d1f39808ec (diff) | |
parent | 0cb583fd2862f19ea88b02eb307d11c09e51e2f8 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
arch/sh/kernel/vmlinux.lds.S
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Kconfig | 9 | ||||
-rw-r--r-- | drivers/serial/Makefile | 1 | ||||
-rw-r--r-- | drivers/serial/amba-pl011.c | 26 | ||||
-rw-r--r-- | drivers/serial/imx.c | 65 | ||||
-rw-r--r-- | drivers/serial/serial_ks8695.c | 6 |
5 files changed, 62 insertions, 45 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 6553833c12db..03422ce878cf 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -459,7 +459,7 @@ config SERIAL_SAMSUNG_UARTS | |||
459 | int | 459 | int |
460 | depends on ARM && PLAT_S3C | 460 | depends on ARM && PLAT_S3C |
461 | default 2 if ARCH_S3C2400 | 461 | default 2 if ARCH_S3C2400 |
462 | default 4 if ARCH_S3C64XX || CPU_S3C2443 | 462 | default 4 if ARCH_S5PC1XX || ARCH_S3C64XX || CPU_S3C2443 |
463 | default 3 | 463 | default 3 |
464 | help | 464 | help |
465 | Select the number of available UART ports for the Samsung S3C | 465 | Select the number of available UART ports for the Samsung S3C |
@@ -533,6 +533,13 @@ config SERIAL_S3C6400 | |||
533 | Serial port support for the Samsung S3C6400 and S3C6410 | 533 | Serial port support for the Samsung S3C6400 and S3C6410 |
534 | SoCs | 534 | SoCs |
535 | 535 | ||
536 | config SERIAL_S5PC100 | ||
537 | tristate "Samsung S5PC100 Serial port support" | ||
538 | depends on SERIAL_SAMSUNG && CPU_S5PC100 | ||
539 | default y | ||
540 | help | ||
541 | Serial port support for the Samsung S5PC100 SoCs | ||
542 | |||
536 | config SERIAL_MAX3100 | 543 | config SERIAL_MAX3100 |
537 | tristate "MAX3100 support" | 544 | tristate "MAX3100 support" |
538 | depends on SPI | 545 | depends on SPI |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index d5a29981c6c4..97f6fcc8b432 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -43,6 +43,7 @@ obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o | |||
43 | obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o | 43 | obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o |
44 | obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o | 44 | obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o |
45 | obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o | 45 | obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o |
46 | obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o | ||
46 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o | 47 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o |
47 | obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o | 48 | obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o |
48 | obj-$(CONFIG_SERIAL_MUX) += mux.o | 49 | obj-$(CONFIG_SERIAL_MUX) += mux.o |
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index bf82e28770a9..72ba0c6d3551 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c | |||
@@ -826,6 +826,28 @@ static int pl011_remove(struct amba_device *dev) | |||
826 | return 0; | 826 | return 0; |
827 | } | 827 | } |
828 | 828 | ||
829 | #ifdef CONFIG_PM | ||
830 | static int pl011_suspend(struct amba_device *dev, pm_message_t state) | ||
831 | { | ||
832 | struct uart_amba_port *uap = amba_get_drvdata(dev); | ||
833 | |||
834 | if (!uap) | ||
835 | return -EINVAL; | ||
836 | |||
837 | return uart_suspend_port(&amba_reg, &uap->port); | ||
838 | } | ||
839 | |||
840 | static int pl011_resume(struct amba_device *dev) | ||
841 | { | ||
842 | struct uart_amba_port *uap = amba_get_drvdata(dev); | ||
843 | |||
844 | if (!uap) | ||
845 | return -EINVAL; | ||
846 | |||
847 | return uart_resume_port(&amba_reg, &uap->port); | ||
848 | } | ||
849 | #endif | ||
850 | |||
829 | static struct amba_id pl011_ids[] __initdata = { | 851 | static struct amba_id pl011_ids[] __initdata = { |
830 | { | 852 | { |
831 | .id = 0x00041011, | 853 | .id = 0x00041011, |
@@ -847,6 +869,10 @@ static struct amba_driver pl011_driver = { | |||
847 | .id_table = pl011_ids, | 869 | .id_table = pl011_ids, |
848 | .probe = pl011_probe, | 870 | .probe = pl011_probe, |
849 | .remove = pl011_remove, | 871 | .remove = pl011_remove, |
872 | #ifdef CONFIG_PM | ||
873 | .suspend = pl011_suspend, | ||
874 | .resume = pl011_resume, | ||
875 | #endif | ||
850 | }; | 876 | }; |
851 | 877 | ||
852 | static int __init pl011_init(void) | 878 | static int __init pl011_init(void) |
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 5d7b58f1fe42..7485afd0df4c 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
@@ -67,21 +67,8 @@ | |||
67 | #define UBIR 0xa4 /* BRM Incremental Register */ | 67 | #define UBIR 0xa4 /* BRM Incremental Register */ |
68 | #define UBMR 0xa8 /* BRM Modulator Register */ | 68 | #define UBMR 0xa8 /* BRM Modulator Register */ |
69 | #define UBRC 0xac /* Baud Rate Count Register */ | 69 | #define UBRC 0xac /* Baud Rate Count Register */ |
70 | #if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2 | 70 | #define MX2_ONEMS 0xb0 /* One Millisecond register */ |
71 | #define ONEMS 0xb0 /* One Millisecond register */ | 71 | #define UTS (cpu_is_mx1() ? 0xd0 : 0xb4) /* UART Test Register */ |
72 | #define UTS 0xb4 /* UART Test Register */ | ||
73 | #endif | ||
74 | #ifdef CONFIG_ARCH_MX1 | ||
75 | #define BIPR1 0xb0 /* Incremental Preset Register 1 */ | ||
76 | #define BIPR2 0xb4 /* Incremental Preset Register 2 */ | ||
77 | #define BIPR3 0xb8 /* Incremental Preset Register 3 */ | ||
78 | #define BIPR4 0xbc /* Incremental Preset Register 4 */ | ||
79 | #define BMPR1 0xc0 /* BRM Modulator Register 1 */ | ||
80 | #define BMPR2 0xc4 /* BRM Modulator Register 2 */ | ||
81 | #define BMPR3 0xc8 /* BRM Modulator Register 3 */ | ||
82 | #define BMPR4 0xcc /* BRM Modulator Register 4 */ | ||
83 | #define UTS 0xd0 /* UART Test Register */ | ||
84 | #endif | ||
85 | 72 | ||
86 | /* UART Control Register Bit Fields.*/ | 73 | /* UART Control Register Bit Fields.*/ |
87 | #define URXD_CHARRDY (1<<15) | 74 | #define URXD_CHARRDY (1<<15) |
@@ -101,12 +88,7 @@ | |||
101 | #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ | 88 | #define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ |
102 | #define UCR1_SNDBRK (1<<4) /* Send break */ | 89 | #define UCR1_SNDBRK (1<<4) /* Send break */ |
103 | #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ | 90 | #define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ |
104 | #ifdef CONFIG_ARCH_MX1 | 91 | #define MX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, mx1 only */ |
105 | #define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ | ||
106 | #endif | ||
107 | #if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2 | ||
108 | #define UCR1_UARTCLKEN (0) /* not present on mx2/mx3 */ | ||
109 | #endif | ||
110 | #define UCR1_DOZE (1<<1) /* Doze */ | 92 | #define UCR1_DOZE (1<<1) /* Doze */ |
111 | #define UCR1_UARTEN (1<<0) /* UART enabled */ | 93 | #define UCR1_UARTEN (1<<0) /* UART enabled */ |
112 | #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ | 94 | #define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */ |
@@ -132,13 +114,9 @@ | |||
132 | #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ | 114 | #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ |
133 | #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ | 115 | #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ |
134 | #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ | 116 | #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ |
135 | #ifdef CONFIG_ARCH_MX1 | 117 | #define MX1_UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */ |
136 | #define UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */ | 118 | #define MX1_UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */ |
137 | #define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */ | 119 | #define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ |
138 | #endif | ||
139 | #if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3 | ||
140 | #define UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ | ||
141 | #endif | ||
142 | #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ | 120 | #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ |
143 | #define UCR3_BPEN (1<<0) /* Preset registers enable */ | 121 | #define UCR3_BPEN (1<<0) /* Preset registers enable */ |
144 | #define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ | 122 | #define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ |
@@ -186,12 +164,10 @@ | |||
186 | #define UTS_SOFTRST (1<<0) /* Software reset */ | 164 | #define UTS_SOFTRST (1<<0) /* Software reset */ |
187 | 165 | ||
188 | /* We've been assigned a range on the "Low-density serial ports" major */ | 166 | /* We've been assigned a range on the "Low-density serial ports" major */ |
189 | #ifdef CONFIG_ARCH_MXC | ||
190 | #define SERIAL_IMX_MAJOR 207 | 167 | #define SERIAL_IMX_MAJOR 207 |
191 | #define MINOR_START 16 | 168 | #define MINOR_START 16 |
192 | #define DEV_NAME "ttymxc" | 169 | #define DEV_NAME "ttymxc" |
193 | #define MAX_INTERNAL_IRQ MXC_INTERNAL_IRQS | 170 | #define MAX_INTERNAL_IRQ MXC_INTERNAL_IRQS |
194 | #endif | ||
195 | 171 | ||
196 | /* | 172 | /* |
197 | * This determines how often we check the modem status signals | 173 | * This determines how often we check the modem status signals |
@@ -706,11 +682,11 @@ static int imx_startup(struct uart_port *port) | |||
706 | } | 682 | } |
707 | } | 683 | } |
708 | 684 | ||
709 | #if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3 | 685 | if (!cpu_is_mx1()) { |
710 | temp = readl(sport->port.membase + UCR3); | 686 | temp = readl(sport->port.membase + UCR3); |
711 | temp |= UCR3_RXDMUXSEL; | 687 | temp |= MX2_UCR3_RXDMUXSEL; |
712 | writel(temp, sport->port.membase + UCR3); | 688 | writel(temp, sport->port.membase + UCR3); |
713 | #endif | 689 | } |
714 | 690 | ||
715 | if (USE_IRDA(sport)) { | 691 | if (USE_IRDA(sport)) { |
716 | temp = readl(sport->port.membase + UCR4); | 692 | temp = readl(sport->port.membase + UCR4); |
@@ -942,9 +918,9 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
942 | writel(num, sport->port.membase + UBIR); | 918 | writel(num, sport->port.membase + UBIR); |
943 | writel(denom, sport->port.membase + UBMR); | 919 | writel(denom, sport->port.membase + UBMR); |
944 | 920 | ||
945 | #ifdef ONEMS | 921 | if (!cpu_is_mx1()) |
946 | writel(sport->port.uartclk / div / 1000, sport->port.membase + ONEMS); | 922 | writel(sport->port.uartclk / div / 1000, |
947 | #endif | 923 | sport->port.membase + MX2_ONEMS); |
948 | 924 | ||
949 | writel(old_ucr1, sport->port.membase + UCR1); | 925 | writel(old_ucr1, sport->port.membase + UCR1); |
950 | 926 | ||
@@ -1074,17 +1050,20 @@ static void | |||
1074 | imx_console_write(struct console *co, const char *s, unsigned int count) | 1050 | imx_console_write(struct console *co, const char *s, unsigned int count) |
1075 | { | 1051 | { |
1076 | struct imx_port *sport = imx_ports[co->index]; | 1052 | struct imx_port *sport = imx_ports[co->index]; |
1077 | unsigned int old_ucr1, old_ucr2; | 1053 | unsigned int old_ucr1, old_ucr2, ucr1; |
1078 | 1054 | ||
1079 | /* | 1055 | /* |
1080 | * First, save UCR1/2 and then disable interrupts | 1056 | * First, save UCR1/2 and then disable interrupts |
1081 | */ | 1057 | */ |
1082 | old_ucr1 = readl(sport->port.membase + UCR1); | 1058 | ucr1 = old_ucr1 = readl(sport->port.membase + UCR1); |
1083 | old_ucr2 = readl(sport->port.membase + UCR2); | 1059 | old_ucr2 = readl(sport->port.membase + UCR2); |
1084 | 1060 | ||
1085 | writel((old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN) & | 1061 | if (cpu_is_mx1()) |
1086 | ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN), | 1062 | ucr1 |= MX1_UCR1_UARTCLKEN; |
1087 | sport->port.membase + UCR1); | 1063 | ucr1 |= UCR1_UARTEN; |
1064 | ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN); | ||
1065 | |||
1066 | writel(ucr1, sport->port.membase + UCR1); | ||
1088 | 1067 | ||
1089 | writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2); | 1068 | writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2); |
1090 | 1069 | ||
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c index e0665630e4da..52db5cc3f900 100644 --- a/drivers/serial/serial_ks8695.c +++ b/drivers/serial/serial_ks8695.c | |||
@@ -110,7 +110,11 @@ static struct console ks8695_console; | |||
110 | static void ks8695uart_stop_tx(struct uart_port *port) | 110 | static void ks8695uart_stop_tx(struct uart_port *port) |
111 | { | 111 | { |
112 | if (tx_enabled(port)) { | 112 | if (tx_enabled(port)) { |
113 | disable_irq(KS8695_IRQ_UART_TX); | 113 | /* use disable_irq_nosync() and not disable_irq() to avoid self |
114 | * imposed deadlock by not waiting for irq handler to end, | ||
115 | * since this ks8695uart_stop_tx() is called from interrupt context. | ||
116 | */ | ||
117 | disable_irq_nosync(KS8695_IRQ_UART_TX); | ||
114 | tx_enable(port, 0); | 118 | tx_enable(port, 0); |
115 | } | 119 | } |
116 | } | 120 | } |