diff options
author | Feng Tang <feng.tang@intel.com> | 2010-10-14 05:47:35 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-10-22 13:20:10 -0400 |
commit | e5586eccc9aaf485985480e4d3049acffaa3fa90 (patch) | |
tree | f714f207536de2f04af5e3c6cf29348724e1585d /drivers/serial | |
parent | abf4f6a51477a68fe144b0c62f10c410b0c41378 (diff) |
serial: mfd: add more baud rates support
Add more baud rates support referring the baud_table[] defined
in drivers/char/tty_ioctl.c: 3000000/2000000/1000000/500000
Signed-off-by: Feng Tang <feng.tang@intel.com>
Acked-by: Alan Cox <alan.cox@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/mfd.c | 41 |
1 files changed, 27 insertions, 14 deletions
diff --git a/drivers/serial/mfd.c b/drivers/serial/mfd.c index ad35130cd8a0..735799e30aa9 100644 --- a/drivers/serial/mfd.c +++ b/drivers/serial/mfd.c | |||
@@ -929,39 +929,52 @@ serial_hsu_set_termios(struct uart_port *port, struct ktermios *termios, | |||
929 | cval |= UART_LCR_EPAR; | 929 | cval |= UART_LCR_EPAR; |
930 | 930 | ||
931 | /* | 931 | /* |
932 | * The base clk is 50Mhz, and the baud rate come from: | ||
933 | * baud = 50M * MUL / (DIV * PS * DLAB) | ||
934 | * | ||
932 | * For those basic low baud rate we can get the direct | 935 | * For those basic low baud rate we can get the direct |
933 | * scalar from 2746800, like 115200 = 2746800/24, for those | 936 | * scalar from 2746800, like 115200 = 2746800/24. For those |
934 | * higher baud rate, we have to handle them case by case, | 937 | * higher baud rate, we handle them case by case, mainly by |
935 | * but DIV reg is never touched as its default value 0x3d09 | 938 | * adjusting the MUL/PS registers, and DIV register is kept |
939 | * as default value 0x3d09 to make things simple | ||
936 | */ | 940 | */ |
937 | baud = uart_get_baud_rate(port, termios, old, 0, 4000000); | 941 | baud = uart_get_baud_rate(port, termios, old, 0, 4000000); |
938 | quot = uart_get_divisor(port, baud); | ||
939 | 942 | ||
943 | quot = 1; | ||
940 | switch (baud) { | 944 | switch (baud) { |
941 | case 3500000: | 945 | case 3500000: |
942 | mul = 0x3345; | 946 | mul = 0x3345; |
943 | ps = 0xC; | 947 | ps = 0xC; |
944 | quot = 1; | 948 | break; |
949 | case 3000000: | ||
950 | mul = 0x2EE0; | ||
945 | break; | 951 | break; |
946 | case 2500000: | 952 | case 2500000: |
947 | mul = 0x2710; | 953 | mul = 0x2710; |
948 | ps = 0x10; | ||
949 | quot = 1; | ||
950 | break; | 954 | break; |
951 | case 18432000: | 955 | case 2000000: |
956 | mul = 0x1F40; | ||
957 | break; | ||
958 | case 1843200: | ||
952 | mul = 0x2400; | 959 | mul = 0x2400; |
953 | ps = 0x10; | ||
954 | quot = 1; | ||
955 | break; | 960 | break; |
956 | case 1500000: | 961 | case 1500000: |
957 | mul = 0x1D4C; | 962 | mul = 0x1770; |
958 | ps = 0xc; | 963 | break; |
959 | quot = 1; | 964 | case 1000000: |
965 | mul = 0xFA0; | ||
966 | break; | ||
967 | case 500000: | ||
968 | mul = 0x7D0; | ||
960 | break; | 969 | break; |
961 | default: | 970 | default: |
962 | ; | 971 | /* Use uart_get_divisor to get quot for other baud rates */ |
972 | quot = 0; | ||
963 | } | 973 | } |
964 | 974 | ||
975 | if (!quot) | ||
976 | quot = uart_get_divisor(port, baud); | ||
977 | |||
965 | if ((up->port.uartclk / quot) < (2400 * 16)) | 978 | if ((up->port.uartclk / quot) < (2400 * 16)) |
966 | fcr = UART_FCR_ENABLE_FIFO | UART_FCR_HSU_64_1B; | 979 | fcr = UART_FCR_ENABLE_FIFO | UART_FCR_HSU_64_1B; |
967 | else if ((up->port.uartclk / quot) < (230400 * 16)) | 980 | else if ((up->port.uartclk / quot) < (230400 * 16)) |