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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2006-10-04 10:02:05 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-04 13:25:05 -0400
commit7192f92c799e4bf4943e3e233d6e4d786ac4d8a4 (patch)
tree73f090ab61fc46c2d13bf67bc40e1b02d9583058 /drivers/serial
parent73e2798b0f3f4fa8ff7d3e8138027a8352359bb5 (diff)
[PATCH] at91_serial -> atmel_serial: Internal names
Prefix all internal functions and variables with atmel_ instead of at91_. The at91_register_uart_fns() stuff is left as is since I can't find any actual users of it. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/atmel_serial.c496
-rw-r--r--drivers/serial/atmel_serial.h196
2 files changed, 346 insertions, 346 deletions
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 65972ce63c7d..7397d5df6d9f 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/drivers/char/at91_serial.c 2 * linux/drivers/char/at91_serial.c
3 * 3 *
4 * Driver for Atmel AT91RM9200 Serial ports 4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson 5 * Copyright (C) 2003 Rick Bronson
6 * 6 *
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. 7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
@@ -55,51 +55,51 @@
55/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we 55/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
56 * should coexist with the 8250 driver, such as if we have an external 16C550 56 * should coexist with the 8250 driver, such as if we have an external 16C550
57 * UART. */ 57 * UART. */
58#define SERIAL_AT91_MAJOR 204 58#define SERIAL_ATMEL_MAJOR 204
59#define MINOR_START 154 59#define MINOR_START 154
60#define AT91_DEVICENAME "ttyAT" 60#define ATMEL_DEVICENAME "ttyAT"
61 61
62#else 62#else
63 63
64/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port 64/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
65 * name, but it is legally reserved for the 8250 driver. */ 65 * name, but it is legally reserved for the 8250 driver. */
66#define SERIAL_AT91_MAJOR TTY_MAJOR 66#define SERIAL_ATMEL_MAJOR TTY_MAJOR
67#define MINOR_START 64 67#define MINOR_START 64
68#define AT91_DEVICENAME "ttyS" 68#define ATMEL_DEVICENAME "ttyS"
69 69
70#endif 70#endif
71 71
72#define AT91_ISR_PASS_LIMIT 256 72#define ATMEL_ISR_PASS_LIMIT 256
73 73
74#define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR) 74#define UART_PUT_CR(port,v) writel(v, (port)->membase + ATMEL_US_CR)
75#define UART_GET_MR(port) readl((port)->membase + AT91_US_MR) 75#define UART_GET_MR(port) readl((port)->membase + ATMEL_US_MR)
76#define UART_PUT_MR(port,v) writel(v, (port)->membase + AT91_US_MR) 76#define UART_PUT_MR(port,v) writel(v, (port)->membase + ATMEL_US_MR)
77#define UART_PUT_IER(port,v) writel(v, (port)->membase + AT91_US_IER) 77#define UART_PUT_IER(port,v) writel(v, (port)->membase + ATMEL_US_IER)
78#define UART_PUT_IDR(port,v) writel(v, (port)->membase + AT91_US_IDR) 78#define UART_PUT_IDR(port,v) writel(v, (port)->membase + ATMEL_US_IDR)
79#define UART_GET_IMR(port) readl((port)->membase + AT91_US_IMR) 79#define UART_GET_IMR(port) readl((port)->membase + ATMEL_US_IMR)
80#define UART_GET_CSR(port) readl((port)->membase + AT91_US_CSR) 80#define UART_GET_CSR(port) readl((port)->membase + ATMEL_US_CSR)
81#define UART_GET_CHAR(port) readl((port)->membase + AT91_US_RHR) 81#define UART_GET_CHAR(port) readl((port)->membase + ATMEL_US_RHR)
82#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + AT91_US_THR) 82#define UART_PUT_CHAR(port,v) writel(v, (port)->membase + ATMEL_US_THR)
83#define UART_GET_BRGR(port) readl((port)->membase + AT91_US_BRGR) 83#define UART_GET_BRGR(port) readl((port)->membase + ATMEL_US_BRGR)
84#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + AT91_US_BRGR) 84#define UART_PUT_BRGR(port,v) writel(v, (port)->membase + ATMEL_US_BRGR)
85#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + AT91_US_RTOR) 85#define UART_PUT_RTOR(port,v) writel(v, (port)->membase + ATMEL_US_RTOR)
86 86
87// #define UART_GET_CR(port) readl((port)->membase + AT91_US_CR) // is write-only 87// #define UART_GET_CR(port) readl((port)->membase + ATMEL_US_CR) // is write-only
88 88
89 /* PDC registers */ 89 /* PDC registers */
90#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR) 90#define UART_PUT_PTCR(port,v) writel(v, (port)->membase + ATMEL_PDC_PTCR)
91#define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR) 91#define UART_GET_PTSR(port) readl((port)->membase + ATMEL_PDC_PTSR)
92 92
93#define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR) 93#define UART_PUT_RPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RPR)
94#define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR) 94#define UART_GET_RPR(port) readl((port)->membase + ATMEL_PDC_RPR)
95#define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR) 95#define UART_PUT_RCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RCR)
96#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR) 96#define UART_PUT_RNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNPR)
97#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR) 97#define UART_PUT_RNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNCR)
98 98
99#define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR) 99#define UART_PUT_TPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TPR)
100#define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR) 100#define UART_PUT_TCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TCR)
101//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR) 101//#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNPR)
102//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR) 102//#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNCR)
103 103
104static int (*at91_open)(struct uart_port *); 104static int (*at91_open)(struct uart_port *);
105static void (*at91_close)(struct uart_port *); 105static void (*at91_close)(struct uart_port *);
@@ -107,30 +107,30 @@ static void (*at91_close)(struct uart_port *);
107/* 107/*
108 * We wrap our port structure around the generic uart_port. 108 * We wrap our port structure around the generic uart_port.
109 */ 109 */
110struct at91_uart_port { 110struct atmel_uart_port {
111 struct uart_port uart; /* uart */ 111 struct uart_port uart; /* uart */
112 struct clk *clk; /* uart clock */ 112 struct clk *clk; /* uart clock */
113 unsigned short suspended; /* is port suspended? */ 113 unsigned short suspended; /* is port suspended? */
114}; 114};
115 115
116static struct at91_uart_port at91_ports[ATMEL_MAX_UART]; 116static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
117 117
118#ifdef SUPPORT_SYSRQ 118#ifdef SUPPORT_SYSRQ
119static struct console at91_console; 119static struct console atmel_console;
120#endif 120#endif
121 121
122/* 122/*
123 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. 123 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
124 */ 124 */
125static u_int at91_tx_empty(struct uart_port *port) 125static u_int atmel_tx_empty(struct uart_port *port)
126{ 126{
127 return (UART_GET_CSR(port) & AT91_US_TXEMPTY) ? TIOCSER_TEMT : 0; 127 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
128} 128}
129 129
130/* 130/*
131 * Set state of the modem control output lines 131 * Set state of the modem control output lines
132 */ 132 */
133static void at91_set_mctrl(struct uart_port *port, u_int mctrl) 133static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
134{ 134{
135 unsigned int control = 0; 135 unsigned int control = 0;
136 unsigned int mode; 136 unsigned int mode;
@@ -149,30 +149,30 @@ static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
149 } 149 }
150 150
151 if (mctrl & TIOCM_RTS) 151 if (mctrl & TIOCM_RTS)
152 control |= AT91_US_RTSEN; 152 control |= ATMEL_US_RTSEN;
153 else 153 else
154 control |= AT91_US_RTSDIS; 154 control |= ATMEL_US_RTSDIS;
155 155
156 if (mctrl & TIOCM_DTR) 156 if (mctrl & TIOCM_DTR)
157 control |= AT91_US_DTREN; 157 control |= ATMEL_US_DTREN;
158 else 158 else
159 control |= AT91_US_DTRDIS; 159 control |= ATMEL_US_DTRDIS;
160 160
161 UART_PUT_CR(port, control); 161 UART_PUT_CR(port, control);
162 162
163 /* Local loopback mode? */ 163 /* Local loopback mode? */
164 mode = UART_GET_MR(port) & ~AT91_US_CHMODE; 164 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
165 if (mctrl & TIOCM_LOOP) 165 if (mctrl & TIOCM_LOOP)
166 mode |= AT91_US_CHMODE_LOC_LOOP; 166 mode |= ATMEL_US_CHMODE_LOC_LOOP;
167 else 167 else
168 mode |= AT91_US_CHMODE_NORMAL; 168 mode |= ATMEL_US_CHMODE_NORMAL;
169 UART_PUT_MR(port, mode); 169 UART_PUT_MR(port, mode);
170} 170}
171 171
172/* 172/*
173 * Get state of the modem control input lines 173 * Get state of the modem control input lines
174 */ 174 */
175static u_int at91_get_mctrl(struct uart_port *port) 175static u_int atmel_get_mctrl(struct uart_port *port)
176{ 176{
177 unsigned int status, ret = 0; 177 unsigned int status, ret = 0;
178 178
@@ -181,13 +181,13 @@ static u_int at91_get_mctrl(struct uart_port *port)
181 /* 181 /*
182 * The control signals are active low. 182 * The control signals are active low.
183 */ 183 */
184 if (!(status & AT91_US_DCD)) 184 if (!(status & ATMEL_US_DCD))
185 ret |= TIOCM_CD; 185 ret |= TIOCM_CD;
186 if (!(status & AT91_US_CTS)) 186 if (!(status & ATMEL_US_CTS))
187 ret |= TIOCM_CTS; 187 ret |= TIOCM_CTS;
188 if (!(status & AT91_US_DSR)) 188 if (!(status & ATMEL_US_DSR))
189 ret |= TIOCM_DSR; 189 ret |= TIOCM_DSR;
190 if (!(status & AT91_US_RI)) 190 if (!(status & ATMEL_US_RI))
191 ret |= TIOCM_RI; 191 ret |= TIOCM_RI;
192 192
193 return ret; 193 return ret;
@@ -196,62 +196,62 @@ static u_int at91_get_mctrl(struct uart_port *port)
196/* 196/*
197 * Stop transmitting. 197 * Stop transmitting.
198 */ 198 */
199static void at91_stop_tx(struct uart_port *port) 199static void atmel_stop_tx(struct uart_port *port)
200{ 200{
201 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 201 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
202 202
203 UART_PUT_IDR(port, AT91_US_TXRDY); 203 UART_PUT_IDR(port, ATMEL_US_TXRDY);
204} 204}
205 205
206/* 206/*
207 * Start transmitting. 207 * Start transmitting.
208 */ 208 */
209static void at91_start_tx(struct uart_port *port) 209static void atmel_start_tx(struct uart_port *port)
210{ 210{
211 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 211 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
212 212
213 UART_PUT_IER(port, AT91_US_TXRDY); 213 UART_PUT_IER(port, ATMEL_US_TXRDY);
214} 214}
215 215
216/* 216/*
217 * Stop receiving - port is in process of being closed. 217 * Stop receiving - port is in process of being closed.
218 */ 218 */
219static void at91_stop_rx(struct uart_port *port) 219static void atmel_stop_rx(struct uart_port *port)
220{ 220{
221 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 221 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
222 222
223 UART_PUT_IDR(port, AT91_US_RXRDY); 223 UART_PUT_IDR(port, ATMEL_US_RXRDY);
224} 224}
225 225
226/* 226/*
227 * Enable modem status interrupts 227 * Enable modem status interrupts
228 */ 228 */
229static void at91_enable_ms(struct uart_port *port) 229static void atmel_enable_ms(struct uart_port *port)
230{ 230{
231 UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC); 231 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
232} 232}
233 233
234/* 234/*
235 * Control the transmission of a break signal 235 * Control the transmission of a break signal
236 */ 236 */
237static void at91_break_ctl(struct uart_port *port, int break_state) 237static void atmel_break_ctl(struct uart_port *port, int break_state)
238{ 238{
239 if (break_state != 0) 239 if (break_state != 0)
240 UART_PUT_CR(port, AT91_US_STTBRK); /* start break */ 240 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
241 else 241 else
242 UART_PUT_CR(port, AT91_US_STPBRK); /* stop break */ 242 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
243} 243}
244 244
245/* 245/*
246 * Characters received (called from interrupt handler) 246 * Characters received (called from interrupt handler)
247 */ 247 */
248static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs) 248static void atmel_rx_chars(struct uart_port *port, struct pt_regs *regs)
249{ 249{
250 struct tty_struct *tty = port->info->tty; 250 struct tty_struct *tty = port->info->tty;
251 unsigned int status, ch, flg; 251 unsigned int status, ch, flg;
252 252
253 status = UART_GET_CSR(port); 253 status = UART_GET_CSR(port);
254 while (status & AT91_US_RXRDY) { 254 while (status & ATMEL_US_RXRDY) {
255 ch = UART_GET_CHAR(port); 255 ch = UART_GET_CHAR(port);
256 256
257 port->icount.rx++; 257 port->icount.rx++;
@@ -262,35 +262,35 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
262 * note that the error handling code is 262 * note that the error handling code is
263 * out of the main execution path 263 * out of the main execution path
264 */ 264 */
265 if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE | AT91_US_RXBRK))) { 265 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
266 UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */ 266 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
267 if (status & AT91_US_RXBRK) { 267 if (status & ATMEL_US_RXBRK) {
268 status &= ~(AT91_US_PARE | AT91_US_FRAME); /* ignore side-effect */ 268 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
269 port->icount.brk++; 269 port->icount.brk++;
270 if (uart_handle_break(port)) 270 if (uart_handle_break(port))
271 goto ignore_char; 271 goto ignore_char;
272 } 272 }
273 if (status & AT91_US_PARE) 273 if (status & ATMEL_US_PARE)
274 port->icount.parity++; 274 port->icount.parity++;
275 if (status & AT91_US_FRAME) 275 if (status & ATMEL_US_FRAME)
276 port->icount.frame++; 276 port->icount.frame++;
277 if (status & AT91_US_OVRE) 277 if (status & ATMEL_US_OVRE)
278 port->icount.overrun++; 278 port->icount.overrun++;
279 279
280 status &= port->read_status_mask; 280 status &= port->read_status_mask;
281 281
282 if (status & AT91_US_RXBRK) 282 if (status & ATMEL_US_RXBRK)
283 flg = TTY_BREAK; 283 flg = TTY_BREAK;
284 else if (status & AT91_US_PARE) 284 else if (status & ATMEL_US_PARE)
285 flg = TTY_PARITY; 285 flg = TTY_PARITY;
286 else if (status & AT91_US_FRAME) 286 else if (status & ATMEL_US_FRAME)
287 flg = TTY_FRAME; 287 flg = TTY_FRAME;
288 } 288 }
289 289
290 if (uart_handle_sysrq_char(port, ch, regs)) 290 if (uart_handle_sysrq_char(port, ch, regs))
291 goto ignore_char; 291 goto ignore_char;
292 292
293 uart_insert_char(port, status, AT91_US_OVRE, ch, flg); 293 uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
294 294
295 ignore_char: 295 ignore_char:
296 status = UART_GET_CSR(port); 296 status = UART_GET_CSR(port);
@@ -302,7 +302,7 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
302/* 302/*
303 * Transmit characters (called from interrupt handler) 303 * Transmit characters (called from interrupt handler)
304 */ 304 */
305static void at91_tx_chars(struct uart_port *port) 305static void atmel_tx_chars(struct uart_port *port)
306{ 306{
307 struct circ_buf *xmit = &port->info->xmit; 307 struct circ_buf *xmit = &port->info->xmit;
308 308
@@ -313,11 +313,11 @@ static void at91_tx_chars(struct uart_port *port)
313 return; 313 return;
314 } 314 }
315 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 315 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
316 at91_stop_tx(port); 316 atmel_stop_tx(port);
317 return; 317 return;
318 } 318 }
319 319
320 while (UART_GET_CSR(port) & AT91_US_TXRDY) { 320 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
321 UART_PUT_CHAR(port, xmit->buf[xmit->tail]); 321 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
322 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 322 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
323 port->icount.tx++; 323 port->icount.tx++;
@@ -329,40 +329,40 @@ static void at91_tx_chars(struct uart_port *port)
329 uart_write_wakeup(port); 329 uart_write_wakeup(port);
330 330
331 if (uart_circ_empty(xmit)) 331 if (uart_circ_empty(xmit))
332 at91_stop_tx(port); 332 atmel_stop_tx(port);
333} 333}
334 334
335/* 335/*
336 * Interrupt handler 336 * Interrupt handler
337 */ 337 */
338static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs) 338static irqreturn_t atmel_interrupt(int irq, void *dev_id, struct pt_regs *regs)
339{ 339{
340 struct uart_port *port = dev_id; 340 struct uart_port *port = dev_id;
341 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 341 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
342 unsigned int status, pending, pass_counter = 0; 342 unsigned int status, pending, pass_counter = 0;
343 343
344 status = UART_GET_CSR(port); 344 status = UART_GET_CSR(port);
345 pending = status & UART_GET_IMR(port); 345 pending = status & UART_GET_IMR(port);
346 while (pending) { 346 while (pending) {
347 /* Interrupt receive */ 347 /* Interrupt receive */
348 if (pending & AT91_US_RXRDY) 348 if (pending & ATMEL_US_RXRDY)
349 at91_rx_chars(port, regs); 349 atmel_rx_chars(port, regs);
350 350
351 // TODO: All reads to CSR will clear these interrupts! 351 // TODO: All reads to CSR will clear these interrupts!
352 if (pending & AT91_US_RIIC) port->icount.rng++; 352 if (pending & ATMEL_US_RIIC) port->icount.rng++;
353 if (pending & AT91_US_DSRIC) port->icount.dsr++; 353 if (pending & ATMEL_US_DSRIC) port->icount.dsr++;
354 if (pending & AT91_US_DCDIC) 354 if (pending & ATMEL_US_DCDIC)
355 uart_handle_dcd_change(port, !(status & AT91_US_DCD)); 355 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
356 if (pending & AT91_US_CTSIC) 356 if (pending & ATMEL_US_CTSIC)
357 uart_handle_cts_change(port, !(status & AT91_US_CTS)); 357 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
358 if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC)) 358 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
359 wake_up_interruptible(&port->info->delta_msr_wait); 359 wake_up_interruptible(&port->info->delta_msr_wait);
360 360
361 /* Interrupt transmit */ 361 /* Interrupt transmit */
362 if (pending & AT91_US_TXRDY) 362 if (pending & ATMEL_US_TXRDY)
363 at91_tx_chars(port); 363 atmel_tx_chars(port);
364 364
365 if (pass_counter++ > AT91_ISR_PASS_LIMIT) 365 if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
366 break; 366 break;
367 367
368 status = UART_GET_CSR(port); 368 status = UART_GET_CSR(port);
@@ -374,9 +374,9 @@ static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
374/* 374/*
375 * Perform initialization and enable port for reception 375 * Perform initialization and enable port for reception
376 */ 376 */
377static int at91_startup(struct uart_port *port) 377static int atmel_startup(struct uart_port *port)
378{ 378{
379 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 379 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
380 int retval; 380 int retval;
381 381
382 /* 382 /*
@@ -389,9 +389,9 @@ static int at91_startup(struct uart_port *port)
389 /* 389 /*
390 * Allocate the IRQ 390 * Allocate the IRQ
391 */ 391 */
392 retval = request_irq(port->irq, at91_interrupt, IRQF_SHARED, "at91_serial", port); 392 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port);
393 if (retval) { 393 if (retval) {
394 printk("at91_serial: at91_startup - Can't get irq\n"); 394 printk("atmel_serial: atmel_startup - Can't get irq\n");
395 return retval; 395 return retval;
396 } 396 }
397 397
@@ -410,10 +410,10 @@ static int at91_startup(struct uart_port *port)
410 /* 410 /*
411 * Finally, enable the serial port 411 * Finally, enable the serial port
412 */ 412 */
413 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); 413 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
414 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */ 414 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
415 415
416 UART_PUT_IER(port, AT91_US_RXRDY); /* enable receive only */ 416 UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
417 417
418 return 0; 418 return 0;
419} 419}
@@ -421,14 +421,14 @@ static int at91_startup(struct uart_port *port)
421/* 421/*
422 * Disable the port 422 * Disable the port
423 */ 423 */
424static void at91_shutdown(struct uart_port *port) 424static void atmel_shutdown(struct uart_port *port)
425{ 425{
426 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 426 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
427 427
428 /* 428 /*
429 * Disable all interrupts, port and break condition. 429 * Disable all interrupts, port and break condition.
430 */ 430 */
431 UART_PUT_CR(port, AT91_US_RSTSTA); 431 UART_PUT_CR(port, ATMEL_US_RSTSTA);
432 UART_PUT_IDR(port, -1); 432 UART_PUT_IDR(port, -1);
433 433
434 /* 434 /*
@@ -447,9 +447,9 @@ static void at91_shutdown(struct uart_port *port)
447/* 447/*
448 * Power / Clock management. 448 * Power / Clock management.
449 */ 449 */
450static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) 450static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
451{ 451{
452 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 452 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
453 453
454 switch (state) { 454 switch (state) {
455 case 0: 455 case 0:
@@ -457,24 +457,24 @@ static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned
457 * Enable the peripheral clock for this serial port. 457 * Enable the peripheral clock for this serial port.
458 * This is called on uart_open() or a resume event. 458 * This is called on uart_open() or a resume event.
459 */ 459 */
460 clk_enable(at91_port->clk); 460 clk_enable(atmel_port->clk);
461 break; 461 break;
462 case 3: 462 case 3:
463 /* 463 /*
464 * Disable the peripheral clock for this serial port. 464 * Disable the peripheral clock for this serial port.
465 * This is called on uart_close() or a suspend event. 465 * This is called on uart_close() or a suspend event.
466 */ 466 */
467 clk_disable(at91_port->clk); 467 clk_disable(atmel_port->clk);
468 break; 468 break;
469 default: 469 default:
470 printk(KERN_ERR "at91_serial: unknown pm %d\n", state); 470 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
471 } 471 }
472} 472}
473 473
474/* 474/*
475 * Change the port parameters 475 * Change the port parameters
476 */ 476 */
477static void at91_set_termios(struct uart_port *port, struct termios * termios, struct termios * old) 477static void atmel_set_termios(struct uart_port *port, struct termios * termios, struct termios * old)
478{ 478{
479 unsigned long flags; 479 unsigned long flags;
480 unsigned int mode, imr, quot, baud; 480 unsigned int mode, imr, quot, baud;
@@ -483,66 +483,66 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s
483 quot = uart_get_divisor(port, baud); 483 quot = uart_get_divisor(port, baud);
484 484
485 /* Get current mode register */ 485 /* Get current mode register */
486 mode = UART_GET_MR(port) & ~(AT91_US_CHRL | AT91_US_NBSTOP | AT91_US_PAR); 486 mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
487 487
488 /* byte size */ 488 /* byte size */
489 switch (termios->c_cflag & CSIZE) { 489 switch (termios->c_cflag & CSIZE) {
490 case CS5: 490 case CS5:
491 mode |= AT91_US_CHRL_5; 491 mode |= ATMEL_US_CHRL_5;
492 break; 492 break;
493 case CS6: 493 case CS6:
494 mode |= AT91_US_CHRL_6; 494 mode |= ATMEL_US_CHRL_6;
495 break; 495 break;
496 case CS7: 496 case CS7:
497 mode |= AT91_US_CHRL_7; 497 mode |= ATMEL_US_CHRL_7;
498 break; 498 break;
499 default: 499 default:
500 mode |= AT91_US_CHRL_8; 500 mode |= ATMEL_US_CHRL_8;
501 break; 501 break;
502 } 502 }
503 503
504 /* stop bits */ 504 /* stop bits */
505 if (termios->c_cflag & CSTOPB) 505 if (termios->c_cflag & CSTOPB)
506 mode |= AT91_US_NBSTOP_2; 506 mode |= ATMEL_US_NBSTOP_2;
507 507
508 /* parity */ 508 /* parity */
509 if (termios->c_cflag & PARENB) { 509 if (termios->c_cflag & PARENB) {
510 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */ 510 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
511 if (termios->c_cflag & PARODD) 511 if (termios->c_cflag & PARODD)
512 mode |= AT91_US_PAR_MARK; 512 mode |= ATMEL_US_PAR_MARK;
513 else 513 else
514 mode |= AT91_US_PAR_SPACE; 514 mode |= ATMEL_US_PAR_SPACE;
515 } 515 }
516 else if (termios->c_cflag & PARODD) 516 else if (termios->c_cflag & PARODD)
517 mode |= AT91_US_PAR_ODD; 517 mode |= ATMEL_US_PAR_ODD;
518 else 518 else
519 mode |= AT91_US_PAR_EVEN; 519 mode |= ATMEL_US_PAR_EVEN;
520 } 520 }
521 else 521 else
522 mode |= AT91_US_PAR_NONE; 522 mode |= ATMEL_US_PAR_NONE;
523 523
524 spin_lock_irqsave(&port->lock, flags); 524 spin_lock_irqsave(&port->lock, flags);
525 525
526 port->read_status_mask = AT91_US_OVRE; 526 port->read_status_mask = ATMEL_US_OVRE;
527 if (termios->c_iflag & INPCK) 527 if (termios->c_iflag & INPCK)
528 port->read_status_mask |= (AT91_US_FRAME | AT91_US_PARE); 528 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
529 if (termios->c_iflag & (BRKINT | PARMRK)) 529 if (termios->c_iflag & (BRKINT | PARMRK))
530 port->read_status_mask |= AT91_US_RXBRK; 530 port->read_status_mask |= ATMEL_US_RXBRK;
531 531
532 /* 532 /*
533 * Characters to ignore 533 * Characters to ignore
534 */ 534 */
535 port->ignore_status_mask = 0; 535 port->ignore_status_mask = 0;
536 if (termios->c_iflag & IGNPAR) 536 if (termios->c_iflag & IGNPAR)
537 port->ignore_status_mask |= (AT91_US_FRAME | AT91_US_PARE); 537 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
538 if (termios->c_iflag & IGNBRK) { 538 if (termios->c_iflag & IGNBRK) {
539 port->ignore_status_mask |= AT91_US_RXBRK; 539 port->ignore_status_mask |= ATMEL_US_RXBRK;
540 /* 540 /*
541 * If we're ignoring parity and break indicators, 541 * If we're ignoring parity and break indicators,
542 * ignore overruns too (for real raw support). 542 * ignore overruns too (for real raw support).
543 */ 543 */
544 if (termios->c_iflag & IGNPAR) 544 if (termios->c_iflag & IGNPAR)
545 port->ignore_status_mask |= AT91_US_OVRE; 545 port->ignore_status_mask |= ATMEL_US_OVRE;
546 } 546 }
547 547
548 // TODO: Ignore all characters if CREAD is set. 548 // TODO: Ignore all characters if CREAD is set.
@@ -553,18 +553,18 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s
553 /* disable interrupts and drain transmitter */ 553 /* disable interrupts and drain transmitter */
554 imr = UART_GET_IMR(port); /* get interrupt mask */ 554 imr = UART_GET_IMR(port); /* get interrupt mask */
555 UART_PUT_IDR(port, -1); /* disable all interrupts */ 555 UART_PUT_IDR(port, -1); /* disable all interrupts */
556 while (!(UART_GET_CSR(port) & AT91_US_TXEMPTY)) { barrier(); } 556 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); }
557 557
558 /* disable receiver and transmitter */ 558 /* disable receiver and transmitter */
559 UART_PUT_CR(port, AT91_US_TXDIS | AT91_US_RXDIS); 559 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
560 560
561 /* set the parity, stop bits and data size */ 561 /* set the parity, stop bits and data size */
562 UART_PUT_MR(port, mode); 562 UART_PUT_MR(port, mode);
563 563
564 /* set the baud rate */ 564 /* set the baud rate */
565 UART_PUT_BRGR(port, quot); 565 UART_PUT_BRGR(port, quot);
566 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); 566 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
567 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); 567 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
568 568
569 /* restore interrupts */ 569 /* restore interrupts */
570 UART_PUT_IER(port, imr); 570 UART_PUT_IER(port, imr);
@@ -579,15 +579,15 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s
579/* 579/*
580 * Return string describing the specified port 580 * Return string describing the specified port
581 */ 581 */
582static const char *at91_type(struct uart_port *port) 582static const char *atmel_type(struct uart_port *port)
583{ 583{
584 return (port->type == PORT_AT91) ? "AT91_SERIAL" : NULL; 584 return (port->type == PORT_AT91) ? "ATMEL_SERIAL" : NULL;
585} 585}
586 586
587/* 587/*
588 * Release the memory region(s) being used by 'port'. 588 * Release the memory region(s) being used by 'port'.
589 */ 589 */
590static void at91_release_port(struct uart_port *port) 590static void atmel_release_port(struct uart_port *port)
591{ 591{
592 struct platform_device *pdev = to_platform_device(port->dev); 592 struct platform_device *pdev = to_platform_device(port->dev);
593 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 593 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
@@ -603,12 +603,12 @@ static void at91_release_port(struct uart_port *port)
603/* 603/*
604 * Request the memory region(s) being used by 'port'. 604 * Request the memory region(s) being used by 'port'.
605 */ 605 */
606static int at91_request_port(struct uart_port *port) 606static int atmel_request_port(struct uart_port *port)
607{ 607{
608 struct platform_device *pdev = to_platform_device(port->dev); 608 struct platform_device *pdev = to_platform_device(port->dev);
609 int size = pdev->resource[0].end - pdev->resource[0].start + 1; 609 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
610 610
611 if (!request_mem_region(port->mapbase, size, "at91_serial")) 611 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
612 return -EBUSY; 612 return -EBUSY;
613 613
614 if (port->flags & UPF_IOREMAP) { 614 if (port->flags & UPF_IOREMAP) {
@@ -625,18 +625,18 @@ static int at91_request_port(struct uart_port *port)
625/* 625/*
626 * Configure/autoconfigure the port. 626 * Configure/autoconfigure the port.
627 */ 627 */
628static void at91_config_port(struct uart_port *port, int flags) 628static void atmel_config_port(struct uart_port *port, int flags)
629{ 629{
630 if (flags & UART_CONFIG_TYPE) { 630 if (flags & UART_CONFIG_TYPE) {
631 port->type = PORT_AT91; 631 port->type = PORT_AT91;
632 at91_request_port(port); 632 atmel_request_port(port);
633 } 633 }
634} 634}
635 635
636/* 636/*
637 * Verify the new serial_struct (for TIOCSSERIAL). 637 * Verify the new serial_struct (for TIOCSSERIAL).
638 */ 638 */
639static int at91_verify_port(struct uart_port *port, struct serial_struct *ser) 639static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
640{ 640{
641 int ret = 0; 641 int ret = 0;
642 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91) 642 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91)
@@ -656,37 +656,37 @@ static int at91_verify_port(struct uart_port *port, struct serial_struct *ser)
656 return ret; 656 return ret;
657} 657}
658 658
659static struct uart_ops at91_pops = { 659static struct uart_ops atmel_pops = {
660 .tx_empty = at91_tx_empty, 660 .tx_empty = atmel_tx_empty,
661 .set_mctrl = at91_set_mctrl, 661 .set_mctrl = atmel_set_mctrl,
662 .get_mctrl = at91_get_mctrl, 662 .get_mctrl = atmel_get_mctrl,
663 .stop_tx = at91_stop_tx, 663 .stop_tx = atmel_stop_tx,
664 .start_tx = at91_start_tx, 664 .start_tx = atmel_start_tx,
665 .stop_rx = at91_stop_rx, 665 .stop_rx = atmel_stop_rx,
666 .enable_ms = at91_enable_ms, 666 .enable_ms = atmel_enable_ms,
667 .break_ctl = at91_break_ctl, 667 .break_ctl = atmel_break_ctl,
668 .startup = at91_startup, 668 .startup = atmel_startup,
669 .shutdown = at91_shutdown, 669 .shutdown = atmel_shutdown,
670 .set_termios = at91_set_termios, 670 .set_termios = atmel_set_termios,
671 .type = at91_type, 671 .type = atmel_type,
672 .release_port = at91_release_port, 672 .release_port = atmel_release_port,
673 .request_port = at91_request_port, 673 .request_port = atmel_request_port,
674 .config_port = at91_config_port, 674 .config_port = atmel_config_port,
675 .verify_port = at91_verify_port, 675 .verify_port = atmel_verify_port,
676 .pm = at91_serial_pm, 676 .pm = atmel_serial_pm,
677}; 677};
678 678
679/* 679/*
680 * Configure the port from the platform device resource info. 680 * Configure the port from the platform device resource info.
681 */ 681 */
682static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct platform_device *pdev) 682static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev)
683{ 683{
684 struct uart_port *port = &at91_port->uart; 684 struct uart_port *port = &atmel_port->uart;
685 struct atmel_uart_data *data = pdev->dev.platform_data; 685 struct atmel_uart_data *data = pdev->dev.platform_data;
686 686
687 port->iotype = UPIO_MEM; 687 port->iotype = UPIO_MEM;
688 port->flags = UPF_BOOT_AUTOCONF; 688 port->flags = UPF_BOOT_AUTOCONF;
689 port->ops = &at91_pops; 689 port->ops = &atmel_pops;
690 port->fifosize = 1; 690 port->fifosize = 1;
691 port->line = pdev->id; 691 port->line = pdev->id;
692 port->dev = &pdev->dev; 692 port->dev = &pdev->dev;
@@ -701,10 +701,10 @@ static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct pl
701 port->membase = NULL; 701 port->membase = NULL;
702 } 702 }
703 703
704 if (!at91_port->clk) { /* for console, the clock could already be configured */ 704 if (!atmel_port->clk) { /* for console, the clock could already be configured */
705 at91_port->clk = clk_get(&pdev->dev, "usart"); 705 atmel_port->clk = clk_get(&pdev->dev, "usart");
706 clk_enable(at91_port->clk); 706 clk_enable(atmel_port->clk);
707 port->uartclk = clk_get_rate(at91_port->clk); 707 port->uartclk = clk_get_rate(atmel_port->clk);
708 } 708 }
709} 709}
710 710
@@ -714,22 +714,22 @@ static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct pl
714void __init at91_register_uart_fns(struct at91_port_fns *fns) 714void __init at91_register_uart_fns(struct at91_port_fns *fns)
715{ 715{
716 if (fns->enable_ms) 716 if (fns->enable_ms)
717 at91_pops.enable_ms = fns->enable_ms; 717 atmel_pops.enable_ms = fns->enable_ms;
718 if (fns->get_mctrl) 718 if (fns->get_mctrl)
719 at91_pops.get_mctrl = fns->get_mctrl; 719 atmel_pops.get_mctrl = fns->get_mctrl;
720 if (fns->set_mctrl) 720 if (fns->set_mctrl)
721 at91_pops.set_mctrl = fns->set_mctrl; 721 atmel_pops.set_mctrl = fns->set_mctrl;
722 at91_open = fns->open; 722 at91_open = fns->open;
723 at91_close = fns->close; 723 at91_close = fns->close;
724 at91_pops.pm = fns->pm; 724 atmel_pops.pm = fns->pm;
725 at91_pops.set_wake = fns->set_wake; 725 atmel_pops.set_wake = fns->set_wake;
726} 726}
727 727
728 728
729#ifdef CONFIG_SERIAL_ATMEL_CONSOLE 729#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
730static void at91_console_putchar(struct uart_port *port, int ch) 730static void atmel_console_putchar(struct uart_port *port, int ch)
731{ 731{
732 while (!(UART_GET_CSR(port) & AT91_US_TXRDY)) 732 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
733 barrier(); 733 barrier();
734 UART_PUT_CHAR(port, ch); 734 UART_PUT_CHAR(port, ch);
735} 735}
@@ -737,18 +737,18 @@ static void at91_console_putchar(struct uart_port *port, int ch)
737/* 737/*
738 * Interrupts are disabled on entering 738 * Interrupts are disabled on entering
739 */ 739 */
740static void at91_console_write(struct console *co, const char *s, u_int count) 740static void atmel_console_write(struct console *co, const char *s, u_int count)
741{ 741{
742 struct uart_port *port = &at91_ports[co->index].uart; 742 struct uart_port *port = &atmel_ports[co->index].uart;
743 unsigned int status, imr; 743 unsigned int status, imr;
744 744
745 /* 745 /*
746 * First, save IMR and then disable interrupts 746 * First, save IMR and then disable interrupts
747 */ 747 */
748 imr = UART_GET_IMR(port); /* get interrupt mask */ 748 imr = UART_GET_IMR(port); /* get interrupt mask */
749 UART_PUT_IDR(port, AT91_US_RXRDY | AT91_US_TXRDY); 749 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
750 750
751 uart_console_write(port, s, count, at91_console_putchar); 751 uart_console_write(port, s, count, atmel_console_putchar);
752 752
753 /* 753 /*
754 * Finally, wait for transmitter to become empty 754 * Finally, wait for transmitter to become empty
@@ -756,7 +756,7 @@ static void at91_console_write(struct console *co, const char *s, u_int count)
756 */ 756 */
757 do { 757 do {
758 status = UART_GET_CSR(port); 758 status = UART_GET_CSR(port);
759 } while (!(status & AT91_US_TXRDY)); 759 } while (!(status & ATMEL_US_TXRDY));
760 UART_PUT_IER(port, imr); /* set interrupts back the way they were */ 760 UART_PUT_IER(port, imr); /* set interrupts back the way they were */
761} 761}
762 762
@@ -764,37 +764,37 @@ static void at91_console_write(struct console *co, const char *s, u_int count)
764 * If the port was already initialised (eg, by a boot loader), try to determine 764 * If the port was already initialised (eg, by a boot loader), try to determine
765 * the current setup. 765 * the current setup.
766 */ 766 */
767static void __init at91_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits) 767static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
768{ 768{
769 unsigned int mr, quot; 769 unsigned int mr, quot;
770 770
771// TODO: CR is a write-only register 771// TODO: CR is a write-only register
772// unsigned int cr; 772// unsigned int cr;
773// 773//
774// cr = UART_GET_CR(port) & (AT91_US_RXEN | AT91_US_TXEN); 774// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
775// if (cr == (AT91_US_RXEN | AT91_US_TXEN)) { 775// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
776// /* ok, the port was enabled */ 776// /* ok, the port was enabled */
777// } 777// }
778 778
779 mr = UART_GET_MR(port) & AT91_US_CHRL; 779 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
780 if (mr == AT91_US_CHRL_8) 780 if (mr == ATMEL_US_CHRL_8)
781 *bits = 8; 781 *bits = 8;
782 else 782 else
783 *bits = 7; 783 *bits = 7;
784 784
785 mr = UART_GET_MR(port) & AT91_US_PAR; 785 mr = UART_GET_MR(port) & ATMEL_US_PAR;
786 if (mr == AT91_US_PAR_EVEN) 786 if (mr == ATMEL_US_PAR_EVEN)
787 *parity = 'e'; 787 *parity = 'e';
788 else if (mr == AT91_US_PAR_ODD) 788 else if (mr == ATMEL_US_PAR_ODD)
789 *parity = 'o'; 789 *parity = 'o';
790 790
791 quot = UART_GET_BRGR(port); 791 quot = UART_GET_BRGR(port);
792 *baud = port->uartclk / (16 * (quot)); 792 *baud = port->uartclk / (16 * (quot));
793} 793}
794 794
795static int __init at91_console_setup(struct console *co, char *options) 795static int __init atmel_console_setup(struct console *co, char *options)
796{ 796{
797 struct uart_port *port = &at91_ports[co->index].uart; 797 struct uart_port *port = &atmel_ports[co->index].uart;
798 int baud = 115200; 798 int baud = 115200;
799 int bits = 8; 799 int bits = 8;
800 int parity = 'n'; 800 int parity = 'n';
@@ -804,115 +804,115 @@ static int __init at91_console_setup(struct console *co, char *options)
804 return -ENODEV; 804 return -ENODEV;
805 805
806 UART_PUT_IDR(port, -1); /* disable interrupts */ 806 UART_PUT_IDR(port, -1); /* disable interrupts */
807 UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); 807 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
808 UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); 808 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
809 809
810 if (options) 810 if (options)
811 uart_parse_options(options, &baud, &parity, &bits, &flow); 811 uart_parse_options(options, &baud, &parity, &bits, &flow);
812 else 812 else
813 at91_console_get_options(port, &baud, &parity, &bits); 813 atmel_console_get_options(port, &baud, &parity, &bits);
814 814
815 return uart_set_options(port, co, baud, parity, bits, flow); 815 return uart_set_options(port, co, baud, parity, bits, flow);
816} 816}
817 817
818static struct uart_driver at91_uart; 818static struct uart_driver atmel_uart;
819 819
820static struct console at91_console = { 820static struct console atmel_console = {
821 .name = AT91_DEVICENAME, 821 .name = ATMEL_DEVICENAME,
822 .write = at91_console_write, 822 .write = atmel_console_write,
823 .device = uart_console_device, 823 .device = uart_console_device,
824 .setup = at91_console_setup, 824 .setup = atmel_console_setup,
825 .flags = CON_PRINTBUFFER, 825 .flags = CON_PRINTBUFFER,
826 .index = -1, 826 .index = -1,
827 .data = &at91_uart, 827 .data = &atmel_uart,
828}; 828};
829 829
830#define AT91_CONSOLE_DEVICE &at91_console 830#define ATMEL_CONSOLE_DEVICE &atmel_console
831 831
832/* 832/*
833 * Early console initialization (before VM subsystem initialized). 833 * Early console initialization (before VM subsystem initialized).
834 */ 834 */
835static int __init at91_console_init(void) 835static int __init atmel_console_init(void)
836{ 836{
837 if (atmel_default_console_device) { 837 if (atmel_default_console_device) {
838 add_preferred_console(AT91_DEVICENAME, atmel_default_console_device->id, NULL); 838 add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL);
839 at91_init_port(&(at91_ports[atmel_default_console_device->id]), atmel_default_console_device); 839 atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device);
840 register_console(&at91_console); 840 register_console(&atmel_console);
841 } 841 }
842 842
843 return 0; 843 return 0;
844} 844}
845console_initcall(at91_console_init); 845console_initcall(atmel_console_init);
846 846
847/* 847/*
848 * Late console initialization. 848 * Late console initialization.
849 */ 849 */
850static int __init at91_late_console_init(void) 850static int __init atmel_late_console_init(void)
851{ 851{
852 if (atmel_default_console_device && !(at91_console.flags & CON_ENABLED)) 852 if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED))
853 register_console(&at91_console); 853 register_console(&atmel_console);
854 854
855 return 0; 855 return 0;
856} 856}
857core_initcall(at91_late_console_init); 857core_initcall(atmel_late_console_init);
858 858
859#else 859#else
860#define AT91_CONSOLE_DEVICE NULL 860#define ATMEL_CONSOLE_DEVICE NULL
861#endif 861#endif
862 862
863static struct uart_driver at91_uart = { 863static struct uart_driver atmel_uart = {
864 .owner = THIS_MODULE, 864 .owner = THIS_MODULE,
865 .driver_name = "at91_serial", 865 .driver_name = "atmel_serial",
866 .dev_name = AT91_DEVICENAME, 866 .dev_name = ATMEL_DEVICENAME,
867 .major = SERIAL_AT91_MAJOR, 867 .major = SERIAL_ATMEL_MAJOR,
868 .minor = MINOR_START, 868 .minor = MINOR_START,
869 .nr = ATMEL_MAX_UART, 869 .nr = ATMEL_MAX_UART,
870 .cons = AT91_CONSOLE_DEVICE, 870 .cons = ATMEL_CONSOLE_DEVICE,
871}; 871};
872 872
873#ifdef CONFIG_PM 873#ifdef CONFIG_PM
874static int at91_serial_suspend(struct platform_device *pdev, pm_message_t state) 874static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state)
875{ 875{
876 struct uart_port *port = platform_get_drvdata(pdev); 876 struct uart_port *port = platform_get_drvdata(pdev);
877 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 877 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
878 878
879 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock()) 879 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
880 enable_irq_wake(port->irq); 880 enable_irq_wake(port->irq);
881 else { 881 else {
882 disable_irq_wake(port->irq); 882 disable_irq_wake(port->irq);
883 uart_suspend_port(&at91_uart, port); 883 uart_suspend_port(&atmel_uart, port);
884 at91_port->suspended = 1; 884 atmel_port->suspended = 1;
885 } 885 }
886 886
887 return 0; 887 return 0;
888} 888}
889 889
890static int at91_serial_resume(struct platform_device *pdev) 890static int atmel_serial_resume(struct platform_device *pdev)
891{ 891{
892 struct uart_port *port = platform_get_drvdata(pdev); 892 struct uart_port *port = platform_get_drvdata(pdev);
893 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 893 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
894 894
895 if (at91_port->suspended) { 895 if (atmel_port->suspended) {
896 uart_resume_port(&at91_uart, port); 896 uart_resume_port(&atmel_uart, port);
897 at91_port->suspended = 0; 897 atmel_port->suspended = 0;
898 } 898 }
899 899
900 return 0; 900 return 0;
901} 901}
902#else 902#else
903#define at91_serial_suspend NULL 903#define atmel_serial_suspend NULL
904#define at91_serial_resume NULL 904#define atmel_serial_resume NULL
905#endif 905#endif
906 906
907static int __devinit at91_serial_probe(struct platform_device *pdev) 907static int __devinit atmel_serial_probe(struct platform_device *pdev)
908{ 908{
909 struct at91_uart_port *port; 909 struct atmel_uart_port *port;
910 int ret; 910 int ret;
911 911
912 port = &at91_ports[pdev->id]; 912 port = &atmel_ports[pdev->id];
913 at91_init_port(port, pdev); 913 atmel_init_port(port, pdev);
914 914
915 ret = uart_add_one_port(&at91_uart, &port->uart); 915 ret = uart_add_one_port(&atmel_uart, &port->uart);
916 if (!ret) { 916 if (!ret) {
917 device_init_wakeup(&pdev->dev, 1); 917 device_init_wakeup(&pdev->dev, 1);
918 platform_set_drvdata(pdev, port); 918 platform_set_drvdata(pdev, port);
@@ -921,61 +921,61 @@ static int __devinit at91_serial_probe(struct platform_device *pdev)
921 return ret; 921 return ret;
922} 922}
923 923
924static int __devexit at91_serial_remove(struct platform_device *pdev) 924static int __devexit atmel_serial_remove(struct platform_device *pdev)
925{ 925{
926 struct uart_port *port = platform_get_drvdata(pdev); 926 struct uart_port *port = platform_get_drvdata(pdev);
927 struct at91_uart_port *at91_port = (struct at91_uart_port *) port; 927 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
928 int ret = 0; 928 int ret = 0;
929 929
930 clk_disable(at91_port->clk); 930 clk_disable(atmel_port->clk);
931 clk_put(at91_port->clk); 931 clk_put(atmel_port->clk);
932 932
933 device_init_wakeup(&pdev->dev, 0); 933 device_init_wakeup(&pdev->dev, 0);
934 platform_set_drvdata(pdev, NULL); 934 platform_set_drvdata(pdev, NULL);
935 935
936 if (port) { 936 if (port) {
937 ret = uart_remove_one_port(&at91_uart, port); 937 ret = uart_remove_one_port(&atmel_uart, port);
938 kfree(port); 938 kfree(port);
939 } 939 }
940 940
941 return ret; 941 return ret;
942} 942}
943 943
944static struct platform_driver at91_serial_driver = { 944static struct platform_driver atmel_serial_driver = {
945 .probe = at91_serial_probe, 945 .probe = atmel_serial_probe,
946 .remove = __devexit_p(at91_serial_remove), 946 .remove = __devexit_p(atmel_serial_remove),
947 .suspend = at91_serial_suspend, 947 .suspend = atmel_serial_suspend,
948 .resume = at91_serial_resume, 948 .resume = atmel_serial_resume,
949 .driver = { 949 .driver = {
950 .name = "atmel_usart", 950 .name = "atmel_usart",
951 .owner = THIS_MODULE, 951 .owner = THIS_MODULE,
952 }, 952 },
953}; 953};
954 954
955static int __init at91_serial_init(void) 955static int __init atmel_serial_init(void)
956{ 956{
957 int ret; 957 int ret;
958 958
959 ret = uart_register_driver(&at91_uart); 959 ret = uart_register_driver(&atmel_uart);
960 if (ret) 960 if (ret)
961 return ret; 961 return ret;
962 962
963 ret = platform_driver_register(&at91_serial_driver); 963 ret = platform_driver_register(&atmel_serial_driver);
964 if (ret) 964 if (ret)
965 uart_unregister_driver(&at91_uart); 965 uart_unregister_driver(&atmel_uart);
966 966
967 return ret; 967 return ret;
968} 968}
969 969
970static void __exit at91_serial_exit(void) 970static void __exit atmel_serial_exit(void)
971{ 971{
972 platform_driver_unregister(&at91_serial_driver); 972 platform_driver_unregister(&atmel_serial_driver);
973 uart_unregister_driver(&at91_uart); 973 uart_unregister_driver(&atmel_uart);
974} 974}
975 975
976module_init(at91_serial_init); 976module_init(atmel_serial_init);
977module_exit(at91_serial_exit); 977module_exit(atmel_serial_exit);
978 978
979MODULE_AUTHOR("Rick Bronson"); 979MODULE_AUTHOR("Rick Bronson");
980MODULE_DESCRIPTION("AT91 generic serial port driver"); 980MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
981MODULE_LICENSE("GPL"); 981MODULE_LICENSE("GPL");
diff --git a/drivers/serial/atmel_serial.h b/drivers/serial/atmel_serial.h
index d38b24a53375..eced2ad1a8d9 100644
--- a/drivers/serial/atmel_serial.h
+++ b/drivers/serial/atmel_serial.h
@@ -13,111 +13,111 @@
13 * (at your option) any later version. 13 * (at your option) any later version.
14 */ 14 */
15 15
16#ifndef AT91RM9200_USART_H 16#ifndef ATMEL_SERIAL_H
17#define AT91RM9200_USART_H 17#define ATMEL_SERIAL_H
18 18
19#define AT91_US_CR 0x00 /* Control Register */ 19#define ATMEL_US_CR 0x00 /* Control Register */
20#define AT91_US_RSTRX (1 << 2) /* Reset Receiver */ 20#define ATMEL_US_RSTRX (1 << 2) /* Reset Receiver */
21#define AT91_US_RSTTX (1 << 3) /* Reset Transmitter */ 21#define ATMEL_US_RSTTX (1 << 3) /* Reset Transmitter */
22#define AT91_US_RXEN (1 << 4) /* Receiver Enable */ 22#define ATMEL_US_RXEN (1 << 4) /* Receiver Enable */
23#define AT91_US_RXDIS (1 << 5) /* Receiver Disable */ 23#define ATMEL_US_RXDIS (1 << 5) /* Receiver Disable */
24#define AT91_US_TXEN (1 << 6) /* Transmitter Enable */ 24#define ATMEL_US_TXEN (1 << 6) /* Transmitter Enable */
25#define AT91_US_TXDIS (1 << 7) /* Transmitter Disable */ 25#define ATMEL_US_TXDIS (1 << 7) /* Transmitter Disable */
26#define AT91_US_RSTSTA (1 << 8) /* Reset Status Bits */ 26#define ATMEL_US_RSTSTA (1 << 8) /* Reset Status Bits */
27#define AT91_US_STTBRK (1 << 9) /* Start Break */ 27#define ATMEL_US_STTBRK (1 << 9) /* Start Break */
28#define AT91_US_STPBRK (1 << 10) /* Stop Break */ 28#define ATMEL_US_STPBRK (1 << 10) /* Stop Break */
29#define AT91_US_STTTO (1 << 11) /* Start Time-out */ 29#define ATMEL_US_STTTO (1 << 11) /* Start Time-out */
30#define AT91_US_SENDA (1 << 12) /* Send Address */ 30#define ATMEL_US_SENDA (1 << 12) /* Send Address */
31#define AT91_US_RSTIT (1 << 13) /* Reset Iterations */ 31#define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */
32#define AT91_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */ 32#define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */
33#define AT91_US_RETTO (1 << 15) /* Rearm Time-out */ 33#define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */
34#define AT91_US_DTREN (1 << 16) /* Data Terminal Ready Enable */ 34#define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable */
35#define AT91_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable */ 35#define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable */
36#define AT91_US_RTSEN (1 << 18) /* Request To Send Enable */ 36#define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */
37#define AT91_US_RTSDIS (1 << 19) /* Request To Send Disable */ 37#define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */
38 38
39#define AT91_US_MR 0x04 /* Mode Register */ 39#define ATMEL_US_MR 0x04 /* Mode Register */
40#define AT91_US_USMODE (0xf << 0) /* Mode of the USART */ 40#define ATMEL_US_USMODE (0xf << 0) /* Mode of the USART */
41#define AT91_US_USMODE_NORMAL 0 41#define ATMEL_US_USMODE_NORMAL 0
42#define AT91_US_USMODE_RS485 1 42#define ATMEL_US_USMODE_RS485 1
43#define AT91_US_USMODE_HWHS 2 43#define ATMEL_US_USMODE_HWHS 2
44#define AT91_US_USMODE_MODEM 3 44#define ATMEL_US_USMODE_MODEM 3
45#define AT91_US_USMODE_ISO7816_T0 4 45#define ATMEL_US_USMODE_ISO7816_T0 4
46#define AT91_US_USMODE_ISO7816_T1 6 46#define ATMEL_US_USMODE_ISO7816_T1 6
47#define AT91_US_USMODE_IRDA 8 47#define ATMEL_US_USMODE_IRDA 8
48#define AT91_US_USCLKS (3 << 4) /* Clock Selection */ 48#define ATMEL_US_USCLKS (3 << 4) /* Clock Selection */
49#define AT91_US_CHRL (3 << 6) /* Character Length */ 49#define ATMEL_US_CHRL (3 << 6) /* Character Length */
50#define AT91_US_CHRL_5 (0 << 6) 50#define ATMEL_US_CHRL_5 (0 << 6)
51#define AT91_US_CHRL_6 (1 << 6) 51#define ATMEL_US_CHRL_6 (1 << 6)
52#define AT91_US_CHRL_7 (2 << 6) 52#define ATMEL_US_CHRL_7 (2 << 6)
53#define AT91_US_CHRL_8 (3 << 6) 53#define ATMEL_US_CHRL_8 (3 << 6)
54#define AT91_US_SYNC (1 << 8) /* Synchronous Mode Select */ 54#define ATMEL_US_SYNC (1 << 8) /* Synchronous Mode Select */
55#define AT91_US_PAR (7 << 9) /* Parity Type */ 55#define ATMEL_US_PAR (7 << 9) /* Parity Type */
56#define AT91_US_PAR_EVEN (0 << 9) 56#define ATMEL_US_PAR_EVEN (0 << 9)
57#define AT91_US_PAR_ODD (1 << 9) 57#define ATMEL_US_PAR_ODD (1 << 9)
58#define AT91_US_PAR_SPACE (2 << 9) 58#define ATMEL_US_PAR_SPACE (2 << 9)
59#define AT91_US_PAR_MARK (3 << 9) 59#define ATMEL_US_PAR_MARK (3 << 9)
60#define AT91_US_PAR_NONE (4 << 9) 60#define ATMEL_US_PAR_NONE (4 << 9)
61#define AT91_US_PAR_MULTI_DROP (6 << 9) 61#define ATMEL_US_PAR_MULTI_DROP (6 << 9)
62#define AT91_US_NBSTOP (3 << 12) /* Number of Stop Bits */ 62#define ATMEL_US_NBSTOP (3 << 12) /* Number of Stop Bits */
63#define AT91_US_NBSTOP_1 (0 << 12) 63#define ATMEL_US_NBSTOP_1 (0 << 12)
64#define AT91_US_NBSTOP_1_5 (1 << 12) 64#define ATMEL_US_NBSTOP_1_5 (1 << 12)
65#define AT91_US_NBSTOP_2 (2 << 12) 65#define ATMEL_US_NBSTOP_2 (2 << 12)
66#define AT91_US_CHMODE (3 << 14) /* Channel Mode */ 66#define ATMEL_US_CHMODE (3 << 14) /* Channel Mode */
67#define AT91_US_CHMODE_NORMAL (0 << 14) 67#define ATMEL_US_CHMODE_NORMAL (0 << 14)
68#define AT91_US_CHMODE_ECHO (1 << 14) 68#define ATMEL_US_CHMODE_ECHO (1 << 14)
69#define AT91_US_CHMODE_LOC_LOOP (2 << 14) 69#define ATMEL_US_CHMODE_LOC_LOOP (2 << 14)
70#define AT91_US_CHMODE_REM_LOOP (3 << 14) 70#define ATMEL_US_CHMODE_REM_LOOP (3 << 14)
71#define AT91_US_MSBF (1 << 16) /* Bit Order */ 71#define ATMEL_US_MSBF (1 << 16) /* Bit Order */
72#define AT91_US_MODE9 (1 << 17) /* 9-bit Character Length */ 72#define ATMEL_US_MODE9 (1 << 17) /* 9-bit Character Length */
73#define AT91_US_CLKO (1 << 18) /* Clock Output Select */ 73#define ATMEL_US_CLKO (1 << 18) /* Clock Output Select */
74#define AT91_US_OVER (1 << 19) /* Oversampling Mode */ 74#define ATMEL_US_OVER (1 << 19) /* Oversampling Mode */
75#define AT91_US_INACK (1 << 20) /* Inhibit Non Acknowledge */ 75#define ATMEL_US_INACK (1 << 20) /* Inhibit Non Acknowledge */
76#define AT91_US_DSNACK (1 << 21) /* Disable Successive NACK */ 76#define ATMEL_US_DSNACK (1 << 21) /* Disable Successive NACK */
77#define AT91_US_MAX_ITER (7 << 24) /* Max Iterations */ 77#define ATMEL_US_MAX_ITER (7 << 24) /* Max Iterations */
78#define AT91_US_FILTER (1 << 28) /* Infrared Receive Line Filter */ 78#define ATMEL_US_FILTER (1 << 28) /* Infrared Receive Line Filter */
79 79
80#define AT91_US_IER 0x08 /* Interrupt Enable Register */ 80#define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
81#define AT91_US_RXRDY (1 << 0) /* Receiver Ready */ 81#define ATMEL_US_RXRDY (1 << 0) /* Receiver Ready */
82#define AT91_US_TXRDY (1 << 1) /* Transmitter Ready */ 82#define ATMEL_US_TXRDY (1 << 1) /* Transmitter Ready */
83#define AT91_US_RXBRK (1 << 2) /* Break Received / End of Break */ 83#define ATMEL_US_RXBRK (1 << 2) /* Break Received / End of Break */
84#define AT91_US_ENDRX (1 << 3) /* End of Receiver Transfer */ 84#define ATMEL_US_ENDRX (1 << 3) /* End of Receiver Transfer */
85#define AT91_US_ENDTX (1 << 4) /* End of Transmitter Transfer */ 85#define ATMEL_US_ENDTX (1 << 4) /* End of Transmitter Transfer */
86#define AT91_US_OVRE (1 << 5) /* Overrun Error */ 86#define ATMEL_US_OVRE (1 << 5) /* Overrun Error */
87#define AT91_US_FRAME (1 << 6) /* Framing Error */ 87#define ATMEL_US_FRAME (1 << 6) /* Framing Error */
88#define AT91_US_PARE (1 << 7) /* Parity Error */ 88#define ATMEL_US_PARE (1 << 7) /* Parity Error */
89#define AT91_US_TIMEOUT (1 << 8) /* Receiver Time-out */ 89#define ATMEL_US_TIMEOUT (1 << 8) /* Receiver Time-out */
90#define AT91_US_TXEMPTY (1 << 9) /* Transmitter Empty */ 90#define ATMEL_US_TXEMPTY (1 << 9) /* Transmitter Empty */
91#define AT91_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */ 91#define ATMEL_US_ITERATION (1 << 10) /* Max number of Repetitions Reached */
92#define AT91_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */ 92#define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */
93#define AT91_US_RXBUFF (1 << 12) /* Reception Buffer Full */ 93#define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */
94#define AT91_US_NACK (1 << 13) /* Non Acknowledge */ 94#define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */
95#define AT91_US_RIIC (1 << 16) /* Ring Indicator Input Change */ 95#define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change */
96#define AT91_US_DSRIC (1 << 17) /* Data Set Ready Input Change */ 96#define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change */
97#define AT91_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change */ 97#define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change */
98#define AT91_US_CTSIC (1 << 19) /* Clear to Send Input Change */ 98#define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */
99#define AT91_US_RI (1 << 20) /* RI */ 99#define ATMEL_US_RI (1 << 20) /* RI */
100#define AT91_US_DSR (1 << 21) /* DSR */ 100#define ATMEL_US_DSR (1 << 21) /* DSR */
101#define AT91_US_DCD (1 << 22) /* DCD */ 101#define ATMEL_US_DCD (1 << 22) /* DCD */
102#define AT91_US_CTS (1 << 23) /* CTS */ 102#define ATMEL_US_CTS (1 << 23) /* CTS */
103 103
104#define AT91_US_IDR 0x0c /* Interrupt Disable Register */ 104#define ATMEL_US_IDR 0x0c /* Interrupt Disable Register */
105#define AT91_US_IMR 0x10 /* Interrupt Mask Register */ 105#define ATMEL_US_IMR 0x10 /* Interrupt Mask Register */
106#define AT91_US_CSR 0x14 /* Channel Status Register */ 106#define ATMEL_US_CSR 0x14 /* Channel Status Register */
107#define AT91_US_RHR 0x18 /* Receiver Holding Register */ 107#define ATMEL_US_RHR 0x18 /* Receiver Holding Register */
108#define AT91_US_THR 0x1c /* Transmitter Holding Register */ 108#define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
109 109
110#define AT91_US_BRGR 0x20 /* Baud Rate Generator Register */ 110#define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */
111#define AT91_US_CD (0xffff << 0) /* Clock Divider */ 111#define ATMEL_US_CD (0xffff << 0) /* Clock Divider */
112 112
113#define AT91_US_RTOR 0x24 /* Receiver Time-out Register */ 113#define ATMEL_US_RTOR 0x24 /* Receiver Time-out Register */
114#define AT91_US_TO (0xffff << 0) /* Time-out Value */ 114#define ATMEL_US_TO (0xffff << 0) /* Time-out Value */
115 115
116#define AT91_US_TTGR 0x28 /* Transmitter Timeguard Register */ 116#define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
117#define AT91_US_TG (0xff << 0) /* Timeguard Value */ 117#define ATMEL_US_TG (0xff << 0) /* Timeguard Value */
118 118
119#define AT91_US_FIDI 0x40 /* FI DI Ratio Register */ 119#define ATMEL_US_FIDI 0x40 /* FI DI Ratio Register */
120#define AT91_US_NER 0x44 /* Number of Errors Register */ 120#define ATMEL_US_NER 0x44 /* Number of Errors Register */
121#define AT91_US_IF 0x4c /* IrDA Filter Register */ 121#define ATMEL_US_IF 0x4c /* IrDA Filter Register */
122 122
123#endif 123#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 22:39:07 -0500