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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-11-09 18:25:29 -0500 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-11-09 18:25:29 -0500 |
commit | a80b824f0b63fa3a8c269903828beb0837d738e7 (patch) | |
tree | 9aca1a187bd1509f5c701a023733defbb8482431 /drivers/serial | |
parent | 45ff993d2b0b4c07038457cdf07ecf648abd3d78 (diff) | |
parent | 06e5fda18491b5ab3419bddc36f3de5b4f7142a9 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (26 commits)
sh: remove dead config symbols from SH code
sh: Kill off broken snapgear ds1302 code.
sh: Add a dummy vga.h.
rtc: rtc-sh: Zero out tm value for invalid rtc states.
rtc: sh-rtc: Handle rtc_device_register() failure properly.
sh: Fix heartbeart on Solution Engine series
sh: Remove SCI_NPORTS from sh-sci.h
sh: Fix up PAGE_KERNEL_PCC() for nommu.
sh: hs7751rvoip: Kill off dead IPR IRQ mappings.
sh: hs7751rvoip: irq.c needs linux/interrupt.h.
sh: Kill off __{copy,clear}_user_page().
sh: Optimized copy_{to,from}_user_page() for SH-4.
sh: Wire up clear_user_highpage().
sh: Kill off the remaining ST40 cruft.
superhyway: Handle device_register() retval properly.
sh: kgdb sysrq depends on magic sysrq.
sh: Add -Werror for clean directories.
sh: Fix up kgdb build with modular sh-sci.
sh: Export __{s,u}divsi3_i4i on all CPUs.
sh: Fix up kgdb-on-NMI branch target.
...
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/sh-sci.h | 19 |
1 files changed, 1 insertions, 18 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index e89ae29645d6..d24621ce799a 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -77,7 +77,6 @@ | |||
77 | # define SCIF_ONLY | 77 | # define SCIF_ONLY |
78 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 78 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
79 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ | 79 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ |
80 | # define SCI_NPORTS 2 | ||
81 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 80 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
82 | # define PACR 0xa4050100 | 81 | # define PACR 0xa4050100 |
83 | # define PBCR 0xa4050102 | 82 | # define PBCR 0xa4050102 |
@@ -102,12 +101,6 @@ | |||
102 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 101 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
103 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 102 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
104 | # define SCIF_ONLY | 103 | # define SCIF_ONLY |
105 | #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) | ||
106 | # define SCSPTR1 0xffe00020 /* 16 bit SCIF */ | ||
107 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ | ||
108 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
109 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | ||
110 | # define SCIF_ONLY | ||
111 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 104 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
112 | # include <asm/hardware.h> | 105 | # include <asm/hardware.h> |
113 | # define SCIF_BASE_ADDR 0x01030000 | 106 | # define SCIF_BASE_ADDR 0x01030000 |
@@ -116,8 +109,7 @@ | |||
116 | # define SCIF_LSR2_OFFS 0x0000024 | 109 | # define SCIF_LSR2_OFFS 0x0000024 |
117 | # define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */ | 110 | # define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */ |
118 | # define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */ | 111 | # define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */ |
119 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, | 112 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, TE=1,RE=1,REIE=1 */ |
120 | TE=1,RE=1,REIE=1 */ | ||
121 | # define SCIF_ONLY | 113 | # define SCIF_ONLY |
122 | #elif defined(CONFIG_H83007) || defined(CONFIG_H83068) | 114 | #elif defined(CONFIG_H83007) || defined(CONFIG_H83068) |
123 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ | 115 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ |
@@ -577,15 +569,6 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
577 | return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ | 569 | return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ |
578 | return 1; | 570 | return 1; |
579 | } | 571 | } |
580 | #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) | ||
581 | static inline int sci_rxd_in(struct uart_port *port) | ||
582 | { | ||
583 | if (port->mapbase == 0xffe00000) | ||
584 | return ctrl_inw(SCSPTR1)&0x0001 ? 1 : 0; /* SCIF */ | ||
585 | else | ||
586 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | ||
587 | |||
588 | } | ||
589 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 572 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
590 | static inline int sci_rxd_in(struct uart_port *port) | 573 | static inline int sci_rxd_in(struct uart_port *port) |
591 | { | 574 | { |