Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6

Conflicts:

	arch/sparc64/kernel/pci_psycho.c

4 files changed, 36 insertions, 10 deletions

diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 342e12fb1c25..9ccc563d8730 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1908,15 +1908,23 @@ static int serial8250_startup(struct uart_port *port)
                  * kick the UART on a regular basis.
                  */
                 if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
+                        up->bugs |= UART_BUG_THRE;
                         pr_debug("ttyS%d - using backup timer\n", port->line);
-                        up->timer.function = serial8250_backup_timeout;
-                        up->timer.data = (unsigned long)up;
-                        mod_timer(&up->timer, jiffies +
-                                poll_timeout(up->port.timeout) + HZ / 5);
                 }
         }
 
         /*
+         * The above check will only give an accurate result the first time
+         * the port is opened so this value needs to be preserved.
+         */
+        if (up->bugs & UART_BUG_THRE) {
+                up->timer.function = serial8250_backup_timeout;
+                up->timer.data = (unsigned long)up;
+                mod_timer(&up->timer, jiffies +
+                          poll_timeout(up->port.timeout) + HZ / 5);
+        }
+
+        /*
          * If the "interrupt" for this port doesn't correspond with any
          * hardware interrupt, we use a timer-based system.  The original
          * driver used to do this with IRQ0.
diff --git a/drivers/serial/8250.h b/drivers/serial/8250.h
index 78c00162b04e..520260326f3d 100644
--- a/drivers/serial/8250.h
+++ b/drivers/serial/8250.h
@@ -47,6 +47,7 @@ struct serial8250_config {
 #define UART_BUG_QUOT   (1 << 0)        /* UART has buggy quot LSB */
 #define UART_BUG_TXEN   (1 << 1)        /* UART has buggy TX IIR status */
 #define UART_BUG_NOMSR  (1 << 2)        /* UART has buggy MSR status bits (Au1x00) */
+#define UART_BUG_THRE   (1 << 3)        /* UART has buggy THRE reassertion */
 
 #define PROBE_RSA       (1 << 0)
 #define PROBE_ANY       (~0)
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index efcd44344fb1..4a0d30bed9f1 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -28,7 +28,7 @@
 #endif
 
 #include <asm/gpio.h>
-#include <asm/mach/bfin_serial_5xx.h>
+#include <mach/bfin_serial_5xx.h>
 
 #ifdef CONFIG_SERIAL_BFIN_DMA
 #include <linux/dma-mapping.h>
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 6a29f9330a73..3f90f1bbbbcd 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -127,8 +127,13 @@
 #define  UCR3_RXDSEN     (1<<6)  /* Receive status interrupt enable */
 #define  UCR3_AIRINTEN   (1<<5)  /* Async IR wake interrupt enable */
 #define  UCR3_AWAKEN     (1<<4)  /* Async wake interrupt enable */
-#define  UCR3_REF25      (1<<3)  /* Ref freq 25 MHz */
-#define  UCR3_REF30      (1<<2)  /* Ref Freq 30 MHz */
+#ifdef CONFIG_ARCH_IMX
+#define  UCR3_REF25      (1<<3)  /* Ref freq 25 MHz, only on mx1 */
+#define  UCR3_REF30      (1<<2)  /* Ref Freq 30 MHz, only on mx1 */
+#endif
+#if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3
+#define  UCR3_RXDMUXSEL  (1<<2)  /* RXD Muxed Input Select, on mx2/mx3 */
+#endif
 #define  UCR3_INVT       (1<<1)  /* Inverted Infrared transmission */
 #define  UCR3_BPEN       (1<<0)  /* Preset registers enable */
 #define  UCR4_CTSTL_32   (32<<10) /* CTS trigger level (32 chars) */
@@ -445,7 +450,7 @@ static irqreturn_t imx_int(int irq, void *dev_id)
                         readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN)
                 imx_txint(irq, dev_id);
 
-        if (sts & USR1_RTSS)
+        if (sts & USR1_RTSD)
                 imx_rtsint(irq, dev_id);
 
         return IRQ_HANDLED;
@@ -598,6 +603,12 @@ static int imx_startup(struct uart_port *port)
         temp |= (UCR2_RXEN | UCR2_TXEN);
         writel(temp, sport->port.membase + UCR2);
 
+#if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3
+        temp = readl(sport->port.membase + UCR3);
+        temp |= UCR3_RXDMUXSEL;
+        writel(temp, sport->port.membase + UCR3);
+#endif
+
         /*
          * Enable modem status interrupts
          */
@@ -1133,13 +1144,19 @@ static int serial_imx_probe(struct platform_device *pdev)
         if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS))
                 sport->have_rtscts = 1;
 
-        if (pdata->init)
-                pdata->init(pdev);
+        if (pdata->init) {
+                ret = pdata->init(pdev);
+                if (ret)
+                        goto clkput;
+        }
 
         uart_add_one_port(&imx_reg, &sport->port);
         platform_set_drvdata(pdev, &sport->port);
 
         return 0;
+clkput:
+        clk_put(sport->clk);
+        clk_disable(sport->clk);
 unmap:
         iounmap(sport->port.membase);
 free: