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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2005-06-23 05:43:04 -0400
committerRussell King <rmk@dyn-67.arm.linux.org.uk>2005-06-23 05:43:04 -0400
commit4ba5e35daa90871fcb9b01f5ad1e5723343cc0a9 (patch)
tree26c52f5ff50c54f210c53e986f565c6f29409ca1 /drivers/serial
parentb7c84c6ada2be942eca6722edb2cfaad412cd5de (diff)
[PATCH] Serial: Convert 8250 revision-based bug fixes to bug bitmask
For some 8250 port types, we used to check the type of the port, and then determine whether the chip revision means the device is buggy. Instead, introduce a bit array, and set the appropriate bit(s) when we discover a buggy device. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/8250.c23
-rw-r--r--drivers/serial/8250.h2
2 files changed, 15 insertions, 10 deletions
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 30e8beb71430..27cc288e91d0 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -132,9 +132,9 @@ struct uart_8250_port {
132 struct uart_port port; 132 struct uart_port port;
133 struct timer_list timer; /* "no irq" timer */ 133 struct timer_list timer; /* "no irq" timer */
134 struct list_head list; /* ports on this IRQ */ 134 struct list_head list; /* ports on this IRQ */
135 unsigned int capabilities; /* port capabilities */ 135 unsigned short capabilities; /* port capabilities */
136 unsigned short bugs; /* port bugs */
136 unsigned int tx_loadsz; /* transmit fifo load size */ 137 unsigned int tx_loadsz; /* transmit fifo load size */
137 unsigned short rev;
138 unsigned char acr; 138 unsigned char acr;
139 unsigned char ier; 139 unsigned char ier;
140 unsigned char lcr; 140 unsigned char lcr;
@@ -560,7 +560,14 @@ static void autoconfig_has_efr(struct uart_8250_port *up)
560 if (id1 == 0x16 && id2 == 0xC9 && 560 if (id1 == 0x16 && id2 == 0xC9 &&
561 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) { 561 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
562 up->port.type = PORT_16C950; 562 up->port.type = PORT_16C950;
563 up->rev = rev | (id3 << 8); 563
564 /*
565 * Enable work around for the Oxford Semiconductor 952 rev B
566 * chip which causes it to seriously miscalculate baud rates
567 * when DLL is 0.
568 */
569 if (id3 == 0x52 && rev == 0x01)
570 up->bugs |= UART_BUG_QUOT;
564 return; 571 return;
565 } 572 }
566 573
@@ -577,8 +584,6 @@ static void autoconfig_has_efr(struct uart_8250_port *up)
577 584
578 id2 = id1 >> 8; 585 id2 = id1 >> 8;
579 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) { 586 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
580 if (id2 == 0x10)
581 up->rev = id1 & 255;
582 up->port.type = PORT_16850; 587 up->port.type = PORT_16850;
583 return; 588 return;
584 } 589 }
@@ -809,6 +814,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
809// save_flags(flags); cli(); 814// save_flags(flags); cli();
810 815
811 up->capabilities = 0; 816 up->capabilities = 0;
817 up->bugs = 0;
812 818
813 if (!(up->port.flags & UPF_BUGGY_UART)) { 819 if (!(up->port.flags & UPF_BUGGY_UART)) {
814 /* 820 /*
@@ -1677,12 +1683,9 @@ serial8250_set_termios(struct uart_port *port, struct termios *termios,
1677 quot = serial8250_get_divisor(port, baud); 1683 quot = serial8250_get_divisor(port, baud);
1678 1684
1679 /* 1685 /*
1680 * Work around a bug in the Oxford Semiconductor 952 rev B 1686 * Oxford Semi 952 rev B workaround
1681 * chip which causes it to seriously miscalculate baud rates
1682 * when DLL is 0.
1683 */ 1687 */
1684 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 && 1688 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
1685 up->rev == 0x5201)
1686 quot ++; 1689 quot ++;
1687 1690
1688 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) { 1691 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
diff --git a/drivers/serial/8250.h b/drivers/serial/8250.h
index 4f3d62f222f4..cd5c3dd2d910 100644
--- a/drivers/serial/8250.h
+++ b/drivers/serial/8250.h
@@ -51,6 +51,8 @@ struct serial8250_config {
51#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */ 51#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
52#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */ 52#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
53 53
54#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
55
54#if defined(__i386__) && (defined(CONFIG_M386) || defined(CONFIG_M486)) 56#if defined(__i386__) && (defined(CONFIG_M386) || defined(CONFIG_M486))
55#define _INLINE_ inline 57#define _INLINE_ inline
56#else 58#else