diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-20 20:52:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-20 20:52:36 -0400 |
commit | 050335db2a777ffaa859d77beb05fffe9e8c5ae9 (patch) | |
tree | 6f1fb3e3477de613b4adac8c46bd6e86301ed8ae /drivers/serial | |
parent | a4cfae13cef6a700a04b13ba1d819c0641b1b26f (diff) | |
parent | 905f14672e6d0552bfde954d5f7adb5f2c7a7960 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (42 commits)
[ARM] Fix tosa build error
[ARM] 3610/1: Make reboot work on Versatile
[ARM] 3609/1: S3C24XX: defconfig update for s3c2410_defconfig
[ARM] 3591/1: Anubis: IDE device definitions
[ARM] Include asm/hardware.h not asm/arch/hardware.h
[ARM] 3594/1: Poodle: Add touchscreen support + other updates
[ARM] 3564/1: sharpsl_pm: Abstract some machine specific parameters
[ARM] 3561/1: Poodle: Correct the MMC/SD power control
[ARM] 3593/1: Add reboot and shutdown handlers for Zaurus handhelds
[ARM] 3599/1: AT91RM9200 remove global variables
[ARM] 3607/1: AT91RM9200 misc fixes
[ARM] 3605/1: AT91RM9200 Power Management
[ARM] 3604/1: AT91RM9200 New boards
[ARM] 3603/1: AT91RM9200 remove old files
[ARM] 3592/1: AT91RM9200 Serial driver update
[ARM] 3590/1: AT91RM9200 Platform devices support
[ARM] 3589/1: AT91RM9200 DK/EK board update
[ARM] 3588/1: AT91RM9200 CSB337/637 board update
[ARM] 3587/1: AT91RM9200 hardware headers
[ARM] 3586/1: AT91RM9200 header update
...
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Kconfig | 17 | ||||
-rw-r--r-- | drivers/serial/at91_serial.c | 463 |
2 files changed, 289 insertions, 191 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 7d22dc0478d3..5ea778fc1caa 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -300,21 +300,22 @@ config SERIAL_AMBA_PL011_CONSOLE | |||
300 | kernel at boot time.) | 300 | kernel at boot time.) |
301 | 301 | ||
302 | config SERIAL_AT91 | 302 | config SERIAL_AT91 |
303 | bool "AT91RM9200 serial port support" | 303 | bool "AT91RM9200 / AT91SAM9261 serial port support" |
304 | depends on ARM && ARCH_AT91RM9200 | 304 | depends on ARM && (ARCH_AT91RM9200 || ARCH_AT91SAM9261) |
305 | select SERIAL_CORE | 305 | select SERIAL_CORE |
306 | help | 306 | help |
307 | This enables the driver for the on-chip UARTs of the AT91RM9200 | 307 | This enables the driver for the on-chip UARTs of the Atmel |
308 | processor. | 308 | AT91RM9200 and AT91SAM926 processor. |
309 | 309 | ||
310 | config SERIAL_AT91_CONSOLE | 310 | config SERIAL_AT91_CONSOLE |
311 | bool "Support for console on AT91RM9200 serial port" | 311 | bool "Support for console on AT91RM9200 / AT91SAM9261 serial port" |
312 | depends on SERIAL_AT91=y | 312 | depends on SERIAL_AT91=y |
313 | select SERIAL_CORE_CONSOLE | 313 | select SERIAL_CORE_CONSOLE |
314 | help | 314 | help |
315 | Say Y here if you wish to use a UART on the AT91RM9200 as the system | 315 | Say Y here if you wish to use a UART on the Atmel AT91RM9200 or |
316 | console (the system console is the device which receives all kernel | 316 | AT91SAM9261 as the system console (the system console is the device |
317 | messages and warnings and which allows logins in single user mode). | 317 | which receives all kernel messages and warnings and which allows |
318 | logins in single user mode). | ||
318 | 319 | ||
319 | config SERIAL_AT91_TTYAT | 320 | config SERIAL_AT91_TTYAT |
320 | bool "Install as device ttyAT0-4 instead of ttyS0-4" | 321 | bool "Install as device ttyAT0-4 instead of ttyS0-4" |
diff --git a/drivers/serial/at91_serial.c b/drivers/serial/at91_serial.c index 6547fe0cef96..db5b25fafed4 100644 --- a/drivers/serial/at91_serial.c +++ b/drivers/serial/at91_serial.c | |||
@@ -2,7 +2,6 @@ | |||
2 | * linux/drivers/char/at91_serial.c | 2 | * linux/drivers/char/at91_serial.c |
3 | * | 3 | * |
4 | * Driver for Atmel AT91RM9200 Serial ports | 4 | * Driver for Atmel AT91RM9200 Serial ports |
5 | * | ||
6 | * Copyright (C) 2003 Rick Bronson | 5 | * Copyright (C) 2003 Rick Bronson |
7 | * | 6 | * |
8 | * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. | 7 | * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. |
@@ -30,17 +29,19 @@ | |||
30 | #include <linux/slab.h> | 29 | #include <linux/slab.h> |
31 | #include <linux/init.h> | 30 | #include <linux/init.h> |
32 | #include <linux/serial.h> | 31 | #include <linux/serial.h> |
32 | #include <linux/clk.h> | ||
33 | #include <linux/console.h> | 33 | #include <linux/console.h> |
34 | #include <linux/sysrq.h> | 34 | #include <linux/sysrq.h> |
35 | #include <linux/tty_flip.h> | 35 | #include <linux/tty_flip.h> |
36 | #include <linux/platform_device.h> | ||
36 | 37 | ||
37 | #include <asm/io.h> | 38 | #include <asm/io.h> |
38 | 39 | ||
39 | #include <asm/arch/at91rm9200_usart.h> | 40 | #include <asm/arch/at91rm9200_usart.h> |
40 | #include <asm/mach/serial_at91rm9200.h> | 41 | #include <asm/arch/at91rm9200_pdc.h> |
42 | #include <asm/mach/serial_at91.h> | ||
41 | #include <asm/arch/board.h> | 43 | #include <asm/arch/board.h> |
42 | #include <asm/arch/pio.h> | 44 | #include <asm/arch/system.h> |
43 | |||
44 | 45 | ||
45 | #if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | 46 | #if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
46 | #define SUPPORT_SYSRQ | 47 | #define SUPPORT_SYSRQ |
@@ -67,7 +68,6 @@ | |||
67 | 68 | ||
68 | #endif | 69 | #endif |
69 | 70 | ||
70 | #define AT91_VA_BASE_DBGU ((unsigned long) AT91_VA_BASE_SYS + AT91_DBGU) | ||
71 | #define AT91_ISR_PASS_LIMIT 256 | 71 | #define AT91_ISR_PASS_LIMIT 256 |
72 | 72 | ||
73 | #define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR) | 73 | #define UART_PUT_CR(port,v) writel(v, (port)->membase + AT91_US_CR) |
@@ -87,16 +87,33 @@ | |||
87 | 87 | ||
88 | /* PDC registers */ | 88 | /* PDC registers */ |
89 | #define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR) | 89 | #define UART_PUT_PTCR(port,v) writel(v, (port)->membase + AT91_PDC_PTCR) |
90 | #define UART_GET_PTSR(port) readl((port)->membase + AT91_PDC_PTSR) | ||
91 | |||
90 | #define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR) | 92 | #define UART_PUT_RPR(port,v) writel(v, (port)->membase + AT91_PDC_RPR) |
93 | #define UART_GET_RPR(port) readl((port)->membase + AT91_PDC_RPR) | ||
91 | #define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR) | 94 | #define UART_PUT_RCR(port,v) writel(v, (port)->membase + AT91_PDC_RCR) |
92 | #define UART_GET_RCR(port) readl((port)->membase + AT91_PDC_RCR) | ||
93 | #define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR) | 95 | #define UART_PUT_RNPR(port,v) writel(v, (port)->membase + AT91_PDC_RNPR) |
94 | #define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR) | 96 | #define UART_PUT_RNCR(port,v) writel(v, (port)->membase + AT91_PDC_RNCR) |
95 | 97 | ||
98 | #define UART_PUT_TPR(port,v) writel(v, (port)->membase + AT91_PDC_TPR) | ||
99 | #define UART_PUT_TCR(port,v) writel(v, (port)->membase + AT91_PDC_TCR) | ||
100 | //#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + AT91_PDC_TNPR) | ||
101 | //#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + AT91_PDC_TNCR) | ||
96 | 102 | ||
97 | static int (*at91_open)(struct uart_port *); | 103 | static int (*at91_open)(struct uart_port *); |
98 | static void (*at91_close)(struct uart_port *); | 104 | static void (*at91_close)(struct uart_port *); |
99 | 105 | ||
106 | /* | ||
107 | * We wrap our port structure around the generic uart_port. | ||
108 | */ | ||
109 | struct at91_uart_port { | ||
110 | struct uart_port uart; /* uart */ | ||
111 | struct clk *clk; /* uart clock */ | ||
112 | unsigned short suspended; /* is port suspended? */ | ||
113 | }; | ||
114 | |||
115 | static struct at91_uart_port at91_ports[AT91_NR_UART]; | ||
116 | |||
100 | #ifdef SUPPORT_SYSRQ | 117 | #ifdef SUPPORT_SYSRQ |
101 | static struct console at91_console; | 118 | static struct console at91_console; |
102 | #endif | 119 | #endif |
@@ -115,16 +132,19 @@ static u_int at91_tx_empty(struct uart_port *port) | |||
115 | static void at91_set_mctrl(struct uart_port *port, u_int mctrl) | 132 | static void at91_set_mctrl(struct uart_port *port, u_int mctrl) |
116 | { | 133 | { |
117 | unsigned int control = 0; | 134 | unsigned int control = 0; |
135 | unsigned int mode; | ||
118 | 136 | ||
119 | /* | 137 | if (arch_identify() == ARCH_ID_AT91RM9200) { |
120 | * Errata #39: RTS0 is not internally connected to PA21. We need to drive | 138 | /* |
121 | * the pin manually. | 139 | * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21. |
122 | */ | 140 | * We need to drive the pin manually. |
123 | if (port->mapbase == AT91_VA_BASE_US0) { | 141 | */ |
124 | if (mctrl & TIOCM_RTS) | 142 | if (port->mapbase == AT91_BASE_US0) { |
125 | at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0); | 143 | if (mctrl & TIOCM_RTS) |
126 | else | 144 | at91_sys_write(AT91_PIOA + PIO_CODR, AT91_PA21_RTS0); |
127 | at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0); | 145 | else |
146 | at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0); | ||
147 | } | ||
128 | } | 148 | } |
129 | 149 | ||
130 | if (mctrl & TIOCM_RTS) | 150 | if (mctrl & TIOCM_RTS) |
@@ -137,7 +157,15 @@ static void at91_set_mctrl(struct uart_port *port, u_int mctrl) | |||
137 | else | 157 | else |
138 | control |= AT91_US_DTRDIS; | 158 | control |= AT91_US_DTRDIS; |
139 | 159 | ||
140 | UART_PUT_CR(port,control); | 160 | UART_PUT_CR(port, control); |
161 | |||
162 | /* Local loopback mode? */ | ||
163 | mode = UART_GET_MR(port) & ~AT91_US_CHMODE; | ||
164 | if (mctrl & TIOCM_LOOP) | ||
165 | mode |= AT91_US_CHMODE_LOC_LOOP; | ||
166 | else | ||
167 | mode |= AT91_US_CHMODE_NORMAL; | ||
168 | UART_PUT_MR(port, mode); | ||
141 | } | 169 | } |
142 | 170 | ||
143 | /* | 171 | /* |
@@ -169,8 +197,9 @@ static u_int at91_get_mctrl(struct uart_port *port) | |||
169 | */ | 197 | */ |
170 | static void at91_stop_tx(struct uart_port *port) | 198 | static void at91_stop_tx(struct uart_port *port) |
171 | { | 199 | { |
200 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
201 | |||
172 | UART_PUT_IDR(port, AT91_US_TXRDY); | 202 | UART_PUT_IDR(port, AT91_US_TXRDY); |
173 | port->read_status_mask &= ~AT91_US_TXRDY; | ||
174 | } | 203 | } |
175 | 204 | ||
176 | /* | 205 | /* |
@@ -178,7 +207,8 @@ static void at91_stop_tx(struct uart_port *port) | |||
178 | */ | 207 | */ |
179 | static void at91_start_tx(struct uart_port *port) | 208 | static void at91_start_tx(struct uart_port *port) |
180 | { | 209 | { |
181 | port->read_status_mask |= AT91_US_TXRDY; | 210 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; |
211 | |||
182 | UART_PUT_IER(port, AT91_US_TXRDY); | 212 | UART_PUT_IER(port, AT91_US_TXRDY); |
183 | } | 213 | } |
184 | 214 | ||
@@ -187,6 +217,8 @@ static void at91_start_tx(struct uart_port *port) | |||
187 | */ | 217 | */ |
188 | static void at91_stop_rx(struct uart_port *port) | 218 | static void at91_stop_rx(struct uart_port *port) |
189 | { | 219 | { |
220 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
221 | |||
190 | UART_PUT_IDR(port, AT91_US_RXRDY); | 222 | UART_PUT_IDR(port, AT91_US_RXRDY); |
191 | } | 223 | } |
192 | 224 | ||
@@ -195,7 +227,6 @@ static void at91_stop_rx(struct uart_port *port) | |||
195 | */ | 227 | */ |
196 | static void at91_enable_ms(struct uart_port *port) | 228 | static void at91_enable_ms(struct uart_port *port) |
197 | { | 229 | { |
198 | port->read_status_mask |= (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC); | ||
199 | UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC); | 230 | UART_PUT_IER(port, AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC); |
200 | } | 231 | } |
201 | 232 | ||
@@ -218,8 +249,8 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs) | |||
218 | struct tty_struct *tty = port->info->tty; | 249 | struct tty_struct *tty = port->info->tty; |
219 | unsigned int status, ch, flg; | 250 | unsigned int status, ch, flg; |
220 | 251 | ||
221 | status = UART_GET_CSR(port) & port->read_status_mask; | 252 | status = UART_GET_CSR(port); |
222 | while (status & (AT91_US_RXRDY)) { | 253 | while (status & AT91_US_RXRDY) { |
223 | ch = UART_GET_CHAR(port); | 254 | ch = UART_GET_CHAR(port); |
224 | 255 | ||
225 | port->icount.rx++; | 256 | port->icount.rx++; |
@@ -230,40 +261,38 @@ static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs) | |||
230 | * note that the error handling code is | 261 | * note that the error handling code is |
231 | * out of the main execution path | 262 | * out of the main execution path |
232 | */ | 263 | */ |
233 | if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE))) { | 264 | if (unlikely(status & (AT91_US_PARE | AT91_US_FRAME | AT91_US_OVRE | AT91_US_RXBRK))) { |
234 | UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */ | 265 | UART_PUT_CR(port, AT91_US_RSTSTA); /* clear error */ |
235 | if (status & (AT91_US_PARE)) | 266 | if (status & AT91_US_RXBRK) { |
267 | status &= ~(AT91_US_PARE | AT91_US_FRAME); /* ignore side-effect */ | ||
268 | port->icount.brk++; | ||
269 | if (uart_handle_break(port)) | ||
270 | goto ignore_char; | ||
271 | } | ||
272 | if (status & AT91_US_PARE) | ||
236 | port->icount.parity++; | 273 | port->icount.parity++; |
237 | if (status & (AT91_US_FRAME)) | 274 | if (status & AT91_US_FRAME) |
238 | port->icount.frame++; | 275 | port->icount.frame++; |
239 | if (status & (AT91_US_OVRE)) | 276 | if (status & AT91_US_OVRE) |
240 | port->icount.overrun++; | 277 | port->icount.overrun++; |
241 | 278 | ||
242 | if (status & AT91_US_PARE) | 279 | status &= port->read_status_mask; |
280 | |||
281 | if (status & AT91_US_RXBRK) | ||
282 | flg = TTY_BREAK; | ||
283 | else if (status & AT91_US_PARE) | ||
243 | flg = TTY_PARITY; | 284 | flg = TTY_PARITY; |
244 | else if (status & AT91_US_FRAME) | 285 | else if (status & AT91_US_FRAME) |
245 | flg = TTY_FRAME; | 286 | flg = TTY_FRAME; |
246 | if (status & AT91_US_OVRE) { | ||
247 | /* | ||
248 | * overrun does *not* affect the character | ||
249 | * we read from the FIFO | ||
250 | */ | ||
251 | tty_insert_flip_char(tty, ch, flg); | ||
252 | ch = 0; | ||
253 | flg = TTY_OVERRUN; | ||
254 | } | ||
255 | #ifdef SUPPORT_SYSRQ | ||
256 | port->sysrq = 0; | ||
257 | #endif | ||
258 | } | 287 | } |
259 | 288 | ||
260 | if (uart_handle_sysrq_char(port, ch, regs)) | 289 | if (uart_handle_sysrq_char(port, ch, regs)) |
261 | goto ignore_char; | 290 | goto ignore_char; |
262 | 291 | ||
263 | tty_insert_flip_char(tty, ch, flg); | 292 | uart_insert_char(port, status, AT91_US_OVRE, ch, flg); |
264 | 293 | ||
265 | ignore_char: | 294 | ignore_char: |
266 | status = UART_GET_CSR(port) & port->read_status_mask; | 295 | status = UART_GET_CSR(port); |
267 | } | 296 | } |
268 | 297 | ||
269 | tty_flip_buffer_push(tty); | 298 | tty_flip_buffer_push(tty); |
@@ -308,40 +337,35 @@ static void at91_tx_chars(struct uart_port *port) | |||
308 | static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 337 | static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
309 | { | 338 | { |
310 | struct uart_port *port = dev_id; | 339 | struct uart_port *port = dev_id; |
340 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
311 | unsigned int status, pending, pass_counter = 0; | 341 | unsigned int status, pending, pass_counter = 0; |
312 | 342 | ||
313 | status = UART_GET_CSR(port); | 343 | status = UART_GET_CSR(port); |
314 | pending = status & port->read_status_mask; | 344 | pending = status & UART_GET_IMR(port); |
315 | if (pending) { | 345 | while (pending) { |
316 | do { | 346 | /* Interrupt receive */ |
317 | if (pending & AT91_US_RXRDY) | 347 | if (pending & AT91_US_RXRDY) |
318 | at91_rx_chars(port, regs); | 348 | at91_rx_chars(port, regs); |
319 | 349 | ||
320 | /* Clear the relevent break bits */ | 350 | // TODO: All reads to CSR will clear these interrupts! |
321 | if (pending & AT91_US_RXBRK) { | 351 | if (pending & AT91_US_RIIC) port->icount.rng++; |
322 | UART_PUT_CR(port, AT91_US_RSTSTA); | 352 | if (pending & AT91_US_DSRIC) port->icount.dsr++; |
323 | port->icount.brk++; | 353 | if (pending & AT91_US_DCDIC) |
324 | uart_handle_break(port); | 354 | uart_handle_dcd_change(port, !(status & AT91_US_DCD)); |
325 | } | 355 | if (pending & AT91_US_CTSIC) |
356 | uart_handle_cts_change(port, !(status & AT91_US_CTS)); | ||
357 | if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC)) | ||
358 | wake_up_interruptible(&port->info->delta_msr_wait); | ||
359 | |||
360 | /* Interrupt transmit */ | ||
361 | if (pending & AT91_US_TXRDY) | ||
362 | at91_tx_chars(port); | ||
363 | |||
364 | if (pass_counter++ > AT91_ISR_PASS_LIMIT) | ||
365 | break; | ||
326 | 366 | ||
327 | // TODO: All reads to CSR will clear these interrupts! | 367 | status = UART_GET_CSR(port); |
328 | if (pending & AT91_US_RIIC) port->icount.rng++; | 368 | pending = status & UART_GET_IMR(port); |
329 | if (pending & AT91_US_DSRIC) port->icount.dsr++; | ||
330 | if (pending & AT91_US_DCDIC) | ||
331 | uart_handle_dcd_change(port, !(status & AT91_US_DCD)); | ||
332 | if (pending & AT91_US_CTSIC) | ||
333 | uart_handle_cts_change(port, !(status & AT91_US_CTS)); | ||
334 | if (pending & (AT91_US_RIIC | AT91_US_DSRIC | AT91_US_DCDIC | AT91_US_CTSIC)) | ||
335 | wake_up_interruptible(&port->info->delta_msr_wait); | ||
336 | |||
337 | if (pending & AT91_US_TXRDY) | ||
338 | at91_tx_chars(port); | ||
339 | if (pass_counter++ > AT91_ISR_PASS_LIMIT) | ||
340 | break; | ||
341 | |||
342 | status = UART_GET_CSR(port); | ||
343 | pending = status & port->read_status_mask; | ||
344 | } while (pending); | ||
345 | } | 369 | } |
346 | return IRQ_HANDLED; | 370 | return IRQ_HANDLED; |
347 | } | 371 | } |
@@ -351,6 +375,7 @@ static irqreturn_t at91_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
351 | */ | 375 | */ |
352 | static int at91_startup(struct uart_port *port) | 376 | static int at91_startup(struct uart_port *port) |
353 | { | 377 | { |
378 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
354 | int retval; | 379 | int retval; |
355 | 380 | ||
356 | /* | 381 | /* |
@@ -381,14 +406,14 @@ static int at91_startup(struct uart_port *port) | |||
381 | } | 406 | } |
382 | } | 407 | } |
383 | 408 | ||
384 | port->read_status_mask = AT91_US_RXRDY | AT91_US_TXRDY | AT91_US_OVRE | ||
385 | | AT91_US_FRAME | AT91_US_PARE | AT91_US_RXBRK; | ||
386 | /* | 409 | /* |
387 | * Finally, enable the serial port | 410 | * Finally, enable the serial port |
388 | */ | 411 | */ |
389 | UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); | 412 | UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); |
390 | UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */ | 413 | UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); /* enable xmit & rcvr */ |
391 | UART_PUT_IER(port, AT91_US_RXRDY); /* do receive only */ | 414 | |
415 | UART_PUT_IER(port, AT91_US_RXRDY); /* enable receive only */ | ||
416 | |||
392 | return 0; | 417 | return 0; |
393 | } | 418 | } |
394 | 419 | ||
@@ -397,6 +422,8 @@ static int at91_startup(struct uart_port *port) | |||
397 | */ | 422 | */ |
398 | static void at91_shutdown(struct uart_port *port) | 423 | static void at91_shutdown(struct uart_port *port) |
399 | { | 424 | { |
425 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
426 | |||
400 | /* | 427 | /* |
401 | * Disable all interrupts, port and break condition. | 428 | * Disable all interrupts, port and break condition. |
402 | */ | 429 | */ |
@@ -421,21 +448,22 @@ static void at91_shutdown(struct uart_port *port) | |||
421 | */ | 448 | */ |
422 | static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) | 449 | static void at91_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) |
423 | { | 450 | { |
451 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
452 | |||
424 | switch (state) { | 453 | switch (state) { |
425 | case 0: | 454 | case 0: |
426 | /* | 455 | /* |
427 | * Enable the peripheral clock for this serial port. | 456 | * Enable the peripheral clock for this serial port. |
428 | * This is called on uart_open() or a resume event. | 457 | * This is called on uart_open() or a resume event. |
429 | */ | 458 | */ |
430 | at91_sys_write(AT91_PMC_PCER, 1 << port->irq); | 459 | clk_enable(at91_port->clk); |
431 | break; | 460 | break; |
432 | case 3: | 461 | case 3: |
433 | /* | 462 | /* |
434 | * Disable the peripheral clock for this serial port. | 463 | * Disable the peripheral clock for this serial port. |
435 | * This is called on uart_close() or a suspend event. | 464 | * This is called on uart_close() or a suspend event. |
436 | */ | 465 | */ |
437 | if (port->irq != AT91_ID_SYS) /* is this a shared clock? */ | 466 | clk_disable(at91_port->clk); |
438 | at91_sys_write(AT91_PMC_PCDR, 1 << port->irq); | ||
439 | break; | 467 | break; |
440 | default: | 468 | default: |
441 | printk(KERN_ERR "at91_serial: unknown pm %d\n", state); | 469 | printk(KERN_ERR "at91_serial: unknown pm %d\n", state); |
@@ -494,9 +522,9 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s | |||
494 | 522 | ||
495 | spin_lock_irqsave(&port->lock, flags); | 523 | spin_lock_irqsave(&port->lock, flags); |
496 | 524 | ||
497 | port->read_status_mask |= AT91_US_OVRE; | 525 | port->read_status_mask = AT91_US_OVRE; |
498 | if (termios->c_iflag & INPCK) | 526 | if (termios->c_iflag & INPCK) |
499 | port->read_status_mask |= AT91_US_FRAME | AT91_US_PARE; | 527 | port->read_status_mask |= (AT91_US_FRAME | AT91_US_PARE); |
500 | if (termios->c_iflag & (BRKINT | PARMRK)) | 528 | if (termios->c_iflag & (BRKINT | PARMRK)) |
501 | port->read_status_mask |= AT91_US_RXBRK; | 529 | port->read_status_mask |= AT91_US_RXBRK; |
502 | 530 | ||
@@ -552,7 +580,7 @@ static void at91_set_termios(struct uart_port *port, struct termios * termios, s | |||
552 | */ | 580 | */ |
553 | static const char *at91_type(struct uart_port *port) | 581 | static const char *at91_type(struct uart_port *port) |
554 | { | 582 | { |
555 | return (port->type == PORT_AT91RM9200) ? "AT91_SERIAL" : NULL; | 583 | return (port->type == PORT_AT91) ? "AT91_SERIAL" : NULL; |
556 | } | 584 | } |
557 | 585 | ||
558 | /* | 586 | /* |
@@ -560,8 +588,15 @@ static const char *at91_type(struct uart_port *port) | |||
560 | */ | 588 | */ |
561 | static void at91_release_port(struct uart_port *port) | 589 | static void at91_release_port(struct uart_port *port) |
562 | { | 590 | { |
563 | release_mem_region(port->mapbase, | 591 | struct platform_device *pdev = to_platform_device(port->dev); |
564 | (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K); | 592 | int size = pdev->resource[0].end - pdev->resource[0].start + 1; |
593 | |||
594 | release_mem_region(port->mapbase, size); | ||
595 | |||
596 | if (port->flags & UPF_IOREMAP) { | ||
597 | iounmap(port->membase); | ||
598 | port->membase = NULL; | ||
599 | } | ||
565 | } | 600 | } |
566 | 601 | ||
567 | /* | 602 | /* |
@@ -569,10 +604,21 @@ static void at91_release_port(struct uart_port *port) | |||
569 | */ | 604 | */ |
570 | static int at91_request_port(struct uart_port *port) | 605 | static int at91_request_port(struct uart_port *port) |
571 | { | 606 | { |
572 | return request_mem_region(port->mapbase, | 607 | struct platform_device *pdev = to_platform_device(port->dev); |
573 | (port->mapbase == AT91_VA_BASE_DBGU) ? 512 : SZ_16K, | 608 | int size = pdev->resource[0].end - pdev->resource[0].start + 1; |
574 | "at91_serial") != NULL ? 0 : -EBUSY; | 609 | |
610 | if (!request_mem_region(port->mapbase, size, "at91_serial")) | ||
611 | return -EBUSY; | ||
612 | |||
613 | if (port->flags & UPF_IOREMAP) { | ||
614 | port->membase = ioremap(port->mapbase, size); | ||
615 | if (port->membase == NULL) { | ||
616 | release_mem_region(port->mapbase, size); | ||
617 | return -ENOMEM; | ||
618 | } | ||
619 | } | ||
575 | 620 | ||
621 | return 0; | ||
576 | } | 622 | } |
577 | 623 | ||
578 | /* | 624 | /* |
@@ -581,7 +627,7 @@ static int at91_request_port(struct uart_port *port) | |||
581 | static void at91_config_port(struct uart_port *port, int flags) | 627 | static void at91_config_port(struct uart_port *port, int flags) |
582 | { | 628 | { |
583 | if (flags & UART_CONFIG_TYPE) { | 629 | if (flags & UART_CONFIG_TYPE) { |
584 | port->type = PORT_AT91RM9200; | 630 | port->type = PORT_AT91; |
585 | at91_request_port(port); | 631 | at91_request_port(port); |
586 | } | 632 | } |
587 | } | 633 | } |
@@ -592,7 +638,7 @@ static void at91_config_port(struct uart_port *port, int flags) | |||
592 | static int at91_verify_port(struct uart_port *port, struct serial_struct *ser) | 638 | static int at91_verify_port(struct uart_port *port, struct serial_struct *ser) |
593 | { | 639 | { |
594 | int ret = 0; | 640 | int ret = 0; |
595 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91RM9200) | 641 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_AT91) |
596 | ret = -EINVAL; | 642 | ret = -EINVAL; |
597 | if (port->irq != ser->irq) | 643 | if (port->irq != ser->irq) |
598 | ret = -EINVAL; | 644 | ret = -EINVAL; |
@@ -624,33 +670,47 @@ static struct uart_ops at91_pops = { | |||
624 | .type = at91_type, | 670 | .type = at91_type, |
625 | .release_port = at91_release_port, | 671 | .release_port = at91_release_port, |
626 | .request_port = at91_request_port, | 672 | .request_port = at91_request_port, |
627 | .config_port = at91_config_port, | 673 | .config_port = at91_config_port, |
628 | .verify_port = at91_verify_port, | 674 | .verify_port = at91_verify_port, |
629 | .pm = at91_serial_pm, | 675 | .pm = at91_serial_pm, |
630 | }; | 676 | }; |
631 | 677 | ||
632 | static struct uart_port at91_ports[AT91_NR_UART]; | 678 | /* |
633 | 679 | * Configure the port from the platform device resource info. | |
634 | void __init at91_init_ports(void) | 680 | */ |
681 | static void __devinit at91_init_port(struct at91_uart_port *at91_port, struct platform_device *pdev) | ||
635 | { | 682 | { |
636 | static int first = 1; | 683 | struct uart_port *port = &at91_port->uart; |
637 | int i; | 684 | struct at91_uart_data *data = pdev->dev.platform_data; |
638 | 685 | ||
639 | if (!first) | 686 | port->iotype = UPIO_MEM; |
640 | return; | 687 | port->flags = UPF_BOOT_AUTOCONF; |
641 | first = 0; | 688 | port->ops = &at91_pops; |
689 | port->fifosize = 1; | ||
690 | port->line = pdev->id; | ||
691 | port->dev = &pdev->dev; | ||
692 | |||
693 | port->mapbase = pdev->resource[0].start; | ||
694 | port->irq = pdev->resource[1].start; | ||
695 | |||
696 | if (port->mapbase == AT91_VA_BASE_SYS + AT91_DBGU) /* Part of system perpherals - already mapped */ | ||
697 | port->membase = (void __iomem *) port->mapbase; | ||
698 | else { | ||
699 | port->flags |= UPF_IOREMAP; | ||
700 | port->membase = NULL; | ||
701 | } | ||
642 | 702 | ||
643 | for (i = 0; i < AT91_NR_UART; i++) { | 703 | if (!at91_port->clk) { /* for console, the clock could already be configured */ |
644 | at91_ports[i].iotype = UPIO_MEM; | 704 | at91_port->clk = clk_get(&pdev->dev, "usart"); |
645 | at91_ports[i].flags = UPF_BOOT_AUTOCONF; | 705 | clk_enable(at91_port->clk); |
646 | at91_ports[i].uartclk = at91_master_clock; | 706 | port->uartclk = clk_get_rate(at91_port->clk); |
647 | at91_ports[i].ops = &at91_pops; | 707 | } |
648 | at91_ports[i].fifosize = 1; | ||
649 | at91_ports[i].line = i; | ||
650 | } | ||
651 | } | 708 | } |
652 | 709 | ||
653 | void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns) | 710 | /* |
711 | * Register board-specific modem-control line handlers. | ||
712 | */ | ||
713 | void __init at91_register_uart_fns(struct at91_port_fns *fns) | ||
654 | { | 714 | { |
655 | if (fns->enable_ms) | 715 | if (fns->enable_ms) |
656 | at91_pops.enable_ms = fns->enable_ms; | 716 | at91_pops.enable_ms = fns->enable_ms; |
@@ -664,51 +724,6 @@ void __init at91_register_uart_fns(struct at91rm9200_port_fns *fns) | |||
664 | at91_pops.set_wake = fns->set_wake; | 724 | at91_pops.set_wake = fns->set_wake; |
665 | } | 725 | } |
666 | 726 | ||
667 | /* | ||
668 | * Setup ports. | ||
669 | */ | ||
670 | void __init at91_register_uart(int idx, int port) | ||
671 | { | ||
672 | if ((idx < 0) || (idx >= AT91_NR_UART)) { | ||
673 | printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx); | ||
674 | return; | ||
675 | } | ||
676 | |||
677 | switch (port) { | ||
678 | case 0: | ||
679 | at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US0; | ||
680 | at91_ports[idx].mapbase = AT91_VA_BASE_US0; | ||
681 | at91_ports[idx].irq = AT91_ID_US0; | ||
682 | AT91_CfgPIO_USART0(); | ||
683 | break; | ||
684 | case 1: | ||
685 | at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US1; | ||
686 | at91_ports[idx].mapbase = AT91_VA_BASE_US1; | ||
687 | at91_ports[idx].irq = AT91_ID_US1; | ||
688 | AT91_CfgPIO_USART1(); | ||
689 | break; | ||
690 | case 2: | ||
691 | at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US2; | ||
692 | at91_ports[idx].mapbase = AT91_VA_BASE_US2; | ||
693 | at91_ports[idx].irq = AT91_ID_US2; | ||
694 | AT91_CfgPIO_USART2(); | ||
695 | break; | ||
696 | case 3: | ||
697 | at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_US3; | ||
698 | at91_ports[idx].mapbase = AT91_VA_BASE_US3; | ||
699 | at91_ports[idx].irq = AT91_ID_US3; | ||
700 | AT91_CfgPIO_USART3(); | ||
701 | break; | ||
702 | case 4: | ||
703 | at91_ports[idx].membase = (void __iomem *) AT91_VA_BASE_DBGU; | ||
704 | at91_ports[idx].mapbase = AT91_VA_BASE_DBGU; | ||
705 | at91_ports[idx].irq = AT91_ID_SYS; | ||
706 | AT91_CfgPIO_DBGU(); | ||
707 | break; | ||
708 | default: | ||
709 | printk(KERN_ERR "%s : bad port number %d\n", __FUNCTION__, port); | ||
710 | } | ||
711 | } | ||
712 | 727 | ||
713 | #ifdef CONFIG_SERIAL_AT91_CONSOLE | 728 | #ifdef CONFIG_SERIAL_AT91_CONSOLE |
714 | static void at91_console_putchar(struct uart_port *port, int ch) | 729 | static void at91_console_putchar(struct uart_port *port, int ch) |
@@ -723,7 +738,7 @@ static void at91_console_putchar(struct uart_port *port, int ch) | |||
723 | */ | 738 | */ |
724 | static void at91_console_write(struct console *co, const char *s, u_int count) | 739 | static void at91_console_write(struct console *co, const char *s, u_int count) |
725 | { | 740 | { |
726 | struct uart_port *port = at91_ports + co->index; | 741 | struct uart_port *port = &at91_ports[co->index].uart; |
727 | unsigned int status, imr; | 742 | unsigned int status, imr; |
728 | 743 | ||
729 | /* | 744 | /* |
@@ -778,23 +793,15 @@ static void __init at91_console_get_options(struct uart_port *port, int *baud, i | |||
778 | 793 | ||
779 | static int __init at91_console_setup(struct console *co, char *options) | 794 | static int __init at91_console_setup(struct console *co, char *options) |
780 | { | 795 | { |
781 | struct uart_port *port; | 796 | struct uart_port *port = &at91_ports[co->index].uart; |
782 | int baud = 115200; | 797 | int baud = 115200; |
783 | int bits = 8; | 798 | int bits = 8; |
784 | int parity = 'n'; | 799 | int parity = 'n'; |
785 | int flow = 'n'; | 800 | int flow = 'n'; |
786 | 801 | ||
787 | /* | 802 | if (port->membase == 0) /* Port not initialized yet - delay setup */ |
788 | * Check whether an invalid uart number has been specified, and | 803 | return -ENODEV; |
789 | * if so, search for the first available port that does have | ||
790 | * console support. | ||
791 | */ | ||
792 | port = uart_get_console(at91_ports, AT91_NR_UART, co); | ||
793 | 804 | ||
794 | /* | ||
795 | * Enable the serial console, in-case bootloader did not do it. | ||
796 | */ | ||
797 | at91_sys_write(AT91_PMC_PCER, 1 << port->irq); /* enable clock */ | ||
798 | UART_PUT_IDR(port, -1); /* disable interrupts */ | 805 | UART_PUT_IDR(port, -1); /* disable interrupts */ |
799 | UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); | 806 | UART_PUT_CR(port, AT91_US_RSTSTA | AT91_US_RSTRX); |
800 | UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); | 807 | UART_PUT_CR(port, AT91_US_TXEN | AT91_US_RXEN); |
@@ -821,23 +828,40 @@ static struct console at91_console = { | |||
821 | 828 | ||
822 | #define AT91_CONSOLE_DEVICE &at91_console | 829 | #define AT91_CONSOLE_DEVICE &at91_console |
823 | 830 | ||
824 | static int __init at91_console_init(void) | 831 | /* |
832 | * Early console initialization (before VM subsystem initialized). | ||
833 | */ | ||
834 | static int __init at91_console_init(void) | ||
825 | { | 835 | { |
826 | at91_init_ports(); | 836 | if (at91_default_console_device) { |
837 | add_preferred_console(AT91_DEVICENAME, at91_default_console_device->id, NULL); | ||
838 | at91_init_port(&(at91_ports[at91_default_console_device->id]), at91_default_console_device); | ||
839 | register_console(&at91_console); | ||
840 | } | ||
827 | 841 | ||
828 | at91_console.index = at91_console_port; | ||
829 | register_console(&at91_console); | ||
830 | return 0; | 842 | return 0; |
831 | } | 843 | } |
832 | console_initcall(at91_console_init); | 844 | console_initcall(at91_console_init); |
833 | 845 | ||
846 | /* | ||
847 | * Late console initialization. | ||
848 | */ | ||
849 | static int __init at91_late_console_init(void) | ||
850 | { | ||
851 | if (at91_default_console_device && !(at91_console.flags & CON_ENABLED)) | ||
852 | register_console(&at91_console); | ||
853 | |||
854 | return 0; | ||
855 | } | ||
856 | core_initcall(at91_late_console_init); | ||
857 | |||
834 | #else | 858 | #else |
835 | #define AT91_CONSOLE_DEVICE NULL | 859 | #define AT91_CONSOLE_DEVICE NULL |
836 | #endif | 860 | #endif |
837 | 861 | ||
838 | static struct uart_driver at91_uart = { | 862 | static struct uart_driver at91_uart = { |
839 | .owner = THIS_MODULE, | 863 | .owner = THIS_MODULE, |
840 | .driver_name = AT91_DEVICENAME, | 864 | .driver_name = "at91_serial", |
841 | .dev_name = AT91_DEVICENAME, | 865 | .dev_name = AT91_DEVICENAME, |
842 | .devfs_name = AT91_DEVICENAME, | 866 | .devfs_name = AT91_DEVICENAME, |
843 | .major = SERIAL_AT91_MAJOR, | 867 | .major = SERIAL_AT91_MAJOR, |
@@ -846,33 +870,106 @@ static struct uart_driver at91_uart = { | |||
846 | .cons = AT91_CONSOLE_DEVICE, | 870 | .cons = AT91_CONSOLE_DEVICE, |
847 | }; | 871 | }; |
848 | 872 | ||
849 | static int __init at91_serial_init(void) | 873 | #ifdef CONFIG_PM |
874 | static int at91_serial_suspend(struct platform_device *pdev, pm_message_t state) | ||
850 | { | 875 | { |
851 | int ret, i; | 876 | struct uart_port *port = platform_get_drvdata(pdev); |
877 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
878 | |||
879 | if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock()) | ||
880 | enable_irq_wake(port->irq); | ||
881 | else { | ||
882 | disable_irq_wake(port->irq); | ||
883 | uart_suspend_port(&at91_uart, port); | ||
884 | at91_port->suspended = 1; | ||
885 | } | ||
852 | 886 | ||
853 | at91_init_ports(); | 887 | return 0; |
888 | } | ||
854 | 889 | ||
855 | ret = uart_register_driver(&at91_uart); | 890 | static int at91_serial_resume(struct platform_device *pdev) |
856 | if (ret) | 891 | { |
857 | return ret; | 892 | struct uart_port *port = platform_get_drvdata(pdev); |
893 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
858 | 894 | ||
859 | for (i = 0; i < AT91_NR_UART; i++) { | 895 | if (at91_port->suspended) { |
860 | if (at91_serial_map[i] >= 0) | 896 | uart_resume_port(&at91_uart, port); |
861 | uart_add_one_port(&at91_uart, &at91_ports[i]); | 897 | at91_port->suspended = 0; |
862 | } | 898 | } |
863 | 899 | ||
864 | return 0; | 900 | return 0; |
865 | } | 901 | } |
902 | #else | ||
903 | #define at91_serial_suspend NULL | ||
904 | #define at91_serial_resume NULL | ||
905 | #endif | ||
866 | 906 | ||
867 | static void __exit at91_serial_exit(void) | 907 | static int __devinit at91_serial_probe(struct platform_device *pdev) |
868 | { | 908 | { |
869 | int i; | 909 | struct at91_uart_port *port; |
910 | int ret; | ||
870 | 911 | ||
871 | for (i = 0; i < AT91_NR_UART; i++) { | 912 | port = &at91_ports[pdev->id]; |
872 | if (at91_serial_map[i] >= 0) | 913 | at91_init_port(port, pdev); |
873 | uart_remove_one_port(&at91_uart, &at91_ports[i]); | ||
874 | } | ||
875 | 914 | ||
915 | ret = uart_add_one_port(&at91_uart, &port->uart); | ||
916 | if (!ret) { | ||
917 | device_init_wakeup(&pdev->dev, 1); | ||
918 | platform_set_drvdata(pdev, port); | ||
919 | } | ||
920 | |||
921 | return ret; | ||
922 | } | ||
923 | |||
924 | static int __devexit at91_serial_remove(struct platform_device *pdev) | ||
925 | { | ||
926 | struct uart_port *port = platform_get_drvdata(pdev); | ||
927 | struct at91_uart_port *at91_port = (struct at91_uart_port *) port; | ||
928 | int ret = 0; | ||
929 | |||
930 | clk_disable(at91_port->clk); | ||
931 | clk_put(at91_port->clk); | ||
932 | |||
933 | device_init_wakeup(&pdev->dev, 0); | ||
934 | platform_set_drvdata(pdev, NULL); | ||
935 | |||
936 | if (port) { | ||
937 | ret = uart_remove_one_port(&at91_uart, port); | ||
938 | kfree(port); | ||
939 | } | ||
940 | |||
941 | return ret; | ||
942 | } | ||
943 | |||
944 | static struct platform_driver at91_serial_driver = { | ||
945 | .probe = at91_serial_probe, | ||
946 | .remove = __devexit_p(at91_serial_remove), | ||
947 | .suspend = at91_serial_suspend, | ||
948 | .resume = at91_serial_resume, | ||
949 | .driver = { | ||
950 | .name = "at91_usart", | ||
951 | .owner = THIS_MODULE, | ||
952 | }, | ||
953 | }; | ||
954 | |||
955 | static int __init at91_serial_init(void) | ||
956 | { | ||
957 | int ret; | ||
958 | |||
959 | ret = uart_register_driver(&at91_uart); | ||
960 | if (ret) | ||
961 | return ret; | ||
962 | |||
963 | ret = platform_driver_register(&at91_serial_driver); | ||
964 | if (ret) | ||
965 | uart_unregister_driver(&at91_uart); | ||
966 | |||
967 | return ret; | ||
968 | } | ||
969 | |||
970 | static void __exit at91_serial_exit(void) | ||
971 | { | ||
972 | platform_driver_unregister(&at91_serial_driver); | ||
876 | uart_unregister_driver(&at91_uart); | 973 | uart_unregister_driver(&at91_uart); |
877 | } | 974 | } |
878 | 975 | ||