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authorPaul Mundt <lethal@linux-sh.org>2006-11-30 23:15:14 -0500
committerPaul Mundt <lethal@linux-sh.org>2006-12-05 20:45:40 -0500
commit1d118562c2067a42d0e8f70671a4ce27d7c6ffee (patch)
treefa59028397143d7fa94d86785bee8443efe30798 /drivers/serial
parente74b56800e78a10bc09b56a87831876a1d9d09ae (diff)
sh: Clock framework tidying.
This syncs up the SH clock framework with the linux/clk.h API, for which there were only some minor changes required, namely the clk_get() dev_id and subsequent callsites. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/sh-sci.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index cfcc3caf49d8..3b5f19ec2126 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -775,7 +775,7 @@ static int sci_notifier(struct notifier_block *self,
775 * 775 *
776 * Clean this up later.. 776 * Clean this up later..
777 */ 777 */
778 clk = clk_get("module_clk"); 778 clk = clk_get(NULL, "module_clk");
779 port->uartclk = clk_get_rate(clk) * 16; 779 port->uartclk = clk_get_rate(clk) * 16;
780 clk_put(clk); 780 clk_put(clk);
781 } 781 }
@@ -960,7 +960,7 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios,
960 default: 960 default:
961 { 961 {
962#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) 962#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
963 struct clk *clk = clk_get("module_clk"); 963 struct clk *clk = clk_get(NULL, "module_clk");
964 t = SCBRR_VALUE(baud, clk_get_rate(clk)); 964 t = SCBRR_VALUE(baud, clk_get_rate(clk));
965 clk_put(clk); 965 clk_put(clk);
966#else 966#else
@@ -1128,7 +1128,7 @@ static void __init sci_init_ports(void)
1128 * XXX: We should use a proper SCI/SCIF clock 1128 * XXX: We should use a proper SCI/SCIF clock
1129 */ 1129 */
1130 { 1130 {
1131 struct clk *clk = clk_get("module_clk"); 1131 struct clk *clk = clk_get(NULL, "module_clk");
1132 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; 1132 sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1133 clk_put(clk); 1133 clk_put(clk);
1134 } 1134 }