diff options
author | Grant Likely <grant.likely@secretlab.ca> | 2007-10-01 22:15:39 -0400 |
---|---|---|
committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2007-10-03 08:23:14 -0400 |
commit | a15da8eff3627b8368db7f5dd260e5643213d918 (patch) | |
tree | 262d3d4b34625b3630fe785c6b625e1d84670fe9 /drivers/serial | |
parent | 260c02a9beddf4186a8c7549b2eec2f6c67f1151 (diff) |
[POWERPC] Uartlite: Fix reg io to access documented register size
The Uartlite data sheet defines the registers as 32 bit wide. This
patch changes the register access to use 32 bit transfers and eliminates
the magic +3 offset which is currently required to make the device
work.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Williams <jwilliams@itee.uq.edu.au>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/uartlite.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c index f5051cf1a0c8..59b674aa2c01 100644 --- a/drivers/serial/uartlite.c +++ b/drivers/serial/uartlite.c | |||
@@ -61,7 +61,7 @@ static int ulite_receive(struct uart_port *port, int stat) | |||
61 | /* stats */ | 61 | /* stats */ |
62 | if (stat & ULITE_STATUS_RXVALID) { | 62 | if (stat & ULITE_STATUS_RXVALID) { |
63 | port->icount.rx++; | 63 | port->icount.rx++; |
64 | ch = readb(port->membase + ULITE_RX); | 64 | ch = in_be32((void*)port->membase + ULITE_RX); |
65 | 65 | ||
66 | if (stat & ULITE_STATUS_PARITY) | 66 | if (stat & ULITE_STATUS_PARITY) |
67 | port->icount.parity++; | 67 | port->icount.parity++; |
@@ -106,7 +106,7 @@ static int ulite_transmit(struct uart_port *port, int stat) | |||
106 | return 0; | 106 | return 0; |
107 | 107 | ||
108 | if (port->x_char) { | 108 | if (port->x_char) { |
109 | writeb(port->x_char, port->membase + ULITE_TX); | 109 | out_be32((void*)port->membase + ULITE_TX, port->x_char); |
110 | port->x_char = 0; | 110 | port->x_char = 0; |
111 | port->icount.tx++; | 111 | port->icount.tx++; |
112 | return 1; | 112 | return 1; |
@@ -115,7 +115,7 @@ static int ulite_transmit(struct uart_port *port, int stat) | |||
115 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) | 115 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
116 | return 0; | 116 | return 0; |
117 | 117 | ||
118 | writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX); | 118 | out_be32((void*)port->membase + ULITE_TX, xmit->buf[xmit->tail]); |
119 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1); | 119 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1); |
120 | port->icount.tx++; | 120 | port->icount.tx++; |
121 | 121 | ||
@@ -132,7 +132,7 @@ static irqreturn_t ulite_isr(int irq, void *dev_id) | |||
132 | int busy; | 132 | int busy; |
133 | 133 | ||
134 | do { | 134 | do { |
135 | int stat = readb(port->membase + ULITE_STATUS); | 135 | int stat = in_be32((void*)port->membase + ULITE_STATUS); |
136 | busy = ulite_receive(port, stat); | 136 | busy = ulite_receive(port, stat); |
137 | busy |= ulite_transmit(port, stat); | 137 | busy |= ulite_transmit(port, stat); |
138 | } while (busy); | 138 | } while (busy); |
@@ -148,7 +148,7 @@ static unsigned int ulite_tx_empty(struct uart_port *port) | |||
148 | unsigned int ret; | 148 | unsigned int ret; |
149 | 149 | ||
150 | spin_lock_irqsave(&port->lock, flags); | 150 | spin_lock_irqsave(&port->lock, flags); |
151 | ret = readb(port->membase + ULITE_STATUS); | 151 | ret = in_be32((void*)port->membase + ULITE_STATUS); |
152 | spin_unlock_irqrestore(&port->lock, flags); | 152 | spin_unlock_irqrestore(&port->lock, flags); |
153 | 153 | ||
154 | return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0; | 154 | return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0; |
@@ -171,7 +171,7 @@ static void ulite_stop_tx(struct uart_port *port) | |||
171 | 171 | ||
172 | static void ulite_start_tx(struct uart_port *port) | 172 | static void ulite_start_tx(struct uart_port *port) |
173 | { | 173 | { |
174 | ulite_transmit(port, readb(port->membase + ULITE_STATUS)); | 174 | ulite_transmit(port, in_be32((void*)port->membase + ULITE_STATUS)); |
175 | } | 175 | } |
176 | 176 | ||
177 | static void ulite_stop_rx(struct uart_port *port) | 177 | static void ulite_stop_rx(struct uart_port *port) |
@@ -200,17 +200,17 @@ static int ulite_startup(struct uart_port *port) | |||
200 | if (ret) | 200 | if (ret) |
201 | return ret; | 201 | return ret; |
202 | 202 | ||
203 | writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX, | 203 | out_be32((void*)port->membase + ULITE_CONTROL, |
204 | port->membase + ULITE_CONTROL); | 204 | ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); |
205 | writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL); | 205 | out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE); |
206 | 206 | ||
207 | return 0; | 207 | return 0; |
208 | } | 208 | } |
209 | 209 | ||
210 | static void ulite_shutdown(struct uart_port *port) | 210 | static void ulite_shutdown(struct uart_port *port) |
211 | { | 211 | { |
212 | writeb(0, port->membase + ULITE_CONTROL); | 212 | out_be32((void*)port->membase + ULITE_CONTROL, 0); |
213 | readb(port->membase + ULITE_CONTROL); /* dummy */ | 213 | in_be32((void*)port->membase + ULITE_CONTROL); /* dummy */ |
214 | free_irq(port->irq, port); | 214 | free_irq(port->irq, port); |
215 | } | 215 | } |
216 | 216 | ||
@@ -314,7 +314,7 @@ static void ulite_console_wait_tx(struct uart_port *port) | |||
314 | 314 | ||
315 | /* wait up to 10ms for the character(s) to be sent */ | 315 | /* wait up to 10ms for the character(s) to be sent */ |
316 | for (i = 0; i < 10000; i++) { | 316 | for (i = 0; i < 10000; i++) { |
317 | if (readb(port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY) | 317 | if (in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY) |
318 | break; | 318 | break; |
319 | udelay(1); | 319 | udelay(1); |
320 | } | 320 | } |
@@ -323,7 +323,7 @@ static void ulite_console_wait_tx(struct uart_port *port) | |||
323 | static void ulite_console_putchar(struct uart_port *port, int ch) | 323 | static void ulite_console_putchar(struct uart_port *port, int ch) |
324 | { | 324 | { |
325 | ulite_console_wait_tx(port); | 325 | ulite_console_wait_tx(port); |
326 | writeb(ch, port->membase + ULITE_TX); | 326 | out_be32((void*)port->membase + ULITE_TX, ch); |
327 | } | 327 | } |
328 | 328 | ||
329 | static void ulite_console_write(struct console *co, const char *s, | 329 | static void ulite_console_write(struct console *co, const char *s, |
@@ -340,8 +340,8 @@ static void ulite_console_write(struct console *co, const char *s, | |||
340 | spin_lock_irqsave(&port->lock, flags); | 340 | spin_lock_irqsave(&port->lock, flags); |
341 | 341 | ||
342 | /* save and disable interrupt */ | 342 | /* save and disable interrupt */ |
343 | ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE; | 343 | ier = in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_IE; |
344 | writeb(0, port->membase + ULITE_CONTROL); | 344 | out_be32((void*)port->membase + ULITE_CONTROL, 0); |
345 | 345 | ||
346 | uart_console_write(port, s, count, ulite_console_putchar); | 346 | uart_console_write(port, s, count, ulite_console_putchar); |
347 | 347 | ||
@@ -349,7 +349,7 @@ static void ulite_console_write(struct console *co, const char *s, | |||
349 | 349 | ||
350 | /* restore interrupt state */ | 350 | /* restore interrupt state */ |
351 | if (ier) | 351 | if (ier) |
352 | writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL); | 352 | out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE); |
353 | 353 | ||
354 | if (locked) | 354 | if (locked) |
355 | spin_unlock_irqrestore(&port->lock, flags); | 355 | spin_unlock_irqrestore(&port->lock, flags); |