Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6

5 files changed, 25 insertions, 2 deletions

diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 2a3671233b15..536d8e510f66 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -806,6 +806,8 @@ pci_default_setup(struct serial_private *priv,
 #define PCI_SUBDEVICE_ID_OCTPRO422      0x0208
 #define PCI_SUBDEVICE_ID_POCTAL232      0x0308
 #define PCI_SUBDEVICE_ID_POCTAL422      0x0408
+#define PCI_VENDOR_ID_ADVANTECH         0x13fe
+#define PCI_DEVICE_ID_ADVANTECH_PCI3620 0x3620
 
 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */
 #define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584
@@ -2152,6 +2154,10 @@ static int pciserial_resume_one(struct pci_dev *dev)
 #endif
 
 static struct pci_device_id serial_pci_tbl[] = {
+        /* Advantech use PCI_DEVICE_ID_ADVANTECH_PCI3620 (0x3620) as 'PCI_SUBVENDOR_ID' */
+        {       PCI_VENDOR_ID_ADVANTECH, PCI_DEVICE_ID_ADVANTECH_PCI3620,
+                PCI_DEVICE_ID_ADVANTECH_PCI3620, 0x0001, 0, 0,
+                pbn_b2_8_921600 },
         {       PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960,
                 PCI_SUBVENDOR_ID_CONNECT_TECH,
                 PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232, 0, 0,
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 3e525e38a5d9..7d7f576da202 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -982,7 +982,7 @@ config SERIAL_SH_SCI_CONSOLE
 
 config SERIAL_PNX8XXX
         bool "Enable PNX8XXX SoCs' UART Support"
-        depends on MIPS && SOC_PNX8550
+        depends on MIPS && (SOC_PNX8550 || SOC_PNX833X)
         select SERIAL_CORE
         help
           If you have a MIPS-based Philips SoC such as PNX8550 or PNX8330
diff --git a/drivers/serial/jsm/jsm_driver.c b/drivers/serial/jsm/jsm_driver.c
index 338cf8a08b43..92187e28608a 100644
--- a/drivers/serial/jsm/jsm_driver.c
+++ b/drivers/serial/jsm/jsm_driver.c
@@ -180,7 +180,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)
         return rc;
 }
 
-static void jsm_remove_one(struct pci_dev *pdev)
+static void __devexit jsm_remove_one(struct pci_dev *pdev)
 {
         struct jsm_board *brd = pci_get_drvdata(pdev);
         int i = 0;
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c
index 3547558d2caf..324c74d2f666 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/serial/jsm/jsm_tty.c
@@ -161,6 +161,11 @@ static void jsm_tty_stop_rx(struct uart_port *port)
         channel->ch_bd->bd_ops->disable_receiver(channel);
 }
 
+static void jsm_tty_enable_ms(struct uart_port *port)
+{
+        /* Nothing needed */
+}
+
 static void jsm_tty_break(struct uart_port *port, int break_state)
 {
         unsigned long lock_flags;
@@ -345,6 +350,7 @@ static struct uart_ops jsm_ops = {
         .start_tx       = jsm_tty_start_tx,
         .send_xchar     = jsm_tty_send_xchar,
         .stop_rx        = jsm_tty_stop_rx,
+        .enable_ms      = jsm_tty_enable_ms,
         .break_ctl      = jsm_tty_break,
         .startup        = jsm_tty_open,
         .shutdown       = jsm_tty_close,
diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c
index b2001c5b145c..56841fe5f483 100644
--- a/drivers/serial/mcf.c
+++ b/drivers/serial/mcf.c
@@ -212,10 +212,18 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios,
 {
         unsigned long flags;
         unsigned int baud, baudclk;
+#if defined(CONFIG_M5272)
+        unsigned int baudfr;
+#endif
         unsigned char mr1, mr2;
 
         baud = uart_get_baud_rate(port, termios, old, 0, 230400);
+#if defined(CONFIG_M5272)
+        baudclk = (MCF_BUSCLK / baud) / 32;
+        baudfr = (((MCF_BUSCLK / baud) + 1) / 2) % 16;
+#else
         baudclk = ((MCF_BUSCLK / baud) + 16) / 32;
+#endif
 
         mr1 = MCFUART_MR1_RXIRQRDY | MCFUART_MR1_RXERRCHAR;
         mr2 = 0;
@@ -262,6 +270,9 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios,
         writeb(mr2, port->membase + MCFUART_UMR);
         writeb((baudclk & 0xff00) >> 8, port->membase + MCFUART_UBG1);
         writeb((baudclk & 0xff), port->membase + MCFUART_UBG2);
+#if defined(CONFIG_M5272)
+        writeb((baudfr & 0x0f), port->membase + MCFUART_UFPD);
+#endif
         writeb(MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER,
                 port->membase + MCFUART_UCSR);
         writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,