diff options
author | Hitoshi Mitake <mitake@dcl.info.waseda.ac.jp> | 2010-06-21 02:10:51 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-06-21 02:10:51 -0400 |
commit | 3a598264436e94c410c413088a7873fcad33616c (patch) | |
tree | c02cc3a99fa5d114c869c64afed92f98584139d2 /drivers/serial | |
parent | dcac0d982777e75e022390d80019f7aeb2ec91f9 (diff) |
sh: SH-2007 board support.
This patch series adds support for ITO Co., Ltd.'s SH-2007 reference
platform (A PC-104 based SH7780 platform).
This is a direct port of the out-of-tree board support from the vendor's
kernel, originally located at:
http://ms-n.org/sh-linux/kernel/
More information on the board and the vendor can be obtained from the
vendor's site at:
http://www.itonet.co.jp/
Presently supported peripherals are CF and ethernet, with support for
the on-board IDE still pending further testing.
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Hitoshi Mitake <mitake@dcl.info.waseda.ac.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/sh-sci.h | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index f70c49f915fa..eb7ef4951e07 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -140,7 +140,15 @@ | |||
140 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | 140 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ |
141 | # define SCSPTR1 0xffe10024 /* 16 bit SCIF */ | 141 | # define SCSPTR1 0xffe10024 /* 16 bit SCIF */ |
142 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | 142 | # define SCIF_ORER 0x0001 /* Overrun error bit */ |
143 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 143 | |
144 | #if defined(CONFIG_SH_SH2007) | ||
145 | /* TIE=0,RIE=0,TE=1,RE=1,REIE=1,CKE1=0 */ | ||
146 | # define SCSCR_INIT(port) 0x38 | ||
147 | #else | ||
148 | /* TIE=0,RIE=0,TE=1,RE=1,REIE=1,CKE1=1 */ | ||
149 | # define SCSCR_INIT(port) 0x3a | ||
150 | #endif | ||
151 | |||
144 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 152 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
145 | defined(CONFIG_CPU_SUBTYPE_SH7786) | 153 | defined(CONFIG_CPU_SUBTYPE_SH7786) |
146 | # define SCSPTR0 0xffea0024 /* 16 bit SCIF */ | 154 | # define SCSPTR0 0xffea0024 /* 16 bit SCIF */ |
@@ -599,9 +607,10 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
599 | * -- Mitch Davis - 15 Jul 2000 | 607 | * -- Mitch Davis - 15 Jul 2000 |
600 | */ | 608 | */ |
601 | 609 | ||
602 | #if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 610 | #if (defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
603 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ | 611 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
604 | defined(CONFIG_CPU_SUBTYPE_SH7786) | 612 | defined(CONFIG_CPU_SUBTYPE_SH7786)) && \ |
613 | !defined(CONFIG_SH_SH2007) | ||
605 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) | 614 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) |
606 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 615 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
607 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 616 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |