diff options
author | Feng Tang <feng.tang@intel.com> | 2010-06-16 09:46:09 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-08-10 16:47:39 -0400 |
commit | 225109957a74c571c49e860fcc4e81fa6df1079d (patch) | |
tree | db94713b12419bc94fc5f59acec613d204e0fc2a /drivers/serial | |
parent | 7a56aa45982bb87bfca98a2832b5ae782c03364a (diff) |
mrst_max3110: add UART driver for Max3110 on Moorestown
This driver enable the max3110 device, it can be used as
a system console. the IRQ needs be enabled if user want a
better performance. MRST max3110 works in 3.684MHz clock,
which supports 230400 as its maximum rate.
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Kconfig | 17 | ||||
-rw-r--r-- | drivers/serial/Makefile | 1 | ||||
-rw-r--r-- | drivers/serial/mrst_max3110.c | 844 | ||||
-rw-r--r-- | drivers/serial/mrst_max3110.h | 59 |
4 files changed, 921 insertions, 0 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index e437ce8c1748..964634e79c16 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -690,6 +690,23 @@ config SERIAL_SA1100_CONSOLE | |||
690 | your boot loader (lilo or loadlin) about how to pass options to the | 690 | your boot loader (lilo or loadlin) about how to pass options to the |
691 | kernel at boot time.) | 691 | kernel at boot time.) |
692 | 692 | ||
693 | config SERIAL_MRST_MAX3110 | ||
694 | tristate "SPI UART driver for Max3110" | ||
695 | depends on SPI_DW_PCI | ||
696 | select SERIAL_CORE | ||
697 | select SERIAL_CORE_CONSOLE | ||
698 | help | ||
699 | This is the UART protocol driver for the MAX3110 device on | ||
700 | the Intel Moorestown platform. On other systems use the max3100 | ||
701 | driver. | ||
702 | |||
703 | config MRST_MAX3110_IRQ | ||
704 | boolean "Enable GPIO IRQ for Max3110 over Moorestown" | ||
705 | default n | ||
706 | depends on SERIAL_MRST_MAX3110 && GPIO_LANGWELL | ||
707 | help | ||
708 | This has to be enabled after Moorestown GPIO driver is loaded | ||
709 | |||
693 | config SERIAL_BFIN | 710 | config SERIAL_BFIN |
694 | tristate "Blackfin serial port support" | 711 | tristate "Blackfin serial port support" |
695 | depends on BLACKFIN | 712 | depends on BLACKFIN |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 208a85572c32..a5edb49c7303 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -84,3 +84,4 @@ obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o | |||
84 | obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o | 84 | obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o |
85 | obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o | 85 | obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o |
86 | obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o | 86 | obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o |
87 | obj-$(CONFIG_SERIAL_MRST_MAX3110) += mrst_max3110.o | ||
diff --git a/drivers/serial/mrst_max3110.c b/drivers/serial/mrst_max3110.c new file mode 100644 index 000000000000..273e7cbe74cd --- /dev/null +++ b/drivers/serial/mrst_max3110.c | |||
@@ -0,0 +1,844 @@ | |||
1 | /* | ||
2 | * max3110.c - spi uart protocol driver for Maxim 3110 on Moorestown | ||
3 | * | ||
4 | * Copyright (C) Intel 2008 Feng Tang <feng.tang@intel.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along with | ||
16 | * this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | */ | ||
19 | |||
20 | /* | ||
21 | * Note: | ||
22 | * 1. From Max3110 spec, the Rx FIFO has 8 words, while the Tx FIFO only has | ||
23 | * 1 word. If SPI master controller doesn't support sclk frequency change, | ||
24 | * then the char need be sent out one by one with some delay | ||
25 | * | ||
26 | * 2. Currently only RX availabe interrrupt is used, no need for waiting TXE | ||
27 | * interrupt for a low speed UART device | ||
28 | */ | ||
29 | |||
30 | #include <linux/module.h> | ||
31 | #include <linux/ioport.h> | ||
32 | #include <linux/init.h> | ||
33 | #include <linux/console.h> | ||
34 | #include <linux/sysrq.h> | ||
35 | #include <linux/platform_device.h> | ||
36 | #include <linux/tty.h> | ||
37 | #include <linux/tty_flip.h> | ||
38 | #include <linux/serial_core.h> | ||
39 | #include <linux/serial_reg.h> | ||
40 | |||
41 | #include <linux/kthread.h> | ||
42 | #include <linux/delay.h> | ||
43 | #include <asm/atomic.h> | ||
44 | #include <linux/spi/spi.h> | ||
45 | #include <linux/spi/dw_spi.h> | ||
46 | |||
47 | #include "mrst_max3110.h" | ||
48 | |||
49 | #define PR_FMT "mrst_max3110: " | ||
50 | |||
51 | struct uart_max3110 { | ||
52 | struct uart_port port; | ||
53 | struct spi_device *spi; | ||
54 | char *name; | ||
55 | |||
56 | wait_queue_head_t wq; | ||
57 | struct task_struct *main_thread; | ||
58 | struct task_struct *read_thread; | ||
59 | int mthread_up; | ||
60 | spinlock_t lock; | ||
61 | |||
62 | u32 baud; | ||
63 | u16 cur_conf; | ||
64 | u8 clock; | ||
65 | u8 parity, word_7bits; | ||
66 | |||
67 | atomic_t uart_tx_need; | ||
68 | |||
69 | /* console related */ | ||
70 | struct circ_buf con_xmit; | ||
71 | atomic_t con_tx_need; | ||
72 | |||
73 | /* irq related */ | ||
74 | u16 irq; | ||
75 | atomic_t irq_pending; | ||
76 | }; | ||
77 | |||
78 | /* global data structure, may need be removed */ | ||
79 | struct uart_max3110 *pmax; | ||
80 | static inline void receive_char(struct uart_max3110 *max, u8 ch); | ||
81 | static void receive_chars(struct uart_max3110 *max, | ||
82 | unsigned char *str, int len); | ||
83 | static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf); | ||
84 | static void max3110_console_receive(struct uart_max3110 *max); | ||
85 | |||
86 | int max3110_write_then_read(struct uart_max3110 *max, | ||
87 | const u8 *txbuf, u8 *rxbuf, unsigned len, int always_fast) | ||
88 | { | ||
89 | struct spi_device *spi = max->spi; | ||
90 | struct spi_message message; | ||
91 | struct spi_transfer x; | ||
92 | int ret; | ||
93 | |||
94 | if (!txbuf || !rxbuf) | ||
95 | return -EINVAL; | ||
96 | |||
97 | spi_message_init(&message); | ||
98 | memset(&x, 0, sizeof x); | ||
99 | x.len = len; | ||
100 | x.tx_buf = txbuf; | ||
101 | x.rx_buf = rxbuf; | ||
102 | spi_message_add_tail(&x, &message); | ||
103 | |||
104 | if (always_fast) | ||
105 | x.speed_hz = 3125000; | ||
106 | else if (max->baud) | ||
107 | x.speed_hz = max->baud; | ||
108 | |||
109 | /* Do the i/o */ | ||
110 | ret = spi_sync(spi, &message); | ||
111 | return ret; | ||
112 | } | ||
113 | |||
114 | /* Write a u16 to the device, and return one u16 read back */ | ||
115 | int max3110_out(struct uart_max3110 *max, const u16 out) | ||
116 | { | ||
117 | u16 tmp; | ||
118 | int ret; | ||
119 | |||
120 | ret = max3110_write_then_read(max, (u8 *)&out, (u8 *)&tmp, 2, 1); | ||
121 | if (ret) | ||
122 | return ret; | ||
123 | |||
124 | /* If some valid data is read back */ | ||
125 | if (tmp & MAX3110_READ_DATA_AVAILABLE) | ||
126 | receive_char(max, (tmp & 0xff)); | ||
127 | |||
128 | return ret; | ||
129 | } | ||
130 | |||
131 | #define MAX_READ_LEN 20 | ||
132 | /* | ||
133 | * This is usually used to read data from SPIC RX FIFO, which doesn't | ||
134 | * need any delay like flushing character out. It returns how many | ||
135 | * valide bytes are read back | ||
136 | */ | ||
137 | static int max3110_read_multi(struct uart_max3110 *max, int len, u8 *buf) | ||
138 | { | ||
139 | u16 out[MAX_READ_LEN], in[MAX_READ_LEN]; | ||
140 | u8 *pbuf, valid_str[MAX_READ_LEN]; | ||
141 | int i, j, bytelen; | ||
142 | |||
143 | if (len > MAX_READ_LEN) { | ||
144 | pr_err(PR_FMT "read len %d is too large\n", len); | ||
145 | return 0; | ||
146 | } | ||
147 | |||
148 | bytelen = len * 2; | ||
149 | memset(out, 0, bytelen); | ||
150 | memset(in, 0, bytelen); | ||
151 | |||
152 | if (max3110_write_then_read(max, (u8 *)out, (u8 *)in, bytelen, 1)) | ||
153 | return 0; | ||
154 | |||
155 | /* If caller don't provide a buffer, then handle received char */ | ||
156 | pbuf = buf ? buf : valid_str; | ||
157 | |||
158 | for (i = 0, j = 0; i < len; i++) { | ||
159 | if (in[i] & MAX3110_READ_DATA_AVAILABLE) | ||
160 | pbuf[j++] = (u8)(in[i] & 0xff); | ||
161 | } | ||
162 | |||
163 | if (j && (pbuf == valid_str)) | ||
164 | receive_chars(max, valid_str, j); | ||
165 | |||
166 | return j; | ||
167 | } | ||
168 | |||
169 | static void serial_m3110_con_putchar(struct uart_port *port, int ch) | ||
170 | { | ||
171 | struct uart_max3110 *max = | ||
172 | container_of(port, struct uart_max3110, port); | ||
173 | struct circ_buf *xmit = &max->con_xmit; | ||
174 | |||
175 | if (uart_circ_chars_free(xmit)) { | ||
176 | xmit->buf[xmit->head] = (char)ch; | ||
177 | xmit->head = (xmit->head + 1) & (PAGE_SIZE - 1); | ||
178 | } | ||
179 | |||
180 | if (!atomic_read(&max->con_tx_need)) { | ||
181 | atomic_set(&max->con_tx_need, 1); | ||
182 | wake_up_process(max->main_thread); | ||
183 | } | ||
184 | } | ||
185 | |||
186 | /* | ||
187 | * Print a string to the serial port trying not to disturb | ||
188 | * any possible real use of the port... | ||
189 | * | ||
190 | * The console_lock must be held when we get here. | ||
191 | */ | ||
192 | static void serial_m3110_con_write(struct console *co, | ||
193 | const char *s, unsigned int count) | ||
194 | { | ||
195 | if (!pmax) | ||
196 | return; | ||
197 | |||
198 | uart_console_write(&pmax->port, s, count, serial_m3110_con_putchar); | ||
199 | } | ||
200 | |||
201 | static int __init | ||
202 | serial_m3110_con_setup(struct console *co, char *options) | ||
203 | { | ||
204 | struct uart_max3110 *max = pmax; | ||
205 | int baud = 115200; | ||
206 | int bits = 8; | ||
207 | int parity = 'n'; | ||
208 | int flow = 'n'; | ||
209 | |||
210 | pr_info(PR_FMT "setting up console\n"); | ||
211 | |||
212 | if (!max) { | ||
213 | pr_err(PR_FMT "pmax is NULL, return"); | ||
214 | return -ENODEV; | ||
215 | } | ||
216 | |||
217 | if (options) | ||
218 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
219 | |||
220 | return uart_set_options(&max->port, co, baud, parity, bits, flow); | ||
221 | } | ||
222 | |||
223 | static struct tty_driver *serial_m3110_con_device(struct console *co, | ||
224 | int *index) | ||
225 | { | ||
226 | struct uart_driver *p = co->data; | ||
227 | *index = co->index; | ||
228 | return p->tty_driver; | ||
229 | } | ||
230 | |||
231 | static struct uart_driver serial_m3110_reg; | ||
232 | static struct console serial_m3110_console = { | ||
233 | .name = "ttyS", | ||
234 | .write = serial_m3110_con_write, | ||
235 | .device = serial_m3110_con_device, | ||
236 | .setup = serial_m3110_con_setup, | ||
237 | .flags = CON_PRINTBUFFER, | ||
238 | .index = -1, | ||
239 | .data = &serial_m3110_reg, | ||
240 | }; | ||
241 | |||
242 | #define MRST_CONSOLE (&serial_m3110_console) | ||
243 | |||
244 | static unsigned int serial_m3110_tx_empty(struct uart_port *port) | ||
245 | { | ||
246 | return 1; | ||
247 | } | ||
248 | |||
249 | static void serial_m3110_stop_tx(struct uart_port *port) | ||
250 | { | ||
251 | return; | ||
252 | } | ||
253 | |||
254 | /* stop_rx will be called in spin_lock env */ | ||
255 | static void serial_m3110_stop_rx(struct uart_port *port) | ||
256 | { | ||
257 | return; | ||
258 | } | ||
259 | |||
260 | #define WORDS_PER_XFER 128 | ||
261 | static inline void send_circ_buf(struct uart_max3110 *max, | ||
262 | struct circ_buf *xmit) | ||
263 | { | ||
264 | int len, left = 0; | ||
265 | u16 obuf[WORDS_PER_XFER], ibuf[WORDS_PER_XFER]; | ||
266 | u8 valid_str[WORDS_PER_XFER]; | ||
267 | int i, j; | ||
268 | |||
269 | while (!uart_circ_empty(xmit)) { | ||
270 | left = uart_circ_chars_pending(xmit); | ||
271 | while (left) { | ||
272 | len = (left >= WORDS_PER_XFER) ? WORDS_PER_XFER : left; | ||
273 | |||
274 | memset(obuf, 0, len * 2); | ||
275 | memset(ibuf, 0, len * 2); | ||
276 | for (i = 0; i < len; i++) { | ||
277 | obuf[i] = (u8)xmit->buf[xmit->tail] | WD_TAG; | ||
278 | xmit->tail = (xmit->tail + 1) & | ||
279 | (UART_XMIT_SIZE - 1); | ||
280 | } | ||
281 | max3110_write_then_read(max, (u8 *)obuf, | ||
282 | (u8 *)ibuf, len * 2, 0); | ||
283 | |||
284 | for (i = 0, j = 0; i < len; i++) { | ||
285 | if (ibuf[i] & MAX3110_READ_DATA_AVAILABLE) | ||
286 | valid_str[j++] = (u8)(ibuf[i] & 0xff); | ||
287 | } | ||
288 | |||
289 | if (j) | ||
290 | receive_chars(max, valid_str, j); | ||
291 | |||
292 | max->port.icount.tx += len; | ||
293 | left -= len; | ||
294 | } | ||
295 | } | ||
296 | } | ||
297 | |||
298 | static void transmit_char(struct uart_max3110 *max) | ||
299 | { | ||
300 | struct uart_port *port = &max->port; | ||
301 | struct circ_buf *xmit = &port->state->xmit; | ||
302 | |||
303 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) | ||
304 | return; | ||
305 | |||
306 | send_circ_buf(max, xmit); | ||
307 | |||
308 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
309 | uart_write_wakeup(port); | ||
310 | |||
311 | if (uart_circ_empty(xmit)) | ||
312 | serial_m3110_stop_tx(port); | ||
313 | } | ||
314 | |||
315 | /* This will be called by uart_write() and tty_write, can't | ||
316 | * go to sleep */ | ||
317 | static void serial_m3110_start_tx(struct uart_port *port) | ||
318 | { | ||
319 | struct uart_max3110 *max = | ||
320 | container_of(port, struct uart_max3110, port); | ||
321 | |||
322 | if (!atomic_read(&max->uart_tx_need)) { | ||
323 | atomic_set(&max->uart_tx_need, 1); | ||
324 | wake_up_process(max->main_thread); | ||
325 | } | ||
326 | } | ||
327 | |||
328 | static void receive_chars(struct uart_max3110 *max, unsigned char *str, int len) | ||
329 | { | ||
330 | struct uart_port *port = &max->port; | ||
331 | struct tty_struct *tty; | ||
332 | int usable; | ||
333 | |||
334 | /* If uart is not opened, just return */ | ||
335 | if (!port->state) | ||
336 | return; | ||
337 | |||
338 | tty = port->state->port.tty; | ||
339 | if (!tty) | ||
340 | return; /* receive some char before the tty is opened */ | ||
341 | |||
342 | while (len) { | ||
343 | usable = tty_buffer_request_room(tty, len); | ||
344 | if (usable) { | ||
345 | tty_insert_flip_string(tty, str, usable); | ||
346 | str += usable; | ||
347 | port->icount.rx += usable; | ||
348 | tty_flip_buffer_push(tty); | ||
349 | } | ||
350 | len -= usable; | ||
351 | } | ||
352 | } | ||
353 | |||
354 | static inline void receive_char(struct uart_max3110 *max, u8 ch) | ||
355 | { | ||
356 | receive_chars(max, &ch, 1); | ||
357 | } | ||
358 | |||
359 | static void max3110_console_receive(struct uart_max3110 *max) | ||
360 | { | ||
361 | int loop = 1, num, total = 0; | ||
362 | u8 recv_buf[512], *pbuf; | ||
363 | |||
364 | pbuf = recv_buf; | ||
365 | do { | ||
366 | num = max3110_read_multi(max, 8, pbuf); | ||
367 | |||
368 | if (num) { | ||
369 | loop = 10; | ||
370 | pbuf += num; | ||
371 | total += num; | ||
372 | |||
373 | if (total >= 500) { | ||
374 | receive_chars(max, recv_buf, total); | ||
375 | pbuf = recv_buf; | ||
376 | total = 0; | ||
377 | } | ||
378 | } | ||
379 | } while (--loop); | ||
380 | |||
381 | if (total) | ||
382 | receive_chars(max, recv_buf, total); | ||
383 | } | ||
384 | |||
385 | static int max3110_main_thread(void *_max) | ||
386 | { | ||
387 | struct uart_max3110 *max = _max; | ||
388 | wait_queue_head_t *wq = &max->wq; | ||
389 | int ret = 0; | ||
390 | struct circ_buf *xmit = &max->con_xmit; | ||
391 | |||
392 | init_waitqueue_head(wq); | ||
393 | pr_info(PR_FMT "start main thread\n"); | ||
394 | |||
395 | do { | ||
396 | wait_event_interruptible(*wq, (atomic_read(&max->irq_pending) || | ||
397 | atomic_read(&max->con_tx_need) || | ||
398 | atomic_read(&max->uart_tx_need)) || | ||
399 | kthread_should_stop()); | ||
400 | max->mthread_up = 1; | ||
401 | |||
402 | #ifdef CONFIG_MRST_MAX3110_IRQ | ||
403 | if (atomic_read(&max->irq_pending)) { | ||
404 | max3110_console_receive(max); | ||
405 | atomic_set(&max->irq_pending, 0); | ||
406 | } | ||
407 | #endif | ||
408 | |||
409 | /* first handle console output */ | ||
410 | if (atomic_read(&max->con_tx_need)) { | ||
411 | send_circ_buf(max, xmit); | ||
412 | atomic_set(&max->con_tx_need, 0); | ||
413 | } | ||
414 | |||
415 | /* handle uart output */ | ||
416 | if (atomic_read(&max->uart_tx_need)) { | ||
417 | transmit_char(max); | ||
418 | atomic_set(&max->uart_tx_need, 0); | ||
419 | } | ||
420 | max->mthread_up = 0; | ||
421 | } while (!kthread_should_stop()); | ||
422 | |||
423 | return ret; | ||
424 | } | ||
425 | |||
426 | #ifdef CONFIG_MRST_MAX3110_IRQ | ||
427 | static irqreturn_t serial_m3110_irq(int irq, void *dev_id) | ||
428 | { | ||
429 | struct uart_max3110 *max = dev_id; | ||
430 | |||
431 | /* max3110's irq is a falling edge, not level triggered, | ||
432 | * so no need to disable the irq */ | ||
433 | if (!atomic_read(&max->irq_pending)) { | ||
434 | atomic_inc(&max->irq_pending); | ||
435 | wake_up_process(max->main_thread); | ||
436 | } | ||
437 | return IRQ_HANDLED; | ||
438 | } | ||
439 | #else | ||
440 | /* if don't use RX IRQ, then need a thread to polling read */ | ||
441 | static int max3110_read_thread(void *_max) | ||
442 | { | ||
443 | struct uart_max3110 *max = _max; | ||
444 | |||
445 | pr_info(PR_FMT "start read thread\n"); | ||
446 | do { | ||
447 | if (!max->mthread_up) | ||
448 | max3110_console_receive(max); | ||
449 | |||
450 | set_current_state(TASK_INTERRUPTIBLE); | ||
451 | schedule_timeout(HZ / 20); | ||
452 | } while (!kthread_should_stop()); | ||
453 | |||
454 | return 0; | ||
455 | } | ||
456 | #endif | ||
457 | |||
458 | static int serial_m3110_startup(struct uart_port *port) | ||
459 | { | ||
460 | struct uart_max3110 *max = | ||
461 | container_of(port, struct uart_max3110, port); | ||
462 | u16 config = 0; | ||
463 | int ret = 0; | ||
464 | |||
465 | if (port->line != 0) | ||
466 | pr_err(PR_FMT "uart port startup failed\n"); | ||
467 | |||
468 | /* firstly disable all IRQ and config it to 115200, 8n1 */ | ||
469 | config = WC_TAG | WC_FIFO_ENABLE | ||
470 | | WC_1_STOPBITS | ||
471 | | WC_8BIT_WORD | ||
472 | | WC_BAUD_DR2; | ||
473 | ret = max3110_out(max, config); | ||
474 | |||
475 | /* as we use thread to handle tx/rx, need set low latency */ | ||
476 | port->state->port.tty->low_latency = 1; | ||
477 | |||
478 | #ifdef CONFIG_MRST_MAX3110_IRQ | ||
479 | ret = request_irq(max->irq, serial_m3110_irq, | ||
480 | IRQ_TYPE_EDGE_FALLING, "max3110", max); | ||
481 | if (ret) | ||
482 | return ret; | ||
483 | |||
484 | /* enable RX IRQ only */ | ||
485 | config |= WC_RXA_IRQ_ENABLE; | ||
486 | max3110_out(max, config); | ||
487 | #else | ||
488 | /* if IRQ is disabled, start a read thread for input data */ | ||
489 | max->read_thread = | ||
490 | kthread_run(max3110_read_thread, max, "max3110_read"); | ||
491 | #endif | ||
492 | |||
493 | max->cur_conf = config; | ||
494 | return 0; | ||
495 | } | ||
496 | |||
497 | static void serial_m3110_shutdown(struct uart_port *port) | ||
498 | { | ||
499 | struct uart_max3110 *max = | ||
500 | container_of(port, struct uart_max3110, port); | ||
501 | u16 config; | ||
502 | |||
503 | if (max->read_thread) { | ||
504 | kthread_stop(max->read_thread); | ||
505 | max->read_thread = NULL; | ||
506 | } | ||
507 | |||
508 | #ifdef CONFIG_MRST_MAX3110_IRQ | ||
509 | free_irq(max->irq, max); | ||
510 | #endif | ||
511 | |||
512 | /* Disable interrupts from this port */ | ||
513 | config = WC_TAG | WC_SW_SHDI; | ||
514 | max3110_out(max, config); | ||
515 | } | ||
516 | |||
517 | static void serial_m3110_release_port(struct uart_port *port) | ||
518 | { | ||
519 | } | ||
520 | |||
521 | static int serial_m3110_request_port(struct uart_port *port) | ||
522 | { | ||
523 | return 0; | ||
524 | } | ||
525 | |||
526 | static void serial_m3110_config_port(struct uart_port *port, int flags) | ||
527 | { | ||
528 | /* give it fake type */ | ||
529 | port->type = PORT_PXA; | ||
530 | } | ||
531 | |||
532 | static int | ||
533 | serial_m3110_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
534 | { | ||
535 | /* we don't want the core code to modify any port params */ | ||
536 | return -EINVAL; | ||
537 | } | ||
538 | |||
539 | |||
540 | static const char *serial_m3110_type(struct uart_port *port) | ||
541 | { | ||
542 | struct uart_max3110 *max = | ||
543 | container_of(port, struct uart_max3110, port); | ||
544 | return max->name; | ||
545 | } | ||
546 | |||
547 | static void | ||
548 | serial_m3110_set_termios(struct uart_port *port, struct ktermios *termios, | ||
549 | struct ktermios *old) | ||
550 | { | ||
551 | struct uart_max3110 *max = | ||
552 | container_of(port, struct uart_max3110, port); | ||
553 | unsigned char cval; | ||
554 | unsigned int baud, parity = 0; | ||
555 | int clk_div = -1; | ||
556 | u16 new_conf = max->cur_conf; | ||
557 | |||
558 | switch (termios->c_cflag & CSIZE) { | ||
559 | case CS7: | ||
560 | cval = UART_LCR_WLEN7; | ||
561 | new_conf |= WC_7BIT_WORD; | ||
562 | break; | ||
563 | default: | ||
564 | case CS8: | ||
565 | cval = UART_LCR_WLEN8; | ||
566 | new_conf |= WC_8BIT_WORD; | ||
567 | break; | ||
568 | } | ||
569 | |||
570 | baud = uart_get_baud_rate(port, termios, old, 0, 230400); | ||
571 | |||
572 | /* first calc the div for 1.8MHZ clock case */ | ||
573 | switch (baud) { | ||
574 | case 300: | ||
575 | clk_div = WC_BAUD_DR384; | ||
576 | break; | ||
577 | case 600: | ||
578 | clk_div = WC_BAUD_DR192; | ||
579 | break; | ||
580 | case 1200: | ||
581 | clk_div = WC_BAUD_DR96; | ||
582 | break; | ||
583 | case 2400: | ||
584 | clk_div = WC_BAUD_DR48; | ||
585 | break; | ||
586 | case 4800: | ||
587 | clk_div = WC_BAUD_DR24; | ||
588 | break; | ||
589 | case 9600: | ||
590 | clk_div = WC_BAUD_DR12; | ||
591 | break; | ||
592 | case 19200: | ||
593 | clk_div = WC_BAUD_DR6; | ||
594 | break; | ||
595 | case 38400: | ||
596 | clk_div = WC_BAUD_DR3; | ||
597 | break; | ||
598 | case 57600: | ||
599 | clk_div = WC_BAUD_DR2; | ||
600 | break; | ||
601 | case 115200: | ||
602 | clk_div = WC_BAUD_DR1; | ||
603 | break; | ||
604 | case 230400: | ||
605 | if (max->clock & MAX3110_HIGH_CLK) | ||
606 | break; | ||
607 | default: | ||
608 | /* pick the previous baud rate */ | ||
609 | baud = max->baud; | ||
610 | clk_div = max->cur_conf & WC_BAUD_DIV_MASK; | ||
611 | tty_termios_encode_baud_rate(termios, baud, baud); | ||
612 | } | ||
613 | |||
614 | if (max->clock & MAX3110_HIGH_CLK) { | ||
615 | clk_div += 1; | ||
616 | /* high clk version max3110 doesn't support B300 */ | ||
617 | if (baud == 300) | ||
618 | baud = 600; | ||
619 | if (baud == 230400) | ||
620 | clk_div = WC_BAUD_DR1; | ||
621 | tty_termios_encode_baud_rate(termios, baud, baud); | ||
622 | } | ||
623 | |||
624 | new_conf = (new_conf & ~WC_BAUD_DIV_MASK) | clk_div; | ||
625 | if (termios->c_cflag & CSTOPB) | ||
626 | new_conf |= WC_2_STOPBITS; | ||
627 | else | ||
628 | new_conf &= ~WC_2_STOPBITS; | ||
629 | |||
630 | if (termios->c_cflag & PARENB) { | ||
631 | new_conf |= WC_PARITY_ENABLE; | ||
632 | parity |= UART_LCR_PARITY; | ||
633 | } else | ||
634 | new_conf &= ~WC_PARITY_ENABLE; | ||
635 | |||
636 | if (!(termios->c_cflag & PARODD)) | ||
637 | parity |= UART_LCR_EPAR; | ||
638 | max->parity = parity; | ||
639 | |||
640 | uart_update_timeout(port, termios->c_cflag, baud); | ||
641 | |||
642 | new_conf |= WC_TAG; | ||
643 | if (new_conf != max->cur_conf) { | ||
644 | max3110_out(max, new_conf); | ||
645 | max->cur_conf = new_conf; | ||
646 | max->baud = baud; | ||
647 | } | ||
648 | } | ||
649 | |||
650 | /* don't handle hw handshaking */ | ||
651 | static unsigned int serial_m3110_get_mctrl(struct uart_port *port) | ||
652 | { | ||
653 | return TIOCM_DSR | TIOCM_CAR | TIOCM_DSR; | ||
654 | } | ||
655 | |||
656 | static void serial_m3110_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
657 | { | ||
658 | } | ||
659 | |||
660 | static void serial_m3110_break_ctl(struct uart_port *port, int break_state) | ||
661 | { | ||
662 | } | ||
663 | |||
664 | static void serial_m3110_pm(struct uart_port *port, unsigned int state, | ||
665 | unsigned int oldstate) | ||
666 | { | ||
667 | } | ||
668 | |||
669 | static void serial_m3110_enable_ms(struct uart_port *port) | ||
670 | { | ||
671 | } | ||
672 | |||
673 | struct uart_ops serial_m3110_ops = { | ||
674 | .tx_empty = serial_m3110_tx_empty, | ||
675 | .set_mctrl = serial_m3110_set_mctrl, | ||
676 | .get_mctrl = serial_m3110_get_mctrl, | ||
677 | .stop_tx = serial_m3110_stop_tx, | ||
678 | .start_tx = serial_m3110_start_tx, | ||
679 | .stop_rx = serial_m3110_stop_rx, | ||
680 | .enable_ms = serial_m3110_enable_ms, | ||
681 | .break_ctl = serial_m3110_break_ctl, | ||
682 | .startup = serial_m3110_startup, | ||
683 | .shutdown = serial_m3110_shutdown, | ||
684 | .set_termios = serial_m3110_set_termios, /* must have */ | ||
685 | .pm = serial_m3110_pm, | ||
686 | .type = serial_m3110_type, | ||
687 | .release_port = serial_m3110_release_port, | ||
688 | .request_port = serial_m3110_request_port, | ||
689 | .config_port = serial_m3110_config_port, | ||
690 | .verify_port = serial_m3110_verify_port, | ||
691 | }; | ||
692 | |||
693 | static struct uart_driver serial_m3110_reg = { | ||
694 | .owner = THIS_MODULE, | ||
695 | .driver_name = "MRST serial", | ||
696 | .dev_name = "ttyS", | ||
697 | .major = TTY_MAJOR, | ||
698 | .minor = 64, | ||
699 | .nr = 1, | ||
700 | .cons = MRST_CONSOLE, | ||
701 | }; | ||
702 | |||
703 | static int serial_m3110_suspend(struct spi_device *spi, pm_message_t state) | ||
704 | { | ||
705 | return 0; | ||
706 | } | ||
707 | |||
708 | static int serial_m3110_resume(struct spi_device *spi) | ||
709 | { | ||
710 | return 0; | ||
711 | } | ||
712 | |||
713 | static struct dw_spi_chip spi0_uart = { | ||
714 | .poll_mode = 1, | ||
715 | .enable_dma = 0, | ||
716 | .type = SPI_FRF_SPI, | ||
717 | }; | ||
718 | |||
719 | static int serial_m3110_probe(struct spi_device *spi) | ||
720 | { | ||
721 | struct uart_max3110 *max; | ||
722 | int ret; | ||
723 | unsigned char *buffer; | ||
724 | |||
725 | max = kzalloc(sizeof(*max), GFP_KERNEL); | ||
726 | if (!max) | ||
727 | return -ENOMEM; | ||
728 | |||
729 | /* set spi info */ | ||
730 | spi->mode = SPI_MODE_0; | ||
731 | spi->bits_per_word = 16; | ||
732 | max->clock = MAX3110_HIGH_CLK; | ||
733 | spi->controller_data = &spi0_uart; | ||
734 | |||
735 | spi_setup(spi); | ||
736 | |||
737 | max->port.type = PORT_PXA; /* need apply for a max3110 type */ | ||
738 | max->port.fifosize = 2; /* only have 16b buffer */ | ||
739 | max->port.ops = &serial_m3110_ops; | ||
740 | max->port.line = 0; | ||
741 | max->port.dev = &spi->dev; | ||
742 | max->port.uartclk = 115200; | ||
743 | |||
744 | max->spi = spi; | ||
745 | max->name = spi->modalias; /* use spi name as the name */ | ||
746 | max->irq = (u16)spi->irq; | ||
747 | |||
748 | spin_lock_init(&max->lock); | ||
749 | |||
750 | max->word_7bits = 0; | ||
751 | max->parity = 0; | ||
752 | max->baud = 0; | ||
753 | |||
754 | max->cur_conf = 0; | ||
755 | atomic_set(&max->irq_pending, 0); | ||
756 | |||
757 | buffer = (unsigned char *)__get_free_page(GFP_KERNEL); | ||
758 | if (!buffer) { | ||
759 | ret = -ENOMEM; | ||
760 | goto err_get_page; | ||
761 | } | ||
762 | max->con_xmit.buf = (unsigned char *)buffer; | ||
763 | max->con_xmit.head = max->con_xmit.tail = 0; | ||
764 | |||
765 | max->main_thread = kthread_run(max3110_main_thread, | ||
766 | max, "max3110_main"); | ||
767 | if (IS_ERR(max->main_thread)) { | ||
768 | ret = PTR_ERR(max->main_thread); | ||
769 | goto err_kthread; | ||
770 | } | ||
771 | |||
772 | pmax = max; | ||
773 | /* give membase a psudo value to pass serial_core's check */ | ||
774 | max->port.membase = (void *)0xff110000; | ||
775 | uart_add_one_port(&serial_m3110_reg, &max->port); | ||
776 | |||
777 | return 0; | ||
778 | |||
779 | err_kthread: | ||
780 | free_page((unsigned long)buffer); | ||
781 | err_get_page: | ||
782 | pmax = NULL; | ||
783 | kfree(max); | ||
784 | return ret; | ||
785 | } | ||
786 | |||
787 | static int max3110_remove(struct spi_device *dev) | ||
788 | { | ||
789 | struct uart_max3110 *max = pmax; | ||
790 | |||
791 | if (!pmax) | ||
792 | return 0; | ||
793 | |||
794 | pmax = NULL; | ||
795 | uart_remove_one_port(&serial_m3110_reg, &max->port); | ||
796 | |||
797 | free_page((unsigned long)max->con_xmit.buf); | ||
798 | |||
799 | if (max->main_thread) | ||
800 | kthread_stop(max->main_thread); | ||
801 | |||
802 | kfree(max); | ||
803 | return 0; | ||
804 | } | ||
805 | |||
806 | static struct spi_driver uart_max3110_driver = { | ||
807 | .driver = { | ||
808 | .name = "spi_max3111", | ||
809 | .bus = &spi_bus_type, | ||
810 | .owner = THIS_MODULE, | ||
811 | }, | ||
812 | .probe = serial_m3110_probe, | ||
813 | .remove = __devexit_p(max3110_remove), | ||
814 | .suspend = serial_m3110_suspend, | ||
815 | .resume = serial_m3110_resume, | ||
816 | }; | ||
817 | |||
818 | |||
819 | int __init serial_m3110_init(void) | ||
820 | { | ||
821 | int ret = 0; | ||
822 | |||
823 | ret = uart_register_driver(&serial_m3110_reg); | ||
824 | if (ret) | ||
825 | return ret; | ||
826 | |||
827 | ret = spi_register_driver(&uart_max3110_driver); | ||
828 | if (ret) | ||
829 | uart_unregister_driver(&serial_m3110_reg); | ||
830 | |||
831 | return ret; | ||
832 | } | ||
833 | |||
834 | void __exit serial_m3110_exit(void) | ||
835 | { | ||
836 | spi_unregister_driver(&uart_max3110_driver); | ||
837 | uart_unregister_driver(&serial_m3110_reg); | ||
838 | } | ||
839 | |||
840 | module_init(serial_m3110_init); | ||
841 | module_exit(serial_m3110_exit); | ||
842 | |||
843 | MODULE_LICENSE("GPL"); | ||
844 | MODULE_ALIAS("max3110-uart"); | ||
diff --git a/drivers/serial/mrst_max3110.h b/drivers/serial/mrst_max3110.h new file mode 100644 index 000000000000..363478acb2c3 --- /dev/null +++ b/drivers/serial/mrst_max3110.h | |||
@@ -0,0 +1,59 @@ | |||
1 | #ifndef _MRST_MAX3110_H | ||
2 | #define _MRST_MAX3110_H | ||
3 | |||
4 | #define MAX3110_HIGH_CLK 0x1 /* 3.6864 MHZ */ | ||
5 | #define MAX3110_LOW_CLK 0x0 /* 1.8432 MHZ */ | ||
6 | |||
7 | /* status bits for all 4 MAX3110 operate modes */ | ||
8 | #define MAX3110_READ_DATA_AVAILABLE (1 << 15) | ||
9 | #define MAX3110_WRITE_BUF_EMPTY (1 << 14) | ||
10 | |||
11 | #define WC_TAG (3 << 14) | ||
12 | #define RC_TAG (1 << 14) | ||
13 | #define WD_TAG (2 << 14) | ||
14 | #define RD_TAG (0 << 14) | ||
15 | |||
16 | /* bits def for write configuration */ | ||
17 | #define WC_FIFO_ENABLE_MASK (1 << 13) | ||
18 | #define WC_FIFO_ENABLE (0 << 13) | ||
19 | |||
20 | #define WC_SW_SHDI (1 << 12) | ||
21 | |||
22 | #define WC_IRQ_MASK (0xF << 8) | ||
23 | #define WC_TXE_IRQ_ENABLE (1 << 11) /* TX empty irq */ | ||
24 | #define WC_RXA_IRQ_ENABLE (1 << 10) /* RX availabe irq */ | ||
25 | #define WC_PAR_HIGH_IRQ_ENABLE (1 << 9) | ||
26 | #define WC_REC_ACT_IRQ_ENABLE (1 << 8) | ||
27 | |||
28 | #define WC_IRDA_ENABLE (1 << 7) | ||
29 | |||
30 | #define WC_STOPBITS_MASK (1 << 6) | ||
31 | #define WC_2_STOPBITS (1 << 6) | ||
32 | #define WC_1_STOPBITS (0 << 6) | ||
33 | |||
34 | #define WC_PARITY_ENABLE_MASK (1 << 5) | ||
35 | #define WC_PARITY_ENABLE (1 << 5) | ||
36 | |||
37 | #define WC_WORDLEN_MASK (1 << 4) | ||
38 | #define WC_7BIT_WORD (1 << 4) | ||
39 | #define WC_8BIT_WORD (0 << 4) | ||
40 | |||
41 | #define WC_BAUD_DIV_MASK (0xF) | ||
42 | #define WC_BAUD_DR1 (0x0) | ||
43 | #define WC_BAUD_DR2 (0x1) | ||
44 | #define WC_BAUD_DR4 (0x2) | ||
45 | #define WC_BAUD_DR8 (0x3) | ||
46 | #define WC_BAUD_DR16 (0x4) | ||
47 | #define WC_BAUD_DR32 (0x5) | ||
48 | #define WC_BAUD_DR64 (0x6) | ||
49 | #define WC_BAUD_DR128 (0x7) | ||
50 | #define WC_BAUD_DR3 (0x8) | ||
51 | #define WC_BAUD_DR6 (0x9) | ||
52 | #define WC_BAUD_DR12 (0xA) | ||
53 | #define WC_BAUD_DR24 (0xB) | ||
54 | #define WC_BAUD_DR48 (0xC) | ||
55 | #define WC_BAUD_DR96 (0xD) | ||
56 | #define WC_BAUD_DR192 (0xE) | ||
57 | #define WC_BAUD_DR384 (0xF) | ||
58 | |||
59 | #endif | ||