diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 19:00:54 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 19:00:54 -0500 |
commit | dca1d9f6d7ae428c193f32bd3e9a4ca13176648b (patch) | |
tree | 02de8c3503c1c811754423d2fa3f3b4978044f6e /drivers/serial | |
parent | 9ff99339447de403a46be5e3f23d0c794d540b06 (diff) | |
parent | 91e013827c0bcbb187ecf02213c5446b6f62d445 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (370 commits)
ARM: S3C2443: Add set_rate and round_rate calls for armdiv clock
ARM: S3C2443: Remove #if 0 for clk_mpll
ARM: S3C2443: Update notes on MPLLREF clock
ARM: S3C2443: Further clksrc-clk conversions
ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation
USB: Fix s3c-hsotg build following Samsung platform header moves
ARM: S3C64XX: Reintroduce unconditional build of audio device
ARM: 5961/1: ux500: fix CLKRST addresses
ARM: 5977/1: arm: Enable backtrace printing on oops when PC is corrupted
ASoC: Fix S3C64xx IIS driver for Samsung header reorg
ARM: S3C2440: Fix plat-s3c24xx move of s3c2440/s3c2442 support
[ARM] pxa: fix typo in mxm8x10.h
[ARM] pxa/raumfeld: set GPIO drive bits for LED pins
[ARM] pxa/zeus: Add support for mcp2515 CAN bus
[ARM] pxa/zeus: Add support for onboard max6369 watchdog
[ARM] pxa/zeus: Add Eurotech as the manufacturer
[ARM] pxa/zeus: Correct the USB host initialisation flags
[ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress
[ARM] pxa: refactor uncompress.h for non-PXA uarts
[ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs
...
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Kconfig | 31 | ||||
-rw-r--r-- | drivers/serial/Makefile | 1 | ||||
-rw-r--r-- | drivers/serial/imx.c | 2 | ||||
-rw-r--r-- | drivers/serial/s3c2412.c | 1 | ||||
-rw-r--r-- | drivers/serial/s5pv210.c | 154 | ||||
-rw-r--r-- | drivers/serial/samsung.c | 6 | ||||
-rw-r--r-- | drivers/serial/samsung.h | 19 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 22 |
8 files changed, 210 insertions, 26 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index d6ff73395623..f55c49475a8c 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -447,7 +447,7 @@ config SERIAL_CLPS711X_CONSOLE | |||
447 | 447 | ||
448 | config SERIAL_SAMSUNG | 448 | config SERIAL_SAMSUNG |
449 | tristate "Samsung SoC serial support" | 449 | tristate "Samsung SoC serial support" |
450 | depends on ARM && PLAT_S3C | 450 | depends on ARM && PLAT_SAMSUNG |
451 | select SERIAL_CORE | 451 | select SERIAL_CORE |
452 | help | 452 | help |
453 | Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, | 453 | Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, |
@@ -455,11 +455,18 @@ config SERIAL_SAMSUNG | |||
455 | provide all of these ports, depending on how the serial port | 455 | provide all of these ports, depending on how the serial port |
456 | pins are configured. | 456 | pins are configured. |
457 | 457 | ||
458 | config SERIAL_SAMSUNG_UARTS_4 | ||
459 | bool | ||
460 | depends on ARM && PLAT_SAMSUNG | ||
461 | default y if CPU_S3C2443 | ||
462 | help | ||
463 | Internal node for the common case of 4 Samsung compatible UARTs | ||
464 | |||
458 | config SERIAL_SAMSUNG_UARTS | 465 | config SERIAL_SAMSUNG_UARTS |
459 | int | 466 | int |
460 | depends on ARM && PLAT_S3C | 467 | depends on ARM && PLAT_SAMSUNG |
461 | default 2 if ARCH_S3C2400 | 468 | default 2 if ARCH_S3C2400 |
462 | default 4 if ARCH_S5PC1XX || ARCH_S3C64XX || CPU_S3C2443 | 469 | default 4 if SERIAL_SAMSUNG_UARTS_4 |
463 | default 3 | 470 | default 3 |
464 | help | 471 | help |
465 | Select the number of available UART ports for the Samsung S3C | 472 | Select the number of available UART ports for the Samsung S3C |
@@ -526,20 +533,30 @@ config SERIAL_S3C24A0 | |||
526 | Serial port support for the Samsung S3C24A0 SoC | 533 | Serial port support for the Samsung S3C24A0 SoC |
527 | 534 | ||
528 | config SERIAL_S3C6400 | 535 | config SERIAL_S3C6400 |
529 | tristate "Samsung S3C6400/S3C6410 Serial port support" | 536 | tristate "Samsung S3C6400/S3C6410/S5P6440 Seria port support" |
530 | depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410) | 537 | depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440) |
538 | select SERIAL_SAMSUNG_UARTS_4 | ||
531 | default y | 539 | default y |
532 | help | 540 | help |
533 | Serial port support for the Samsung S3C6400 and S3C6410 | 541 | Serial port support for the Samsung S3C6400, S3C6410 and S5P6440 |
534 | SoCs | 542 | SoCs |
535 | 543 | ||
536 | config SERIAL_S5PC100 | 544 | config SERIAL_S5PC100 |
537 | tristate "Samsung S5PC100 Serial port support" | 545 | tristate "Samsung S5PC100 Serial port support" |
538 | depends on SERIAL_SAMSUNG && CPU_S5PC100 | 546 | depends on SERIAL_SAMSUNG && CPU_S5PC100 |
547 | select SERIAL_SAMSUNG_UARTS_4 | ||
539 | default y | 548 | default y |
540 | help | 549 | help |
541 | Serial port support for the Samsung S5PC100 SoCs | 550 | Serial port support for the Samsung S5PC100 SoCs |
542 | 551 | ||
552 | config SERIAL_S5PV210 | ||
553 | tristate "Samsung S5PV210 Serial port support" | ||
554 | depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442) | ||
555 | select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210 | ||
556 | default y | ||
557 | help | ||
558 | Serial port support for Samsung's S5P Family of SoC's | ||
559 | |||
543 | config SERIAL_MAX3100 | 560 | config SERIAL_MAX3100 |
544 | tristate "MAX3100 support" | 561 | tristate "MAX3100 support" |
545 | depends on SPI | 562 | depends on SPI |
@@ -996,7 +1013,7 @@ config SERIAL_IP22_ZILOG_CONSOLE | |||
996 | 1013 | ||
997 | config SERIAL_SH_SCI | 1014 | config SERIAL_SH_SCI |
998 | tristate "SuperH SCI(F) serial port support" | 1015 | tristate "SuperH SCI(F) serial port support" |
999 | depends on HAVE_CLK && (SUPERH || H8300) | 1016 | depends on HAVE_CLK && (SUPERH || H8300 || ARCH_SHMOBILE) |
1000 | select SERIAL_CORE | 1017 | select SERIAL_CORE |
1001 | 1018 | ||
1002 | config SERIAL_SH_SCI_NR_UARTS | 1019 | config SERIAL_SH_SCI_NR_UARTS |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 5548fe7df61d..6aa4723b74ee 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -45,6 +45,7 @@ obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o | |||
45 | obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o | 45 | obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o |
46 | obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o | 46 | obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o |
47 | obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o | 47 | obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o |
48 | obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o | ||
48 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o | 49 | obj-$(CONFIG_SERIAL_MAX3100) += max3100.o |
49 | obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o | 50 | obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o |
50 | obj-$(CONFIG_SERIAL_MUX) += mux.o | 51 | obj-$(CONFIG_SERIAL_MUX) += mux.o |
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index d00fcf8e6c70..e579d7a1807a 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c | |||
@@ -440,7 +440,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id) | |||
440 | 440 | ||
441 | temp = readl(sport->port.membase + USR2); | 441 | temp = readl(sport->port.membase + USR2); |
442 | if (temp & USR2_BRCD) { | 442 | if (temp & USR2_BRCD) { |
443 | writel(temp | USR2_BRCD, sport->port.membase + USR2); | 443 | writel(USR2_BRCD, sport->port.membase + USR2); |
444 | if (uart_handle_break(&sport->port)) | 444 | if (uart_handle_break(&sport->port)) |
445 | continue; | 445 | continue; |
446 | } | 446 | } |
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c index ce75e28e36ef..1700b1a2fb7e 100644 --- a/drivers/serial/s3c2412.c +++ b/drivers/serial/s3c2412.c | |||
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = { | |||
102 | .name = "Samsung S3C2412 UART", | 102 | .name = "Samsung S3C2412 UART", |
103 | .type = PORT_S3C2412, | 103 | .type = PORT_S3C2412, |
104 | .fifosize = 64, | 104 | .fifosize = 64, |
105 | .has_divslot = 1, | ||
105 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | 106 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, |
106 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | 107 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, |
107 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | 108 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, |
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c new file mode 100644 index 000000000000..8dc03837617b --- /dev/null +++ b/drivers/serial/s5pv210.c | |||
@@ -0,0 +1,154 @@ | |||
1 | /* linux/drivers/serial/s5pv210.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Based on drivers/serial/s3c6400.c | ||
7 | * | ||
8 | * Driver for Samsung S5PV210 SoC UARTs. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/module.h> | ||
16 | #include <linux/ioport.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/serial_core.h> | ||
21 | #include <linux/serial.h> | ||
22 | |||
23 | #include <asm/irq.h> | ||
24 | #include <mach/hardware.h> | ||
25 | #include <plat/regs-serial.h> | ||
26 | #include "samsung.h" | ||
27 | |||
28 | static int s5pv210_serial_setsource(struct uart_port *port, | ||
29 | struct s3c24xx_uart_clksrc *clk) | ||
30 | { | ||
31 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
32 | |||
33 | if (strcmp(clk->name, "pclk") == 0) | ||
34 | ucon &= ~S5PV210_UCON_CLKMASK; | ||
35 | else if (strcmp(clk->name, "uclk1") == 0) | ||
36 | ucon |= S5PV210_UCON_CLKMASK; | ||
37 | else { | ||
38 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
39 | return -EINVAL; | ||
40 | } | ||
41 | |||
42 | wr_regl(port, S3C2410_UCON, ucon); | ||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | |||
47 | static int s5pv210_serial_getsource(struct uart_port *port, | ||
48 | struct s3c24xx_uart_clksrc *clk) | ||
49 | { | ||
50 | u32 ucon = rd_regl(port, S3C2410_UCON); | ||
51 | |||
52 | clk->divisor = 1; | ||
53 | |||
54 | switch (ucon & S5PV210_UCON_CLKMASK) { | ||
55 | case S5PV210_UCON_PCLK: | ||
56 | clk->name = "pclk"; | ||
57 | break; | ||
58 | case S5PV210_UCON_UCLK: | ||
59 | clk->name = "uclk1"; | ||
60 | break; | ||
61 | } | ||
62 | |||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | static int s5pv210_serial_resetport(struct uart_port *port, | ||
67 | struct s3c2410_uartcfg *cfg) | ||
68 | { | ||
69 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
70 | |||
71 | ucon &= S5PV210_UCON_CLKMASK; | ||
72 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
73 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
74 | |||
75 | /* reset both fifos */ | ||
76 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
77 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
78 | |||
79 | return 0; | ||
80 | } | ||
81 | |||
82 | #define S5PV210_UART_DEFAULT_INFO(fifo_size) \ | ||
83 | .name = "Samsung S5PV210 UART0", \ | ||
84 | .type = PORT_S3C6400, \ | ||
85 | .fifosize = fifo_size, \ | ||
86 | .has_divslot = 1, \ | ||
87 | .rx_fifomask = S5PV210_UFSTAT_RXMASK, \ | ||
88 | .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \ | ||
89 | .rx_fifofull = S5PV210_UFSTAT_RXFULL, \ | ||
90 | .tx_fifofull = S5PV210_UFSTAT_TXFULL, \ | ||
91 | .tx_fifomask = S5PV210_UFSTAT_TXMASK, \ | ||
92 | .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \ | ||
93 | .get_clksrc = s5pv210_serial_getsource, \ | ||
94 | .set_clksrc = s5pv210_serial_setsource, \ | ||
95 | .reset_port = s5pv210_serial_resetport | ||
96 | |||
97 | static struct s3c24xx_uart_info s5p_port_fifo256 = { | ||
98 | S5PV210_UART_DEFAULT_INFO(256), | ||
99 | }; | ||
100 | |||
101 | static struct s3c24xx_uart_info s5p_port_fifo64 = { | ||
102 | S5PV210_UART_DEFAULT_INFO(64), | ||
103 | }; | ||
104 | |||
105 | static struct s3c24xx_uart_info s5p_port_fifo16 = { | ||
106 | S5PV210_UART_DEFAULT_INFO(16), | ||
107 | }; | ||
108 | |||
109 | static struct s3c24xx_uart_info *s5p_uart_inf[] = { | ||
110 | [0] = &s5p_port_fifo256, | ||
111 | [1] = &s5p_port_fifo64, | ||
112 | [2] = &s5p_port_fifo16, | ||
113 | [3] = &s5p_port_fifo16, | ||
114 | }; | ||
115 | |||
116 | /* device management */ | ||
117 | static int s5p_serial_probe(struct platform_device *pdev) | ||
118 | { | ||
119 | return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]); | ||
120 | } | ||
121 | |||
122 | static struct platform_driver s5p_serial_drv = { | ||
123 | .probe = s5p_serial_probe, | ||
124 | .remove = __devexit_p(s3c24xx_serial_remove), | ||
125 | .driver = { | ||
126 | .name = "s5pv210-uart", | ||
127 | .owner = THIS_MODULE, | ||
128 | }, | ||
129 | }; | ||
130 | |||
131 | static int __init s5pv210_serial_console_init(void) | ||
132 | { | ||
133 | return s3c24xx_serial_initconsole(&s5p_serial_drv, s5p_uart_inf); | ||
134 | } | ||
135 | |||
136 | console_initcall(s5pv210_serial_console_init); | ||
137 | |||
138 | static int __init s5p_serial_init(void) | ||
139 | { | ||
140 | return s3c24xx_serial_init(&s5p_serial_drv, *s5p_uart_inf); | ||
141 | } | ||
142 | |||
143 | static void __exit s5p_serial_exit(void) | ||
144 | { | ||
145 | platform_driver_unregister(&s5p_serial_drv); | ||
146 | } | ||
147 | |||
148 | module_init(s5p_serial_init); | ||
149 | module_exit(s5p_serial_exit); | ||
150 | |||
151 | MODULE_LICENSE("GPL"); | ||
152 | MODULE_ALIAS("platform:s5pv210-uart"); | ||
153 | MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support"); | ||
154 | MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); | ||
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index 52e3df113ec0..6982243736d1 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c | |||
@@ -1374,7 +1374,7 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud, | |||
1374 | * data. | 1374 | * data. |
1375 | */ | 1375 | */ |
1376 | 1376 | ||
1377 | static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info) | 1377 | static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info) |
1378 | { | 1378 | { |
1379 | struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; | 1379 | struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; |
1380 | struct platform_device **platdev_ptr; | 1380 | struct platform_device **platdev_ptr; |
@@ -1385,7 +1385,7 @@ static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info) | |||
1385 | platdev_ptr = s3c24xx_uart_devs; | 1385 | platdev_ptr = s3c24xx_uart_devs; |
1386 | 1386 | ||
1387 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) { | 1387 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) { |
1388 | s3c24xx_serial_init_port(ptr, info, *platdev_ptr); | 1388 | s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr); |
1389 | } | 1389 | } |
1390 | 1390 | ||
1391 | return 0; | 1391 | return 0; |
@@ -1451,7 +1451,7 @@ static struct console s3c24xx_serial_console = { | |||
1451 | }; | 1451 | }; |
1452 | 1452 | ||
1453 | int s3c24xx_serial_initconsole(struct platform_driver *drv, | 1453 | int s3c24xx_serial_initconsole(struct platform_driver *drv, |
1454 | struct s3c24xx_uart_info *info) | 1454 | struct s3c24xx_uart_info **info) |
1455 | 1455 | ||
1456 | { | 1456 | { |
1457 | struct platform_device *dev = s3c24xx_uart_devs[0]; | 1457 | struct platform_device *dev = s3c24xx_uart_devs[0]; |
diff --git a/drivers/serial/samsung.h b/drivers/serial/samsung.h index 1fb22343df42..0ac06a07d25f 100644 --- a/drivers/serial/samsung.h +++ b/drivers/serial/samsung.h | |||
@@ -75,19 +75,24 @@ extern int s3c24xx_serial_probe(struct platform_device *dev, | |||
75 | extern int __devexit s3c24xx_serial_remove(struct platform_device *dev); | 75 | extern int __devexit s3c24xx_serial_remove(struct platform_device *dev); |
76 | 76 | ||
77 | extern int s3c24xx_serial_initconsole(struct platform_driver *drv, | 77 | extern int s3c24xx_serial_initconsole(struct platform_driver *drv, |
78 | struct s3c24xx_uart_info *uart); | 78 | struct s3c24xx_uart_info **uart); |
79 | 79 | ||
80 | extern int s3c24xx_serial_init(struct platform_driver *drv, | 80 | extern int s3c24xx_serial_init(struct platform_driver *drv, |
81 | struct s3c24xx_uart_info *info); | 81 | struct s3c24xx_uart_info *info); |
82 | 82 | ||
83 | #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | 83 | #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE |
84 | 84 | ||
85 | #define s3c24xx_console_init(__drv, __inf) \ | 85 | #define s3c24xx_console_init(__drv, __inf) \ |
86 | static int __init s3c_serial_console_init(void) \ | 86 | static int __init s3c_serial_console_init(void) \ |
87 | { \ | 87 | { \ |
88 | return s3c24xx_serial_initconsole(__drv, __inf); \ | 88 | struct s3c24xx_uart_info *uinfo[CONFIG_SERIAL_SAMSUNG_UARTS]; \ |
89 | } \ | 89 | int i; \ |
90 | \ | 90 | \ |
91 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) \ | ||
92 | uinfo[i] = __inf; \ | ||
93 | return s3c24xx_serial_initconsole(__drv, uinfo); \ | ||
94 | } \ | ||
95 | \ | ||
91 | console_initcall(s3c_serial_console_init) | 96 | console_initcall(s3c_serial_console_init) |
92 | 97 | ||
93 | #else | 98 | #else |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index f7d2589926d2..fad67d33b0bd 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -30,7 +30,8 @@ | |||
30 | */ | 30 | */ |
31 | # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 | 31 | # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 |
32 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 32 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
33 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 33 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
34 | defined(CONFIG_ARCH_SHMOBILE) | ||
34 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ | 35 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ |
35 | # define PORT_PTCR 0xA405011EUL | 36 | # define PORT_PTCR 0xA405011EUL |
36 | # define PORT_PVCR 0xA4050122UL | 37 | # define PORT_PVCR 0xA4050122UL |
@@ -228,7 +229,8 @@ | |||
228 | 229 | ||
229 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 230 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
230 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 231 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
231 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 232 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
233 | defined(CONFIG_ARCH_SHMOBILE) | ||
232 | # define SCIF_ORER 0x0200 | 234 | # define SCIF_ORER 0x0200 |
233 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) | 235 | # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) |
234 | # define SCIF_RFDC_MASK 0x007f | 236 | # define SCIF_RFDC_MASK 0x007f |
@@ -261,7 +263,8 @@ | |||
261 | 263 | ||
262 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 264 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
263 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 265 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
264 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 266 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
267 | defined(CONFIG_ARCH_SHMOBILE) | ||
265 | # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) | 268 | # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) |
266 | # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) | 269 | # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) |
267 | # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) | 270 | # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) |
@@ -356,7 +359,7 @@ | |||
356 | SCI_OUT(sci_size, sci_offset, value); \ | 359 | SCI_OUT(sci_size, sci_offset, value); \ |
357 | } | 360 | } |
358 | 361 | ||
359 | #ifdef CONFIG_CPU_SH3 | 362 | #if defined(CONFIG_CPU_SH3) || defined(CONFIG_ARCH_SHMOBILE) |
360 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 363 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
361 | #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ | 364 | #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ |
362 | sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ | 365 | sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ |
@@ -366,7 +369,8 @@ | |||
366 | CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) | 369 | CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) |
367 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 370 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
368 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 371 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
369 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 372 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
373 | defined(CONFIG_ARCH_SHMOBILE) | ||
370 | #define SCIF_FNS(name, scif_offset, scif_size) \ | 374 | #define SCIF_FNS(name, scif_offset, scif_size) \ |
371 | CPU_SCIF_FNS(name, scif_offset, scif_size) | 375 | CPU_SCIF_FNS(name, scif_offset, scif_size) |
372 | #else | 376 | #else |
@@ -401,7 +405,8 @@ | |||
401 | 405 | ||
402 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 406 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
403 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 407 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
404 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 408 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
409 | defined(CONFIG_ARCH_SHMOBILE) | ||
405 | 410 | ||
406 | SCIF_FNS(SCSMR, 0x00, 16) | 411 | SCIF_FNS(SCSMR, 0x00, 16) |
407 | SCIF_FNS(SCBRR, 0x04, 8) | 412 | SCIF_FNS(SCBRR, 0x04, 8) |
@@ -413,7 +418,7 @@ SCIF_FNS(SCFCR, 0x18, 16) | |||
413 | SCIF_FNS(SCFDR, 0x1c, 16) | 418 | SCIF_FNS(SCFDR, 0x1c, 16) |
414 | SCIF_FNS(SCxTDR, 0x20, 8) | 419 | SCIF_FNS(SCxTDR, 0x20, 8) |
415 | SCIF_FNS(SCxRDR, 0x24, 8) | 420 | SCIF_FNS(SCxRDR, 0x24, 8) |
416 | SCIF_FNS(SCLSR, 0x24, 16) | 421 | SCIF_FNS(SCLSR, 0x00, 0) |
417 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ | 422 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ |
418 | defined(CONFIG_CPU_SUBTYPE_SH7724) | 423 | defined(CONFIG_CPU_SUBTYPE_SH7724) |
419 | SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) | 424 | SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) |
@@ -583,7 +588,8 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
583 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) | 588 | #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) |
584 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 589 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
585 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 590 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
586 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 591 | defined(CONFIG_CPU_SUBTYPE_SH7721) || \ |
592 | defined(CONFIG_ARCH_SHMOBILE) | ||
587 | #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) | 593 | #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) |
588 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ | 594 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ |
589 | defined(CONFIG_CPU_SUBTYPE_SH7724) | 595 | defined(CONFIG_CPU_SUBTYPE_SH7724) |