serial: bfin_sport_uart: work around anomaly 05000473 (make 32bit fifo read atomic)

We cannot let a 32-bit RX FIFO read be interrupted otherwise a fake RX
underflow error might be generated.

URL: http://blackfin.uclinux.org/gf/tracker/5145

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

1 files changed, 15 insertions, 1 deletions

diff --git a/drivers/serial/bfin_sport_uart.h b/drivers/serial/bfin_sport_uart.h
index abe03614e4df..9791fcc80a74 100644
--- a/drivers/serial/bfin_sport_uart.h
+++ b/drivers/serial/bfin_sport_uart.h
@@ -37,7 +37,21 @@
 #define SPORT_GET_TFSDIV(sport)         bfin_read16(((sport)->port.membase + OFFSET_TFSDIV))
 #define SPORT_GET_TX(sport)             bfin_read16(((sport)->port.membase + OFFSET_TX))
 #define SPORT_GET_RX(sport)             bfin_read16(((sport)->port.membase + OFFSET_RX))
-#define SPORT_GET_RX32(sport)           bfin_read32(((sport)->port.membase + OFFSET_RX))
+/*
+ * If another interrupt fires while doing a 32-bit read from RX FIFO,
+ * a fake RX underflow error will be generated.  So disable interrupts
+ * to prevent interruption while reading the FIFO.
+ */
+#define SPORT_GET_RX32(sport) \
+({ \
+        unsigned int __ret; \
+        if (ANOMALY_05000473) \
+                local_irq_disable(); \
+        __ret = bfin_read32((sport)->port.membase + OFFSET_RX); \
+        if (ANOMALY_05000473) \
+                local_irq_enable(); \
+        __ret; \
+})
 #define SPORT_GET_RCR1(sport)           bfin_read16(((sport)->port.membase + OFFSET_RCR1))
 #define SPORT_GET_RCR2(sport)           bfin_read16(((sport)->port.membase + OFFSET_RCR2))
 #define SPORT_GET_RCLKDIV(sport)        bfin_read16(((sport)->port.membase + OFFSET_RCLKDIV))