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authorGrant Likely <grant.likely@secretlab.ca>2007-10-23 00:27:46 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-11-01 08:12:19 -0400
commit1d6b698764084510fe6168bb5b650165dced03ae (patch)
tree3fce7676f8086b0b49d676dcaf99f04a253be989 /drivers/serial/uartlite.c
parent7ae0fa49c6502ca1ada0e043c5d25ee73c0a28c6 (diff)
[POWERPC] Uartlite: speed up console output
Change the wait_tx routine to call cpu_relax() instead of udelay() to reduce console output latency and test for the TXFULL bit instead of TXEMPTY. That way the FIFO doesn't need to by 100% flushed before writing the next character. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'drivers/serial/uartlite.c')
-rw-r--r--drivers/serial/uartlite.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
index dfef83f14960..a85f2d31a686 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/serial/uartlite.c
@@ -329,12 +329,14 @@ static struct uart_ops ulite_ops = {
329static void ulite_console_wait_tx(struct uart_port *port) 329static void ulite_console_wait_tx(struct uart_port *port)
330{ 330{
331 int i; 331 int i;
332 u8 val;
332 333
333 /* wait up to 10ms for the character(s) to be sent */ 334 /* Spin waiting for TX fifo to have space available */
334 for (i = 0; i < 10000; i++) { 335 for (i = 0; i < 100000; i++) {
335 if (readb(port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY) 336 val = readb(port->membase + ULITE_STATUS);
337 if ((val & ULITE_STATUS_TXFULL) == 0)
336 break; 338 break;
337 udelay(1); 339 cpu_relax();
338 } 340 }
339} 341}
340 342