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author | Joy Latten <latten@austin.ibm.com> | 2007-11-07 09:59:47 -0500 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2008-01-10 16:16:08 -0500 |
commit | 41fdab3dd385dde36caae60ed2df82aecb7a32f0 (patch) | |
tree | aed4c4e7630cebc8b66d33fa6e26ec20f564bbd8 /drivers/serial/sunsab.c | |
parent | d3e7480572bf882dee5baa2891bccbfa3db0b1a1 (diff) |
[CRYPTO] ctr: Add countersize
This patch adds countersize to CTR mode.
The template is now ctr(algo,noncesize,ivsize,countersize).
For example, ctr(aes,4,8,4) indicates the counterblock
will be composed of a salt/nonce that is 4 bytes, an iv
that is 8 bytes and the counter is 4 bytes.
When noncesize + ivsize < blocksize, CTR initializes the
last block - ivsize - noncesize portion of the block to
zero. Otherwise the counter block is composed of the IV
(and nonce if necessary).
If noncesize + ivsize == blocksize, then this indicates that
user is passing in entire counterblock. Thus countersize
indicates the amount of bytes in counterblock to use as
the counter for incrementing. CTR will increment counter
portion by 1, and begin encryption with that value.
Note that CTR assumes the counter portion of the block that
will be incremented is stored in big endian.
Signed-off-by: Joy Latten <latten@austin.ibm.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/serial/sunsab.c')
0 files changed, 0 insertions, 0 deletions