diff options
author | Kuninori Morimoto <morimoto.kuninori@renesas.com> | 2009-04-14 22:42:47 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-04-16 01:46:32 -0400 |
commit | 47948d2bd6d27648a107a27357b3bc5ad054ff64 (patch) | |
tree | 5ccee82d93aba97446125ebd46f419f59ecfff09 /drivers/serial/sh-sci.h | |
parent | 0207a2efb43d81e29e23662b5d035945688a103f (diff) |
serial: sh-sci: SH7724 support.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r-- | drivers/serial/sh-sci.h | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index d0aa82d7fce0..84cc6512f081 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -91,6 +91,9 @@ | |||
91 | # define SCSPTR5 0xa4050128 | 91 | # define SCSPTR5 0xa4050128 |
92 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 92 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
93 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 93 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
94 | #elif defined(CONFIG_CPU_SUBTYPE_SH7724) | ||
95 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
96 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | ||
94 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | 97 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) |
95 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ | 98 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ |
96 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 99 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
@@ -361,7 +364,8 @@ | |||
361 | h8_sci_offset, h8_sci_size) \ | 364 | h8_sci_offset, h8_sci_size) \ |
362 | CPU_SCI_FNS(name, h8_sci_offset, h8_sci_size) | 365 | CPU_SCI_FNS(name, h8_sci_offset, h8_sci_size) |
363 | #define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) | 366 | #define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) |
364 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) | 367 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ |
368 | defined(CONFIG_CPU_SUBTYPE_SH7724) | ||
365 | #define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size) \ | 369 | #define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size) \ |
366 | CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size) | 370 | CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size) |
367 | #define SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) \ | 371 | #define SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) \ |
@@ -390,7 +394,8 @@ SCIF_FNS(SCFDR, 0x1c, 16) | |||
390 | SCIF_FNS(SCxTDR, 0x20, 8) | 394 | SCIF_FNS(SCxTDR, 0x20, 8) |
391 | SCIF_FNS(SCxRDR, 0x24, 8) | 395 | SCIF_FNS(SCxRDR, 0x24, 8) |
392 | SCIF_FNS(SCLSR, 0x24, 16) | 396 | SCIF_FNS(SCLSR, 0x24, 16) |
393 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) | 397 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ |
398 | defined(CONFIG_CPU_SUBTYPE_SH7724) | ||
394 | SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) | 399 | SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16) |
395 | SCIx_FNS(SCBRR, 0x04, 8, 0x04, 8) | 400 | SCIx_FNS(SCBRR, 0x04, 8, 0x04, 8) |
396 | SCIx_FNS(SCSCR, 0x08, 16, 0x08, 16) | 401 | SCIx_FNS(SCSCR, 0x08, 16, 0x08, 16) |
@@ -604,6 +609,17 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
604 | return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */ | 609 | return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */ |
605 | return 1; | 610 | return 1; |
606 | } | 611 | } |
612 | #elif defined(CONFIG_CPU_SUBTYPE_SH7724) | ||
613 | # define SCFSR 0x0010 | ||
614 | # define SCASSR 0x0014 | ||
615 | static inline int sci_rxd_in(struct uart_port *port) | ||
616 | { | ||
617 | if (port->type == PORT_SCIF) | ||
618 | return ctrl_inw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0; | ||
619 | if (port->type == PORT_SCIFA) | ||
620 | return ctrl_inw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0; | ||
621 | return 1; | ||
622 | } | ||
607 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 623 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
608 | static inline int sci_rxd_in(struct uart_port *port) | 624 | static inline int sci_rxd_in(struct uart_port *port) |
609 | { | 625 | { |
@@ -757,7 +773,8 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
757 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 773 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
758 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 774 | defined(CONFIG_CPU_SUBTYPE_SH7721) |
759 | #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) | 775 | #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) |
760 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) | 776 | #elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\ |
777 | defined(CONFIG_CPU_SUBTYPE_SH7724) | ||
761 | static inline int scbrr_calc(struct uart_port *port, int bps, int clk) | 778 | static inline int scbrr_calc(struct uart_port *port, int bps, int clk) |
762 | { | 779 | { |
763 | if (port->type == PORT_SCIF) | 780 | if (port->type == PORT_SCIF) |