diff options
author | Paul Mundt <lethal@linux-sh.org> | 2007-06-20 05:27:10 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-06-20 05:27:10 -0400 |
commit | 2b1bd1ac5d4bffe3fd542bfe1784a583bd7df4fa (patch) | |
tree | 9c9840807d84cb4d9ca981fbae5093eef1c9ed12 /drivers/serial/sh-sci.h | |
parent | 027e56e68543780870fda74360ca45e392c50e1c (diff) |
sh: Preliminary support for the SH-X3 CPU.
This adds basic support for UP SH-X3.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/serial/sh-sci.h')
-rw-r--r-- | drivers/serial/sh-sci.h | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index da643b31715b..247fb66bf0f4 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -78,7 +78,7 @@ | |||
78 | # define SCPDR 0xA4050136 /* 16 bit SCIF */ | 78 | # define SCPDR 0xA4050136 /* 16 bit SCIF */ |
79 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ | 79 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ |
80 | # define SCIF_ONLY | 80 | # define SCIF_ONLY |
81 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 81 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
82 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ | 82 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ |
83 | # define SCI_NPORTS 2 | 83 | # define SCI_NPORTS 2 |
84 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 84 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
@@ -173,6 +173,14 @@ | |||
173 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 173 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
174 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 174 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
175 | # define SCIF_ONLY | 175 | # define SCIF_ONLY |
176 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) | ||
177 | # define SCSPTR0 0xffc30020 /* 16 bit SCIF */ | ||
178 | # define SCSPTR1 0xffc40020 /* 16 bit SCIF */ | ||
179 | # define SCSPTR2 0xffc50020 /* 16 bit SCIF */ | ||
180 | # define SCSPTR3 0xffc60020 /* 16 bit SCIF */ | ||
181 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | ||
182 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | ||
183 | # define SCIF_ONLY | ||
176 | #else | 184 | #else |
177 | # error CPU subtype not defined | 185 | # error CPU subtype not defined |
178 | #endif | 186 | #endif |
@@ -189,7 +197,8 @@ | |||
189 | defined(CONFIG_CPU_SUBTYPE_SH7751) || \ | 197 | defined(CONFIG_CPU_SUBTYPE_SH7751) || \ |
190 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ | 198 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ |
191 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ | 199 | defined(CONFIG_CPU_SUBTYPE_SH7780) || \ |
192 | defined(CONFIG_CPU_SUBTYPE_SH7785) | 200 | defined(CONFIG_CPU_SUBTYPE_SH7785) || \ |
201 | defined(CONFIG_CPU_SUBTYPE_SHX3) | ||
193 | #define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ | 202 | #define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ |
194 | #else | 203 | #else |
195 | #define SCI_CTRL_FLAGS_REIE 0 | 204 | #define SCI_CTRL_FLAGS_REIE 0 |
@@ -666,6 +675,18 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
666 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | 675 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ |
667 | return 1; | 676 | return 1; |
668 | } | 677 | } |
678 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) | ||
679 | static inline int sci_rxd_in(struct uart_port *port) | ||
680 | { | ||
681 | if (port->mapbase == 0xffc30000) | ||
682 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | ||
683 | if (port->mapbase == 0xffc40000) | ||
684 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | ||
685 | if (port->mapbase == 0xffc50000) | ||
686 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | ||
687 | if (port->mapbase == 0xffc60000) | ||
688 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | ||
689 | } | ||
669 | #endif | 690 | #endif |
670 | 691 | ||
671 | /* | 692 | /* |