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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-14 16:42:43 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-14 16:42:43 -0400
commit2cf4d4514d5b43c1f3b64bd0ec8b9853bde8f1dc (patch)
treee35a625496acc6ac852846d40b8851186b9d1ac4 /drivers/serial/imx.c
parent44b7532b8b464f606053562400719c9c21276037 (diff)
parentce53895a5d24e0ee19fb92f56c17323fb4c9ab27 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (417 commits) MAINTAINERS: EB110ATX is not ebsa110 MAINTAINERS: update Eric Miao's email address and status fb: add support of LCD display controller on pxa168/910 (base layer) [ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCN [ARM] pxa/sharpsl_pm: zaurus needs generic pxa suspend/resume routines [ARM] 5544/1: Trust PrimeCell resource sizes [ARM] pxa/sharpsl_pm: cleanup of gpio-related code. [ARM] pxa/sharpsl_pm: drop set_irq_type calls [ARM] pxa/sharpsl_pm: merge pxa-specific code into generic one [ARM] pxa/sharpsl_pm: merge the two sharpsl_pm.c since it's now pxa specific [ARM] sa1100: remove unused collie_pm.c [ARM] pxa: fix the conflicting non-static declarations of global_gpios[] [ARM] 5550/1: Add default configure file for w90p910 platform [ARM] 5549/1: Add clock api for w90p910 platform. [ARM] 5548/1: Add gpio api for w90p910 platform [ARM] 5551/1: Add multi-function pin api for w90p910 platform. [ARM] Make ARM_VIC_NR depend on ARM_VIC [ARM] 5546/1: ARM PL022 SSP/SPI driver v3 ARM: OMAP4: SMP: Update defconfig for OMAP4430 ARM: OMAP4: SMP: Enable SMP support for OMAP4430 ...
Diffstat (limited to 'drivers/serial/imx.c')
-rw-r--r--drivers/serial/imx.c13
1 files changed, 3 insertions, 10 deletions
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 7b5d1de9cfe3..285b414f3054 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -71,7 +71,7 @@
71#define ONEMS 0xb0 /* One Millisecond register */ 71#define ONEMS 0xb0 /* One Millisecond register */
72#define UTS 0xb4 /* UART Test Register */ 72#define UTS 0xb4 /* UART Test Register */
73#endif 73#endif
74#if defined(CONFIG_ARCH_IMX) || defined(CONFIG_ARCH_MX1) 74#ifdef CONFIG_ARCH_MX1
75#define BIPR1 0xb0 /* Incremental Preset Register 1 */ 75#define BIPR1 0xb0 /* Incremental Preset Register 1 */
76#define BIPR2 0xb4 /* Incremental Preset Register 2 */ 76#define BIPR2 0xb4 /* Incremental Preset Register 2 */
77#define BIPR3 0xb8 /* Incremental Preset Register 3 */ 77#define BIPR3 0xb8 /* Incremental Preset Register 3 */
@@ -101,7 +101,7 @@
101#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */ 101#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */
102#define UCR1_SNDBRK (1<<4) /* Send break */ 102#define UCR1_SNDBRK (1<<4) /* Send break */
103#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */ 103#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */
104#if defined(CONFIG_ARCH_IMX) || defined(CONFIG_ARCH_MX1) 104#ifdef CONFIG_ARCH_MX1
105#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */ 105#define UCR1_UARTCLKEN (1<<2) /* UART clock enabled */
106#endif 106#endif
107#if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2 107#if defined CONFIG_ARCH_MX3 || defined CONFIG_ARCH_MX2
@@ -132,7 +132,7 @@
132#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ 132#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */
133#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ 133#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */
134#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ 134#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */
135#ifdef CONFIG_ARCH_IMX 135#ifdef CONFIG_ARCH_MX1
136#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */ 136#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */
137#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */ 137#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */
138#endif 138#endif
@@ -186,13 +186,6 @@
186#define UTS_SOFTRST (1<<0) /* Software reset */ 186#define UTS_SOFTRST (1<<0) /* Software reset */
187 187
188/* We've been assigned a range on the "Low-density serial ports" major */ 188/* We've been assigned a range on the "Low-density serial ports" major */
189#ifdef CONFIG_ARCH_IMX
190#define SERIAL_IMX_MAJOR 204
191#define MINOR_START 41
192#define DEV_NAME "ttySMX"
193#define MAX_INTERNAL_IRQ IMX_IRQS
194#endif
195
196#ifdef CONFIG_ARCH_MXC 189#ifdef CONFIG_ARCH_MXC
197#define SERIAL_IMX_MAJOR 207 190#define SERIAL_IMX_MAJOR 207
198#define MINOR_START 16 191#define MINOR_START 16