diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/serial/imx.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/serial/imx.c')
-rw-r--r-- | drivers/serial/imx.c | 909 |
1 files changed, 909 insertions, 0 deletions
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c new file mode 100644 index 000000000000..d273134f9e6c --- /dev/null +++ b/drivers/serial/imx.c | |||
@@ -0,0 +1,909 @@ | |||
1 | /* | ||
2 | * linux/drivers/serial/imx.c | ||
3 | * | ||
4 | * Driver for Motorola IMX serial ports | ||
5 | * | ||
6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | ||
7 | * | ||
8 | * Author: Sascha Hauer <sascha@saschahauer.de> | ||
9 | * Copyright (C) 2004 Pengutronix | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, | ||
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | * GNU General Public License for more details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
24 | * | ||
25 | * [29-Mar-2005] Mike Lee | ||
26 | * Added hardware handshake | ||
27 | */ | ||
28 | #include <linux/config.h> | ||
29 | |||
30 | #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
31 | #define SUPPORT_SYSRQ | ||
32 | #endif | ||
33 | |||
34 | #include <linux/module.h> | ||
35 | #include <linux/ioport.h> | ||
36 | #include <linux/init.h> | ||
37 | #include <linux/console.h> | ||
38 | #include <linux/sysrq.h> | ||
39 | #include <linux/device.h> | ||
40 | #include <linux/tty.h> | ||
41 | #include <linux/tty_flip.h> | ||
42 | #include <linux/serial_core.h> | ||
43 | #include <linux/serial.h> | ||
44 | |||
45 | #include <asm/io.h> | ||
46 | #include <asm/irq.h> | ||
47 | #include <asm/hardware.h> | ||
48 | |||
49 | /* We've been assigned a range on the "Low-density serial ports" major */ | ||
50 | #define SERIAL_IMX_MAJOR 204 | ||
51 | #define MINOR_START 41 | ||
52 | |||
53 | #define NR_PORTS 2 | ||
54 | |||
55 | #define IMX_ISR_PASS_LIMIT 256 | ||
56 | |||
57 | /* | ||
58 | * This is the size of our serial port register set. | ||
59 | */ | ||
60 | #define UART_PORT_SIZE 0x100 | ||
61 | |||
62 | /* | ||
63 | * This determines how often we check the modem status signals | ||
64 | * for any change. They generally aren't connected to an IRQ | ||
65 | * so we have to poll them. We also check immediately before | ||
66 | * filling the TX fifo incase CTS has been dropped. | ||
67 | */ | ||
68 | #define MCTRL_TIMEOUT (250*HZ/1000) | ||
69 | |||
70 | #define DRIVER_NAME "IMX-uart" | ||
71 | |||
72 | struct imx_port { | ||
73 | struct uart_port port; | ||
74 | struct timer_list timer; | ||
75 | unsigned int old_status; | ||
76 | int txirq,rxirq; | ||
77 | }; | ||
78 | |||
79 | /* | ||
80 | * Handle any change of modem status signal since we were last called. | ||
81 | */ | ||
82 | static void imx_mctrl_check(struct imx_port *sport) | ||
83 | { | ||
84 | unsigned int status, changed; | ||
85 | |||
86 | status = sport->port.ops->get_mctrl(&sport->port); | ||
87 | changed = status ^ sport->old_status; | ||
88 | |||
89 | if (changed == 0) | ||
90 | return; | ||
91 | |||
92 | sport->old_status = status; | ||
93 | |||
94 | if (changed & TIOCM_RI) | ||
95 | sport->port.icount.rng++; | ||
96 | if (changed & TIOCM_DSR) | ||
97 | sport->port.icount.dsr++; | ||
98 | if (changed & TIOCM_CAR) | ||
99 | uart_handle_dcd_change(&sport->port, status & TIOCM_CAR); | ||
100 | if (changed & TIOCM_CTS) | ||
101 | uart_handle_cts_change(&sport->port, status & TIOCM_CTS); | ||
102 | |||
103 | wake_up_interruptible(&sport->port.info->delta_msr_wait); | ||
104 | } | ||
105 | |||
106 | /* | ||
107 | * This is our per-port timeout handler, for checking the | ||
108 | * modem status signals. | ||
109 | */ | ||
110 | static void imx_timeout(unsigned long data) | ||
111 | { | ||
112 | struct imx_port *sport = (struct imx_port *)data; | ||
113 | unsigned long flags; | ||
114 | |||
115 | if (sport->port.info) { | ||
116 | spin_lock_irqsave(&sport->port.lock, flags); | ||
117 | imx_mctrl_check(sport); | ||
118 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
119 | |||
120 | mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT); | ||
121 | } | ||
122 | } | ||
123 | |||
124 | /* | ||
125 | * interrupts disabled on entry | ||
126 | */ | ||
127 | static void imx_stop_tx(struct uart_port *port, unsigned int tty_stop) | ||
128 | { | ||
129 | struct imx_port *sport = (struct imx_port *)port; | ||
130 | UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN; | ||
131 | } | ||
132 | |||
133 | /* | ||
134 | * interrupts disabled on entry | ||
135 | */ | ||
136 | static void imx_stop_rx(struct uart_port *port) | ||
137 | { | ||
138 | struct imx_port *sport = (struct imx_port *)port; | ||
139 | UCR2((u32)sport->port.membase) &= ~UCR2_RXEN; | ||
140 | } | ||
141 | |||
142 | /* | ||
143 | * Set the modem control timer to fire immediately. | ||
144 | */ | ||
145 | static void imx_enable_ms(struct uart_port *port) | ||
146 | { | ||
147 | struct imx_port *sport = (struct imx_port *)port; | ||
148 | |||
149 | mod_timer(&sport->timer, jiffies); | ||
150 | } | ||
151 | |||
152 | static inline void imx_transmit_buffer(struct imx_port *sport) | ||
153 | { | ||
154 | struct circ_buf *xmit = &sport->port.info->xmit; | ||
155 | |||
156 | do { | ||
157 | /* send xmit->buf[xmit->tail] | ||
158 | * out the port here */ | ||
159 | URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail]; | ||
160 | xmit->tail = (xmit->tail + 1) & | ||
161 | (UART_XMIT_SIZE - 1); | ||
162 | sport->port.icount.tx++; | ||
163 | if (uart_circ_empty(xmit)) | ||
164 | break; | ||
165 | } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL)); | ||
166 | |||
167 | if (uart_circ_empty(xmit)) | ||
168 | imx_stop_tx(&sport->port, 0); | ||
169 | } | ||
170 | |||
171 | /* | ||
172 | * interrupts disabled on entry | ||
173 | */ | ||
174 | static void imx_start_tx(struct uart_port *port, unsigned int tty_start) | ||
175 | { | ||
176 | struct imx_port *sport = (struct imx_port *)port; | ||
177 | |||
178 | UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN; | ||
179 | |||
180 | if(UTS((u32)sport->port.membase) & UTS_TXEMPTY) | ||
181 | imx_transmit_buffer(sport); | ||
182 | } | ||
183 | |||
184 | static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs) | ||
185 | { | ||
186 | struct imx_port *sport = (struct imx_port *)dev_id; | ||
187 | struct circ_buf *xmit = &sport->port.info->xmit; | ||
188 | unsigned long flags; | ||
189 | |||
190 | spin_lock_irqsave(&sport->port.lock,flags); | ||
191 | if (sport->port.x_char) | ||
192 | { | ||
193 | /* Send next char */ | ||
194 | URTX0((u32)sport->port.membase) = sport->port.x_char; | ||
195 | goto out; | ||
196 | } | ||
197 | |||
198 | if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) { | ||
199 | imx_stop_tx(&sport->port, 0); | ||
200 | goto out; | ||
201 | } | ||
202 | |||
203 | imx_transmit_buffer(sport); | ||
204 | |||
205 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
206 | uart_write_wakeup(&sport->port); | ||
207 | |||
208 | out: | ||
209 | spin_unlock_irqrestore(&sport->port.lock,flags); | ||
210 | return IRQ_HANDLED; | ||
211 | } | ||
212 | |||
213 | static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs) | ||
214 | { | ||
215 | struct imx_port *sport = dev_id; | ||
216 | unsigned int rx,flg,ignored = 0; | ||
217 | struct tty_struct *tty = sport->port.info->tty; | ||
218 | unsigned long flags; | ||
219 | |||
220 | rx = URXD0((u32)sport->port.membase); | ||
221 | spin_lock_irqsave(&sport->port.lock,flags); | ||
222 | |||
223 | do { | ||
224 | flg = TTY_NORMAL; | ||
225 | sport->port.icount.rx++; | ||
226 | |||
227 | if( USR2((u32)sport->port.membase) & USR2_BRCD ) { | ||
228 | USR2((u32)sport->port.membase) |= USR2_BRCD; | ||
229 | if(uart_handle_break(&sport->port)) | ||
230 | goto ignore_char; | ||
231 | } | ||
232 | |||
233 | if (uart_handle_sysrq_char | ||
234 | (&sport->port, (unsigned char)rx, regs)) | ||
235 | goto ignore_char; | ||
236 | |||
237 | if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) ) | ||
238 | goto handle_error; | ||
239 | |||
240 | error_return: | ||
241 | tty_insert_flip_char(tty, rx, flg); | ||
242 | |||
243 | if (tty->flip.count >= TTY_FLIPBUF_SIZE) | ||
244 | goto out; | ||
245 | |||
246 | ignore_char: | ||
247 | rx = URXD0((u32)sport->port.membase); | ||
248 | } while(rx & URXD_CHARRDY); | ||
249 | |||
250 | out: | ||
251 | spin_unlock_irqrestore(&sport->port.lock,flags); | ||
252 | tty_flip_buffer_push(tty); | ||
253 | return IRQ_HANDLED; | ||
254 | |||
255 | handle_error: | ||
256 | if (rx & URXD_PRERR) | ||
257 | sport->port.icount.parity++; | ||
258 | else if (rx & URXD_FRMERR) | ||
259 | sport->port.icount.frame++; | ||
260 | if (rx & URXD_OVRRUN) | ||
261 | sport->port.icount.overrun++; | ||
262 | |||
263 | if (rx & sport->port.ignore_status_mask) { | ||
264 | if (++ignored > 100) | ||
265 | goto out; | ||
266 | goto ignore_char; | ||
267 | } | ||
268 | |||
269 | rx &= sport->port.read_status_mask; | ||
270 | |||
271 | if (rx & URXD_PRERR) | ||
272 | flg = TTY_PARITY; | ||
273 | else if (rx & URXD_FRMERR) | ||
274 | flg = TTY_FRAME; | ||
275 | if (rx & URXD_OVRRUN) | ||
276 | flg = TTY_OVERRUN; | ||
277 | |||
278 | #ifdef SUPPORT_SYSRQ | ||
279 | sport->port.sysrq = 0; | ||
280 | #endif | ||
281 | goto error_return; | ||
282 | } | ||
283 | |||
284 | /* | ||
285 | * Return TIOCSER_TEMT when transmitter is not busy. | ||
286 | */ | ||
287 | static unsigned int imx_tx_empty(struct uart_port *port) | ||
288 | { | ||
289 | struct imx_port *sport = (struct imx_port *)port; | ||
290 | |||
291 | return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0; | ||
292 | } | ||
293 | |||
294 | static unsigned int imx_get_mctrl(struct uart_port *port) | ||
295 | { | ||
296 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
297 | } | ||
298 | |||
299 | static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
300 | { | ||
301 | } | ||
302 | |||
303 | /* | ||
304 | * Interrupts always disabled. | ||
305 | */ | ||
306 | static void imx_break_ctl(struct uart_port *port, int break_state) | ||
307 | { | ||
308 | struct imx_port *sport = (struct imx_port *)port; | ||
309 | unsigned long flags; | ||
310 | |||
311 | spin_lock_irqsave(&sport->port.lock, flags); | ||
312 | |||
313 | if ( break_state != 0 ) | ||
314 | UCR1((u32)sport->port.membase) |= UCR1_SNDBRK; | ||
315 | else | ||
316 | UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK; | ||
317 | |||
318 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
319 | } | ||
320 | |||
321 | #define TXTL 2 /* reset default */ | ||
322 | #define RXTL 1 /* reset default */ | ||
323 | |||
324 | static int imx_startup(struct uart_port *port) | ||
325 | { | ||
326 | struct imx_port *sport = (struct imx_port *)port; | ||
327 | int retval; | ||
328 | unsigned int val; | ||
329 | unsigned long flags; | ||
330 | |||
331 | /* set receiver / transmitter trigger level. We assume | ||
332 | * that RFDIV has been set by the arch setup or by the bootloader. | ||
333 | */ | ||
334 | val = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) | TXTL<<10 | RXTL; | ||
335 | UFCR((u32)sport->port.membase) = val; | ||
336 | |||
337 | /* disable the DREN bit (Data Ready interrupt enable) before | ||
338 | * requesting IRQs | ||
339 | */ | ||
340 | UCR4((u32)sport->port.membase) &= ~UCR4_DREN; | ||
341 | |||
342 | /* | ||
343 | * Allocate the IRQ | ||
344 | */ | ||
345 | retval = request_irq(sport->rxirq, imx_rxint, 0, | ||
346 | DRIVER_NAME, sport); | ||
347 | if (retval) goto error_out2; | ||
348 | |||
349 | retval = request_irq(sport->txirq, imx_txint, 0, | ||
350 | "imx-uart", sport); | ||
351 | if (retval) goto error_out1; | ||
352 | |||
353 | /* | ||
354 | * Finally, clear and enable interrupts | ||
355 | */ | ||
356 | |||
357 | UCR1((u32)sport->port.membase) |= | ||
358 | (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN); | ||
359 | |||
360 | UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN); | ||
361 | /* | ||
362 | * Enable modem status interrupts | ||
363 | */ | ||
364 | spin_lock_irqsave(&sport->port.lock,flags); | ||
365 | imx_enable_ms(&sport->port); | ||
366 | spin_unlock_irqrestore(&sport->port.lock,flags); | ||
367 | |||
368 | return 0; | ||
369 | |||
370 | error_out1: | ||
371 | free_irq(sport->rxirq, sport); | ||
372 | error_out2: | ||
373 | free_irq(sport->txirq, sport); | ||
374 | return retval; | ||
375 | } | ||
376 | |||
377 | static void imx_shutdown(struct uart_port *port) | ||
378 | { | ||
379 | struct imx_port *sport = (struct imx_port *)port; | ||
380 | |||
381 | /* | ||
382 | * Stop our timer. | ||
383 | */ | ||
384 | del_timer_sync(&sport->timer); | ||
385 | |||
386 | /* | ||
387 | * Free the interrupts | ||
388 | */ | ||
389 | free_irq(sport->txirq, sport); | ||
390 | free_irq(sport->rxirq, sport); | ||
391 | |||
392 | /* | ||
393 | * Disable all interrupts, port and break condition. | ||
394 | */ | ||
395 | |||
396 | UCR1((u32)sport->port.membase) &= | ||
397 | ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN); | ||
398 | } | ||
399 | |||
400 | static void | ||
401 | imx_set_termios(struct uart_port *port, struct termios *termios, | ||
402 | struct termios *old) | ||
403 | { | ||
404 | struct imx_port *sport = (struct imx_port *)port; | ||
405 | unsigned long flags; | ||
406 | unsigned int ucr2, old_ucr1, old_txrxen, baud, quot; | ||
407 | unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8; | ||
408 | |||
409 | /* | ||
410 | * If we don't support modem control lines, don't allow | ||
411 | * these to be set. | ||
412 | */ | ||
413 | if (0) { | ||
414 | termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR); | ||
415 | termios->c_cflag |= CLOCAL; | ||
416 | } | ||
417 | |||
418 | /* | ||
419 | * We only support CS7 and CS8. | ||
420 | */ | ||
421 | while ((termios->c_cflag & CSIZE) != CS7 && | ||
422 | (termios->c_cflag & CSIZE) != CS8) { | ||
423 | termios->c_cflag &= ~CSIZE; | ||
424 | termios->c_cflag |= old_csize; | ||
425 | old_csize = CS8; | ||
426 | } | ||
427 | |||
428 | if ((termios->c_cflag & CSIZE) == CS8) | ||
429 | ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS; | ||
430 | else | ||
431 | ucr2 = UCR2_SRST | UCR2_IRTS; | ||
432 | |||
433 | if (termios->c_cflag & CRTSCTS) { | ||
434 | ucr2 &= ~UCR2_IRTS; | ||
435 | ucr2 |= UCR2_CTSC; | ||
436 | } | ||
437 | |||
438 | if (termios->c_cflag & CSTOPB) | ||
439 | ucr2 |= UCR2_STPB; | ||
440 | if (termios->c_cflag & PARENB) { | ||
441 | ucr2 |= UCR2_PREN; | ||
442 | if (!(termios->c_cflag & PARODD)) | ||
443 | ucr2 |= UCR2_PROE; | ||
444 | } | ||
445 | |||
446 | /* | ||
447 | * Ask the core to calculate the divisor for us. | ||
448 | */ | ||
449 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | ||
450 | quot = uart_get_divisor(port, baud); | ||
451 | |||
452 | spin_lock_irqsave(&sport->port.lock, flags); | ||
453 | |||
454 | sport->port.read_status_mask = 0; | ||
455 | if (termios->c_iflag & INPCK) | ||
456 | sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR); | ||
457 | if (termios->c_iflag & (BRKINT | PARMRK)) | ||
458 | sport->port.read_status_mask |= URXD_BRK; | ||
459 | |||
460 | /* | ||
461 | * Characters to ignore | ||
462 | */ | ||
463 | sport->port.ignore_status_mask = 0; | ||
464 | if (termios->c_iflag & IGNPAR) | ||
465 | sport->port.ignore_status_mask |= URXD_PRERR; | ||
466 | if (termios->c_iflag & IGNBRK) { | ||
467 | sport->port.ignore_status_mask |= URXD_BRK; | ||
468 | /* | ||
469 | * If we're ignoring parity and break indicators, | ||
470 | * ignore overruns too (for real raw support). | ||
471 | */ | ||
472 | if (termios->c_iflag & IGNPAR) | ||
473 | sport->port.ignore_status_mask |= URXD_OVRRUN; | ||
474 | } | ||
475 | |||
476 | del_timer_sync(&sport->timer); | ||
477 | |||
478 | /* | ||
479 | * Update the per-port timeout. | ||
480 | */ | ||
481 | uart_update_timeout(port, termios->c_cflag, baud); | ||
482 | |||
483 | /* | ||
484 | * disable interrupts and drain transmitter | ||
485 | */ | ||
486 | old_ucr1 = UCR1((u32)sport->port.membase); | ||
487 | UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN); | ||
488 | |||
489 | while ( !(USR2((u32)sport->port.membase) & USR2_TXDC)) | ||
490 | barrier(); | ||
491 | |||
492 | /* then, disable everything */ | ||
493 | old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN ); | ||
494 | UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN); | ||
495 | |||
496 | /* set the parity, stop bits and data size */ | ||
497 | UCR2((u32)sport->port.membase) = ucr2; | ||
498 | |||
499 | /* set the baud rate. We assume uartclk = 16 MHz | ||
500 | * | ||
501 | * baud * 16 UBIR - 1 | ||
502 | * --------- = -------- | ||
503 | * uartclk UBMR - 1 | ||
504 | */ | ||
505 | UBIR((u32)sport->port.membase) = (baud / 100) - 1; | ||
506 | UBMR((u32)sport->port.membase) = 10000 - 1; | ||
507 | |||
508 | UCR1((u32)sport->port.membase) = old_ucr1; | ||
509 | UCR2((u32)sport->port.membase) |= old_txrxen; | ||
510 | |||
511 | if (UART_ENABLE_MS(&sport->port, termios->c_cflag)) | ||
512 | imx_enable_ms(&sport->port); | ||
513 | |||
514 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
515 | } | ||
516 | |||
517 | static const char *imx_type(struct uart_port *port) | ||
518 | { | ||
519 | struct imx_port *sport = (struct imx_port *)port; | ||
520 | |||
521 | return sport->port.type == PORT_IMX ? "IMX" : NULL; | ||
522 | } | ||
523 | |||
524 | /* | ||
525 | * Release the memory region(s) being used by 'port'. | ||
526 | */ | ||
527 | static void imx_release_port(struct uart_port *port) | ||
528 | { | ||
529 | struct imx_port *sport = (struct imx_port *)port; | ||
530 | |||
531 | release_mem_region(sport->port.mapbase, UART_PORT_SIZE); | ||
532 | } | ||
533 | |||
534 | /* | ||
535 | * Request the memory region(s) being used by 'port'. | ||
536 | */ | ||
537 | static int imx_request_port(struct uart_port *port) | ||
538 | { | ||
539 | struct imx_port *sport = (struct imx_port *)port; | ||
540 | |||
541 | return request_mem_region(sport->port.mapbase, UART_PORT_SIZE, | ||
542 | "imx-uart") != NULL ? 0 : -EBUSY; | ||
543 | } | ||
544 | |||
545 | /* | ||
546 | * Configure/autoconfigure the port. | ||
547 | */ | ||
548 | static void imx_config_port(struct uart_port *port, int flags) | ||
549 | { | ||
550 | struct imx_port *sport = (struct imx_port *)port; | ||
551 | |||
552 | if (flags & UART_CONFIG_TYPE && | ||
553 | imx_request_port(&sport->port) == 0) | ||
554 | sport->port.type = PORT_IMX; | ||
555 | } | ||
556 | |||
557 | /* | ||
558 | * Verify the new serial_struct (for TIOCSSERIAL). | ||
559 | * The only change we allow are to the flags and type, and | ||
560 | * even then only between PORT_IMX and PORT_UNKNOWN | ||
561 | */ | ||
562 | static int | ||
563 | imx_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
564 | { | ||
565 | struct imx_port *sport = (struct imx_port *)port; | ||
566 | int ret = 0; | ||
567 | |||
568 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX) | ||
569 | ret = -EINVAL; | ||
570 | if (sport->port.irq != ser->irq) | ||
571 | ret = -EINVAL; | ||
572 | if (ser->io_type != UPIO_MEM) | ||
573 | ret = -EINVAL; | ||
574 | if (sport->port.uartclk / 16 != ser->baud_base) | ||
575 | ret = -EINVAL; | ||
576 | if ((void *)sport->port.mapbase != ser->iomem_base) | ||
577 | ret = -EINVAL; | ||
578 | if (sport->port.iobase != ser->port) | ||
579 | ret = -EINVAL; | ||
580 | if (ser->hub6 != 0) | ||
581 | ret = -EINVAL; | ||
582 | return ret; | ||
583 | } | ||
584 | |||
585 | static struct uart_ops imx_pops = { | ||
586 | .tx_empty = imx_tx_empty, | ||
587 | .set_mctrl = imx_set_mctrl, | ||
588 | .get_mctrl = imx_get_mctrl, | ||
589 | .stop_tx = imx_stop_tx, | ||
590 | .start_tx = imx_start_tx, | ||
591 | .stop_rx = imx_stop_rx, | ||
592 | .enable_ms = imx_enable_ms, | ||
593 | .break_ctl = imx_break_ctl, | ||
594 | .startup = imx_startup, | ||
595 | .shutdown = imx_shutdown, | ||
596 | .set_termios = imx_set_termios, | ||
597 | .type = imx_type, | ||
598 | .release_port = imx_release_port, | ||
599 | .request_port = imx_request_port, | ||
600 | .config_port = imx_config_port, | ||
601 | .verify_port = imx_verify_port, | ||
602 | }; | ||
603 | |||
604 | static struct imx_port imx_ports[] = { | ||
605 | { | ||
606 | .txirq = UART1_MINT_TX, | ||
607 | .rxirq = UART1_MINT_RX, | ||
608 | .port = { | ||
609 | .type = PORT_IMX, | ||
610 | .iotype = SERIAL_IO_MEM, | ||
611 | .membase = (void *)IMX_UART1_BASE, | ||
612 | .mapbase = IMX_UART1_BASE, /* FIXME */ | ||
613 | .irq = UART1_MINT_RX, | ||
614 | .uartclk = 16000000, | ||
615 | .fifosize = 8, | ||
616 | .flags = ASYNC_BOOT_AUTOCONF, | ||
617 | .ops = &imx_pops, | ||
618 | .line = 0, | ||
619 | }, | ||
620 | }, { | ||
621 | .txirq = UART2_MINT_TX, | ||
622 | .rxirq = UART2_MINT_RX, | ||
623 | .port = { | ||
624 | .type = PORT_IMX, | ||
625 | .iotype = SERIAL_IO_MEM, | ||
626 | .membase = (void *)IMX_UART2_BASE, | ||
627 | .mapbase = IMX_UART2_BASE, /* FIXME */ | ||
628 | .irq = UART2_MINT_RX, | ||
629 | .uartclk = 16000000, | ||
630 | .fifosize = 8, | ||
631 | .flags = ASYNC_BOOT_AUTOCONF, | ||
632 | .ops = &imx_pops, | ||
633 | .line = 1, | ||
634 | }, | ||
635 | } | ||
636 | }; | ||
637 | |||
638 | /* | ||
639 | * Setup the IMX serial ports. | ||
640 | * Note also that we support "console=ttySMXx" where "x" is either 0 or 1. | ||
641 | * Which serial port this ends up being depends on the machine you're | ||
642 | * running this kernel on. I'm not convinced that this is a good idea, | ||
643 | * but that's the way it traditionally works. | ||
644 | * | ||
645 | */ | ||
646 | static void __init imx_init_ports(void) | ||
647 | { | ||
648 | static int first = 1; | ||
649 | int i; | ||
650 | |||
651 | if (!first) | ||
652 | return; | ||
653 | first = 0; | ||
654 | |||
655 | for (i = 0; i < ARRAY_SIZE(imx_ports); i++) { | ||
656 | init_timer(&imx_ports[i].timer); | ||
657 | imx_ports[i].timer.function = imx_timeout; | ||
658 | imx_ports[i].timer.data = (unsigned long)&imx_ports[i]; | ||
659 | } | ||
660 | |||
661 | imx_gpio_mode(PC9_PF_UART1_CTS); | ||
662 | imx_gpio_mode(PC10_PF_UART1_RTS); | ||
663 | imx_gpio_mode(PC11_PF_UART1_TXD); | ||
664 | imx_gpio_mode(PC12_PF_UART1_RXD); | ||
665 | imx_gpio_mode(PB28_PF_UART2_CTS); | ||
666 | imx_gpio_mode(PB29_PF_UART2_RTS); | ||
667 | |||
668 | imx_gpio_mode(PB30_PF_UART2_TXD); | ||
669 | imx_gpio_mode(PB31_PF_UART2_RXD); | ||
670 | |||
671 | #if 0 /* We don't need these, on the mx1 the _modem_ side of the uart | ||
672 | * is implemented. | ||
673 | */ | ||
674 | imx_gpio_mode(PD7_AF_UART2_DTR); | ||
675 | imx_gpio_mode(PD8_AF_UART2_DCD); | ||
676 | imx_gpio_mode(PD9_AF_UART2_RI); | ||
677 | imx_gpio_mode(PD10_AF_UART2_DSR); | ||
678 | #endif | ||
679 | |||
680 | |||
681 | } | ||
682 | |||
683 | #ifdef CONFIG_SERIAL_IMX_CONSOLE | ||
684 | |||
685 | /* | ||
686 | * Interrupts are disabled on entering | ||
687 | */ | ||
688 | static void | ||
689 | imx_console_write(struct console *co, const char *s, unsigned int count) | ||
690 | { | ||
691 | struct imx_port *sport = &imx_ports[co->index]; | ||
692 | unsigned int old_ucr1, old_ucr2, i; | ||
693 | |||
694 | /* | ||
695 | * First, save UCR1/2 and then disable interrupts | ||
696 | */ | ||
697 | old_ucr1 = UCR1((u32)sport->port.membase); | ||
698 | old_ucr2 = UCR2((u32)sport->port.membase); | ||
699 | |||
700 | UCR1((u32)sport->port.membase) = | ||
701 | (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN) | ||
702 | & ~(UCR1_TXMPTYEN | UCR1_RRDYEN); | ||
703 | UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN; | ||
704 | |||
705 | /* | ||
706 | * Now, do each character | ||
707 | */ | ||
708 | for (i = 0; i < count; i++) { | ||
709 | |||
710 | while ((UTS((u32)sport->port.membase) & UTS_TXFULL)) | ||
711 | barrier(); | ||
712 | |||
713 | URTX0((u32)sport->port.membase) = s[i]; | ||
714 | |||
715 | if (s[i] == '\n') { | ||
716 | while ((UTS((u32)sport->port.membase) & UTS_TXFULL)) | ||
717 | barrier(); | ||
718 | URTX0((u32)sport->port.membase) = '\r'; | ||
719 | } | ||
720 | } | ||
721 | |||
722 | /* | ||
723 | * Finally, wait for transmitter to become empty | ||
724 | * and restore UCR1/2 | ||
725 | */ | ||
726 | while (!(USR2((u32)sport->port.membase) & USR2_TXDC)); | ||
727 | |||
728 | UCR1((u32)sport->port.membase) = old_ucr1; | ||
729 | UCR2((u32)sport->port.membase) = old_ucr2; | ||
730 | } | ||
731 | |||
732 | /* | ||
733 | * If the port was already initialised (eg, by a boot loader), | ||
734 | * try to determine the current setup. | ||
735 | */ | ||
736 | static void __init | ||
737 | imx_console_get_options(struct imx_port *sport, int *baud, | ||
738 | int *parity, int *bits) | ||
739 | { | ||
740 | if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) { | ||
741 | /* ok, the port was enabled */ | ||
742 | unsigned int ucr2, ubir,ubmr, uartclk; | ||
743 | |||
744 | ucr2 = UCR2((u32)sport->port.membase); | ||
745 | |||
746 | *parity = 'n'; | ||
747 | if (ucr2 & UCR2_PREN) { | ||
748 | if (ucr2 & UCR2_PROE) | ||
749 | *parity = 'o'; | ||
750 | else | ||
751 | *parity = 'e'; | ||
752 | } | ||
753 | |||
754 | if (ucr2 & UCR2_WS) | ||
755 | *bits = 8; | ||
756 | else | ||
757 | *bits = 7; | ||
758 | |||
759 | ubir = UBIR((u32)sport->port.membase) & 0xffff; | ||
760 | ubmr = UBMR((u32)sport->port.membase) & 0xffff; | ||
761 | uartclk = sport->port.uartclk; | ||
762 | |||
763 | *baud = ((uartclk/16) * (ubir + 1)) / (ubmr + 1); | ||
764 | } | ||
765 | } | ||
766 | |||
767 | static int __init | ||
768 | imx_console_setup(struct console *co, char *options) | ||
769 | { | ||
770 | struct imx_port *sport; | ||
771 | int baud = 9600; | ||
772 | int bits = 8; | ||
773 | int parity = 'n'; | ||
774 | int flow = 'n'; | ||
775 | |||
776 | /* | ||
777 | * Check whether an invalid uart number has been specified, and | ||
778 | * if so, search for the first available port that does have | ||
779 | * console support. | ||
780 | */ | ||
781 | if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) | ||
782 | co->index = 0; | ||
783 | sport = &imx_ports[co->index]; | ||
784 | |||
785 | if (options) | ||
786 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
787 | else | ||
788 | imx_console_get_options(sport, &baud, &parity, &bits); | ||
789 | |||
790 | return uart_set_options(&sport->port, co, baud, parity, bits, flow); | ||
791 | } | ||
792 | |||
793 | extern struct uart_driver imx_reg; | ||
794 | static struct console imx_console = { | ||
795 | .name = "ttySMX", | ||
796 | .write = imx_console_write, | ||
797 | .device = uart_console_device, | ||
798 | .setup = imx_console_setup, | ||
799 | .flags = CON_PRINTBUFFER, | ||
800 | .index = -1, | ||
801 | .data = &imx_reg, | ||
802 | }; | ||
803 | |||
804 | static int __init imx_rs_console_init(void) | ||
805 | { | ||
806 | imx_init_ports(); | ||
807 | register_console(&imx_console); | ||
808 | return 0; | ||
809 | } | ||
810 | console_initcall(imx_rs_console_init); | ||
811 | |||
812 | #define IMX_CONSOLE &imx_console | ||
813 | #else | ||
814 | #define IMX_CONSOLE NULL | ||
815 | #endif | ||
816 | |||
817 | static struct uart_driver imx_reg = { | ||
818 | .owner = THIS_MODULE, | ||
819 | .driver_name = DRIVER_NAME, | ||
820 | .dev_name = "ttySMX", | ||
821 | .devfs_name = "ttsmx/", | ||
822 | .major = SERIAL_IMX_MAJOR, | ||
823 | .minor = MINOR_START, | ||
824 | .nr = ARRAY_SIZE(imx_ports), | ||
825 | .cons = IMX_CONSOLE, | ||
826 | }; | ||
827 | |||
828 | static int serial_imx_suspend(struct device *_dev, u32 state, u32 level) | ||
829 | { | ||
830 | struct imx_port *sport = dev_get_drvdata(_dev); | ||
831 | |||
832 | if (sport && level == SUSPEND_DISABLE) | ||
833 | uart_suspend_port(&imx_reg, &sport->port); | ||
834 | |||
835 | return 0; | ||
836 | } | ||
837 | |||
838 | static int serial_imx_resume(struct device *_dev, u32 level) | ||
839 | { | ||
840 | struct imx_port *sport = dev_get_drvdata(_dev); | ||
841 | |||
842 | if (sport && level == RESUME_ENABLE) | ||
843 | uart_resume_port(&imx_reg, &sport->port); | ||
844 | |||
845 | return 0; | ||
846 | } | ||
847 | |||
848 | static int serial_imx_probe(struct device *_dev) | ||
849 | { | ||
850 | struct platform_device *dev = to_platform_device(_dev); | ||
851 | |||
852 | imx_ports[dev->id].port.dev = _dev; | ||
853 | uart_add_one_port(&imx_reg, &imx_ports[dev->id].port); | ||
854 | dev_set_drvdata(_dev, &imx_ports[dev->id]); | ||
855 | return 0; | ||
856 | } | ||
857 | |||
858 | static int serial_imx_remove(struct device *_dev) | ||
859 | { | ||
860 | struct imx_port *sport = dev_get_drvdata(_dev); | ||
861 | |||
862 | dev_set_drvdata(_dev, NULL); | ||
863 | |||
864 | if (sport) | ||
865 | uart_remove_one_port(&imx_reg, &sport->port); | ||
866 | |||
867 | return 0; | ||
868 | } | ||
869 | |||
870 | static struct device_driver serial_imx_driver = { | ||
871 | .name = "imx-uart", | ||
872 | .bus = &platform_bus_type, | ||
873 | .probe = serial_imx_probe, | ||
874 | .remove = serial_imx_remove, | ||
875 | |||
876 | .suspend = serial_imx_suspend, | ||
877 | .resume = serial_imx_resume, | ||
878 | }; | ||
879 | |||
880 | static int __init imx_serial_init(void) | ||
881 | { | ||
882 | int ret; | ||
883 | |||
884 | printk(KERN_INFO "Serial: IMX driver\n"); | ||
885 | |||
886 | imx_init_ports(); | ||
887 | |||
888 | ret = uart_register_driver(&imx_reg); | ||
889 | if (ret) | ||
890 | return ret; | ||
891 | |||
892 | ret = driver_register(&serial_imx_driver); | ||
893 | if (ret != 0) | ||
894 | uart_unregister_driver(&imx_reg); | ||
895 | |||
896 | return 0; | ||
897 | } | ||
898 | |||
899 | static void __exit imx_serial_exit(void) | ||
900 | { | ||
901 | uart_unregister_driver(&imx_reg); | ||
902 | } | ||
903 | |||
904 | module_init(imx_serial_init); | ||
905 | module_exit(imx_serial_exit); | ||
906 | |||
907 | MODULE_AUTHOR("Sascha Hauer"); | ||
908 | MODULE_DESCRIPTION("IMX generic serial port driver"); | ||
909 | MODULE_LICENSE("GPL"); | ||