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authorKumar Gala <galak@freescale.com>2005-09-03 18:55:38 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:05:56 -0400
commitb0531b9b3299f3066b1db78f1693edabbba08b5c (patch)
tree1f4d3cb62eca4c12b95b4896357514dfa854acb7 /drivers/serial/cpm_uart
parent638861d54eec6b04a88d5d8df8b790d87de80b8d (diff)
[PATCH] cpm_uart: Fix baseaddress for SMC 1 and 2
Base addess register for SMC 1 and 2 are never initialized. This means that they will not work unless a bootloader already configured them. The DPRAM already have space reserved, this patch just makes sure the base addess register is updated correctly on initialization. Signed-off-by: Rune Torgersen <runet@innovsys.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/serial/cpm_uart')
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index bcf4c99678c0..15ad58d94889 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -266,6 +266,7 @@ int cpm_uart_init_portdesc(void)
266 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0]; 266 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0];
267 cpm_uart_ports[UART_SMC1].smcup = 267 cpm_uart_ports[UART_SMC1].smcup =
268 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1]; 268 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1];
269 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
269 cpm_uart_ports[UART_SMC1].port.mapbase = 270 cpm_uart_ports[UART_SMC1].port.mapbase =
270 (unsigned long)&cpm2_immr->im_smc[0]; 271 (unsigned long)&cpm2_immr->im_smc[0];
271 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 272 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
@@ -278,6 +279,7 @@ int cpm_uart_init_portdesc(void)
278 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1]; 279 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1];
279 cpm_uart_ports[UART_SMC2].smcup = 280 cpm_uart_ports[UART_SMC2].smcup =
280 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2]; 281 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2];
282 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;
281 cpm_uart_ports[UART_SMC2].port.mapbase = 283 cpm_uart_ports[UART_SMC2].port.mapbase =
282 (unsigned long)&cpm2_immr->im_smc[1]; 284 (unsigned long)&cpm2_immr->im_smc[1];
283 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 285 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);