diff options
author | Andrew Victor <andrew@sanpeople.com> | 2006-12-04 06:53:11 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-12-04 09:37:39 -0500 |
commit | d707572695e47aae3ac5eb92abb9d2a8c40f7a4e (patch) | |
tree | c3af246d197c97a8f42f8333c6f1f7ce6b9843ed /drivers/serial/atmel_serial.h | |
parent | 5407864e3cb71f6ac351b1ab2266bfb0d9f27684 (diff) |
[ARM] 3975/1: AT91: Comments in atmel_serial.h
Updated some of the comments in the atmel_serial.h header detailing
which bits are only available on the AT91RM9200 or the AT91SAM9xx
processors.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/serial/atmel_serial.h')
-rw-r--r-- | drivers/serial/atmel_serial.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/serial/atmel_serial.h b/drivers/serial/atmel_serial.h index eced2ad1a8d9..fe1763b2a6d5 100644 --- a/drivers/serial/atmel_serial.h +++ b/drivers/serial/atmel_serial.h | |||
@@ -31,8 +31,8 @@ | |||
31 | #define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */ | 31 | #define ATMEL_US_RSTIT (1 << 13) /* Reset Iterations */ |
32 | #define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */ | 32 | #define ATMEL_US_RSTNACK (1 << 14) /* Reset Non Acknowledge */ |
33 | #define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */ | 33 | #define ATMEL_US_RETTO (1 << 15) /* Rearm Time-out */ |
34 | #define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable */ | 34 | #define ATMEL_US_DTREN (1 << 16) /* Data Terminal Ready Enable [AT91RM9200 only] */ |
35 | #define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable */ | 35 | #define ATMEL_US_DTRDIS (1 << 17) /* Data Terminal Ready Disable [AT91RM9200 only] */ |
36 | #define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */ | 36 | #define ATMEL_US_RTSEN (1 << 18) /* Request To Send Enable */ |
37 | #define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */ | 37 | #define ATMEL_US_RTSDIS (1 << 19) /* Request To Send Disable */ |
38 | 38 | ||
@@ -92,9 +92,9 @@ | |||
92 | #define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */ | 92 | #define ATMEL_US_TXBUFE (1 << 11) /* Transmission Buffer Empty */ |
93 | #define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */ | 93 | #define ATMEL_US_RXBUFF (1 << 12) /* Reception Buffer Full */ |
94 | #define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */ | 94 | #define ATMEL_US_NACK (1 << 13) /* Non Acknowledge */ |
95 | #define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change */ | 95 | #define ATMEL_US_RIIC (1 << 16) /* Ring Indicator Input Change [AT91RM9200 only] */ |
96 | #define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change */ | 96 | #define ATMEL_US_DSRIC (1 << 17) /* Data Set Ready Input Change [AT91RM9200 only] */ |
97 | #define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change */ | 97 | #define ATMEL_US_DCDIC (1 << 18) /* Data Carrier Detect Input Change [AT91RM9200 only] */ |
98 | #define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */ | 98 | #define ATMEL_US_CTSIC (1 << 19) /* Clear to Send Input Change */ |
99 | #define ATMEL_US_RI (1 << 20) /* RI */ | 99 | #define ATMEL_US_RI (1 << 20) /* RI */ |
100 | #define ATMEL_US_DSR (1 << 21) /* DSR */ | 100 | #define ATMEL_US_DSR (1 << 21) /* DSR */ |
@@ -106,6 +106,7 @@ | |||
106 | #define ATMEL_US_CSR 0x14 /* Channel Status Register */ | 106 | #define ATMEL_US_CSR 0x14 /* Channel Status Register */ |
107 | #define ATMEL_US_RHR 0x18 /* Receiver Holding Register */ | 107 | #define ATMEL_US_RHR 0x18 /* Receiver Holding Register */ |
108 | #define ATMEL_US_THR 0x1c /* Transmitter Holding Register */ | 108 | #define ATMEL_US_THR 0x1c /* Transmitter Holding Register */ |
109 | #define ATMEL_US_SYNH (1 << 15) /* Transmit/Receive Sync [SAM9 only] */ | ||
109 | 110 | ||
110 | #define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */ | 111 | #define ATMEL_US_BRGR 0x20 /* Baud Rate Generator Register */ |
111 | #define ATMEL_US_CD (0xffff << 0) /* Clock Divider */ | 112 | #define ATMEL_US_CD (0xffff << 0) /* Clock Divider */ |