diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/serial/amba-pl010.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/serial/amba-pl010.c')
-rw-r--r-- | drivers/serial/amba-pl010.c | 840 |
1 files changed, 840 insertions, 0 deletions
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c new file mode 100644 index 000000000000..ac57fdc8711b --- /dev/null +++ b/drivers/serial/amba-pl010.c | |||
@@ -0,0 +1,840 @@ | |||
1 | /* | ||
2 | * linux/drivers/char/amba.c | ||
3 | * | ||
4 | * Driver for AMBA serial ports | ||
5 | * | ||
6 | * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. | ||
7 | * | ||
8 | * Copyright 1999 ARM Limited | ||
9 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, | ||
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
19 | * GNU General Public License for more details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
24 | * | ||
25 | * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $ | ||
26 | * | ||
27 | * This is a generic driver for ARM AMBA-type serial ports. They | ||
28 | * have a lot of 16550-like features, but are not register compatible. | ||
29 | * Note that although they do have CTS, DCD and DSR inputs, they do | ||
30 | * not have an RI input, nor do they have DTR or RTS outputs. If | ||
31 | * required, these have to be supplied via some other means (eg, GPIO) | ||
32 | * and hooked into this driver. | ||
33 | */ | ||
34 | #include <linux/config.h> | ||
35 | |||
36 | #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
37 | #define SUPPORT_SYSRQ | ||
38 | #endif | ||
39 | |||
40 | #include <linux/module.h> | ||
41 | #include <linux/ioport.h> | ||
42 | #include <linux/init.h> | ||
43 | #include <linux/console.h> | ||
44 | #include <linux/sysrq.h> | ||
45 | #include <linux/device.h> | ||
46 | #include <linux/tty.h> | ||
47 | #include <linux/tty_flip.h> | ||
48 | #include <linux/serial_core.h> | ||
49 | #include <linux/serial.h> | ||
50 | |||
51 | #include <asm/io.h> | ||
52 | #include <asm/irq.h> | ||
53 | #include <asm/hardware/amba.h> | ||
54 | #include <asm/hardware/amba_serial.h> | ||
55 | |||
56 | #define UART_NR 2 | ||
57 | |||
58 | #define SERIAL_AMBA_MAJOR 204 | ||
59 | #define SERIAL_AMBA_MINOR 16 | ||
60 | #define SERIAL_AMBA_NR UART_NR | ||
61 | |||
62 | #define AMBA_ISR_PASS_LIMIT 256 | ||
63 | |||
64 | /* | ||
65 | * Access macros for the AMBA UARTs | ||
66 | */ | ||
67 | #define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR) | ||
68 | #define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR) | ||
69 | #define UART_GET_FR(p) readb((p)->membase + UART01x_FR) | ||
70 | #define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR) | ||
71 | #define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR) | ||
72 | #define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR) | ||
73 | #define UART_GET_CR(p) readb((p)->membase + UART010_CR) | ||
74 | #define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR) | ||
75 | #define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL) | ||
76 | #define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL) | ||
77 | #define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM) | ||
78 | #define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM) | ||
79 | #define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH) | ||
80 | #define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH) | ||
81 | #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0) | ||
82 | #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0) | ||
83 | #define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0) | ||
84 | |||
85 | #define UART_DUMMY_RSR_RX /*256*/0 | ||
86 | #define UART_PORT_SIZE 64 | ||
87 | |||
88 | /* | ||
89 | * On the Integrator platform, the port RTS and DTR are provided by | ||
90 | * bits in the following SC_CTRLS register bits: | ||
91 | * RTS DTR | ||
92 | * UART0 7 6 | ||
93 | * UART1 5 4 | ||
94 | */ | ||
95 | #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET) | ||
96 | #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET) | ||
97 | |||
98 | /* | ||
99 | * We wrap our port structure around the generic uart_port. | ||
100 | */ | ||
101 | struct uart_amba_port { | ||
102 | struct uart_port port; | ||
103 | unsigned int dtr_mask; | ||
104 | unsigned int rts_mask; | ||
105 | unsigned int old_status; | ||
106 | }; | ||
107 | |||
108 | static void pl010_stop_tx(struct uart_port *port, unsigned int tty_stop) | ||
109 | { | ||
110 | unsigned int cr; | ||
111 | |||
112 | cr = UART_GET_CR(port); | ||
113 | cr &= ~UART010_CR_TIE; | ||
114 | UART_PUT_CR(port, cr); | ||
115 | } | ||
116 | |||
117 | static void pl010_start_tx(struct uart_port *port, unsigned int tty_start) | ||
118 | { | ||
119 | unsigned int cr; | ||
120 | |||
121 | cr = UART_GET_CR(port); | ||
122 | cr |= UART010_CR_TIE; | ||
123 | UART_PUT_CR(port, cr); | ||
124 | } | ||
125 | |||
126 | static void pl010_stop_rx(struct uart_port *port) | ||
127 | { | ||
128 | unsigned int cr; | ||
129 | |||
130 | cr = UART_GET_CR(port); | ||
131 | cr &= ~(UART010_CR_RIE | UART010_CR_RTIE); | ||
132 | UART_PUT_CR(port, cr); | ||
133 | } | ||
134 | |||
135 | static void pl010_enable_ms(struct uart_port *port) | ||
136 | { | ||
137 | unsigned int cr; | ||
138 | |||
139 | cr = UART_GET_CR(port); | ||
140 | cr |= UART010_CR_MSIE; | ||
141 | UART_PUT_CR(port, cr); | ||
142 | } | ||
143 | |||
144 | static void | ||
145 | #ifdef SUPPORT_SYSRQ | ||
146 | pl010_rx_chars(struct uart_port *port, struct pt_regs *regs) | ||
147 | #else | ||
148 | pl010_rx_chars(struct uart_port *port) | ||
149 | #endif | ||
150 | { | ||
151 | struct tty_struct *tty = port->info->tty; | ||
152 | unsigned int status, ch, flag, rsr, max_count = 256; | ||
153 | |||
154 | status = UART_GET_FR(port); | ||
155 | while (UART_RX_DATA(status) && max_count--) { | ||
156 | if (tty->flip.count >= TTY_FLIPBUF_SIZE) { | ||
157 | if (tty->low_latency) | ||
158 | tty_flip_buffer_push(tty); | ||
159 | /* | ||
160 | * If this failed then we will throw away the | ||
161 | * bytes but must do so to clear interrupts. | ||
162 | */ | ||
163 | } | ||
164 | |||
165 | ch = UART_GET_CHAR(port); | ||
166 | flag = TTY_NORMAL; | ||
167 | |||
168 | port->icount.rx++; | ||
169 | |||
170 | /* | ||
171 | * Note that the error handling code is | ||
172 | * out of the main execution path | ||
173 | */ | ||
174 | rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX; | ||
175 | if (rsr & UART01x_RSR_ANY) { | ||
176 | if (rsr & UART01x_RSR_BE) { | ||
177 | rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); | ||
178 | port->icount.brk++; | ||
179 | if (uart_handle_break(port)) | ||
180 | goto ignore_char; | ||
181 | } else if (rsr & UART01x_RSR_PE) | ||
182 | port->icount.parity++; | ||
183 | else if (rsr & UART01x_RSR_FE) | ||
184 | port->icount.frame++; | ||
185 | if (rsr & UART01x_RSR_OE) | ||
186 | port->icount.overrun++; | ||
187 | |||
188 | rsr &= port->read_status_mask; | ||
189 | |||
190 | if (rsr & UART01x_RSR_BE) | ||
191 | flag = TTY_BREAK; | ||
192 | else if (rsr & UART01x_RSR_PE) | ||
193 | flag = TTY_PARITY; | ||
194 | else if (rsr & UART01x_RSR_FE) | ||
195 | flag = TTY_FRAME; | ||
196 | } | ||
197 | |||
198 | if (uart_handle_sysrq_char(port, ch, regs)) | ||
199 | goto ignore_char; | ||
200 | |||
201 | if ((rsr & port->ignore_status_mask) == 0) { | ||
202 | tty_insert_flip_char(tty, ch, flag); | ||
203 | } | ||
204 | if ((rsr & UART01x_RSR_OE) && | ||
205 | tty->flip.count < TTY_FLIPBUF_SIZE) { | ||
206 | /* | ||
207 | * Overrun is special, since it's reported | ||
208 | * immediately, and doesn't affect the current | ||
209 | * character | ||
210 | */ | ||
211 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | ||
212 | } | ||
213 | ignore_char: | ||
214 | status = UART_GET_FR(port); | ||
215 | } | ||
216 | tty_flip_buffer_push(tty); | ||
217 | return; | ||
218 | } | ||
219 | |||
220 | static void pl010_tx_chars(struct uart_port *port) | ||
221 | { | ||
222 | struct circ_buf *xmit = &port->info->xmit; | ||
223 | int count; | ||
224 | |||
225 | if (port->x_char) { | ||
226 | UART_PUT_CHAR(port, port->x_char); | ||
227 | port->icount.tx++; | ||
228 | port->x_char = 0; | ||
229 | return; | ||
230 | } | ||
231 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | ||
232 | pl010_stop_tx(port, 0); | ||
233 | return; | ||
234 | } | ||
235 | |||
236 | count = port->fifosize >> 1; | ||
237 | do { | ||
238 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); | ||
239 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | ||
240 | port->icount.tx++; | ||
241 | if (uart_circ_empty(xmit)) | ||
242 | break; | ||
243 | } while (--count > 0); | ||
244 | |||
245 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
246 | uart_write_wakeup(port); | ||
247 | |||
248 | if (uart_circ_empty(xmit)) | ||
249 | pl010_stop_tx(port, 0); | ||
250 | } | ||
251 | |||
252 | static void pl010_modem_status(struct uart_port *port) | ||
253 | { | ||
254 | struct uart_amba_port *uap = (struct uart_amba_port *)port; | ||
255 | unsigned int status, delta; | ||
256 | |||
257 | UART_PUT_ICR(&uap->port, 0); | ||
258 | |||
259 | status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY; | ||
260 | |||
261 | delta = status ^ uap->old_status; | ||
262 | uap->old_status = status; | ||
263 | |||
264 | if (!delta) | ||
265 | return; | ||
266 | |||
267 | if (delta & UART01x_FR_DCD) | ||
268 | uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD); | ||
269 | |||
270 | if (delta & UART01x_FR_DSR) | ||
271 | uap->port.icount.dsr++; | ||
272 | |||
273 | if (delta & UART01x_FR_CTS) | ||
274 | uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS); | ||
275 | |||
276 | wake_up_interruptible(&uap->port.info->delta_msr_wait); | ||
277 | } | ||
278 | |||
279 | static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs) | ||
280 | { | ||
281 | struct uart_port *port = dev_id; | ||
282 | unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT; | ||
283 | int handled = 0; | ||
284 | |||
285 | spin_lock(&port->lock); | ||
286 | |||
287 | status = UART_GET_INT_STATUS(port); | ||
288 | if (status) { | ||
289 | do { | ||
290 | if (status & (UART010_IIR_RTIS | UART010_IIR_RIS)) | ||
291 | #ifdef SUPPORT_SYSRQ | ||
292 | pl010_rx_chars(port, regs); | ||
293 | #else | ||
294 | pl010_rx_chars(port); | ||
295 | #endif | ||
296 | if (status & UART010_IIR_MIS) | ||
297 | pl010_modem_status(port); | ||
298 | if (status & UART010_IIR_TIS) | ||
299 | pl010_tx_chars(port); | ||
300 | |||
301 | if (pass_counter-- == 0) | ||
302 | break; | ||
303 | |||
304 | status = UART_GET_INT_STATUS(port); | ||
305 | } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS | | ||
306 | UART010_IIR_TIS)); | ||
307 | handled = 1; | ||
308 | } | ||
309 | |||
310 | spin_unlock(&port->lock); | ||
311 | |||
312 | return IRQ_RETVAL(handled); | ||
313 | } | ||
314 | |||
315 | static unsigned int pl010_tx_empty(struct uart_port *port) | ||
316 | { | ||
317 | return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; | ||
318 | } | ||
319 | |||
320 | static unsigned int pl010_get_mctrl(struct uart_port *port) | ||
321 | { | ||
322 | unsigned int result = 0; | ||
323 | unsigned int status; | ||
324 | |||
325 | status = UART_GET_FR(port); | ||
326 | if (status & UART01x_FR_DCD) | ||
327 | result |= TIOCM_CAR; | ||
328 | if (status & UART01x_FR_DSR) | ||
329 | result |= TIOCM_DSR; | ||
330 | if (status & UART01x_FR_CTS) | ||
331 | result |= TIOCM_CTS; | ||
332 | |||
333 | return result; | ||
334 | } | ||
335 | |||
336 | static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
337 | { | ||
338 | struct uart_amba_port *uap = (struct uart_amba_port *)port; | ||
339 | unsigned int ctrls = 0, ctrlc = 0; | ||
340 | |||
341 | if (mctrl & TIOCM_RTS) | ||
342 | ctrlc |= uap->rts_mask; | ||
343 | else | ||
344 | ctrls |= uap->rts_mask; | ||
345 | |||
346 | if (mctrl & TIOCM_DTR) | ||
347 | ctrlc |= uap->dtr_mask; | ||
348 | else | ||
349 | ctrls |= uap->dtr_mask; | ||
350 | |||
351 | __raw_writel(ctrls, SC_CTRLS); | ||
352 | __raw_writel(ctrlc, SC_CTRLC); | ||
353 | } | ||
354 | |||
355 | static void pl010_break_ctl(struct uart_port *port, int break_state) | ||
356 | { | ||
357 | unsigned long flags; | ||
358 | unsigned int lcr_h; | ||
359 | |||
360 | spin_lock_irqsave(&port->lock, flags); | ||
361 | lcr_h = UART_GET_LCRH(port); | ||
362 | if (break_state == -1) | ||
363 | lcr_h |= UART01x_LCRH_BRK; | ||
364 | else | ||
365 | lcr_h &= ~UART01x_LCRH_BRK; | ||
366 | UART_PUT_LCRH(port, lcr_h); | ||
367 | spin_unlock_irqrestore(&port->lock, flags); | ||
368 | } | ||
369 | |||
370 | static int pl010_startup(struct uart_port *port) | ||
371 | { | ||
372 | struct uart_amba_port *uap = (struct uart_amba_port *)port; | ||
373 | int retval; | ||
374 | |||
375 | /* | ||
376 | * Allocate the IRQ | ||
377 | */ | ||
378 | retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port); | ||
379 | if (retval) | ||
380 | return retval; | ||
381 | |||
382 | /* | ||
383 | * initialise the old status of the modem signals | ||
384 | */ | ||
385 | uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY; | ||
386 | |||
387 | /* | ||
388 | * Finally, enable interrupts | ||
389 | */ | ||
390 | UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE | | ||
391 | UART010_CR_RTIE); | ||
392 | |||
393 | return 0; | ||
394 | } | ||
395 | |||
396 | static void pl010_shutdown(struct uart_port *port) | ||
397 | { | ||
398 | /* | ||
399 | * Free the interrupt | ||
400 | */ | ||
401 | free_irq(port->irq, port); | ||
402 | |||
403 | /* | ||
404 | * disable all interrupts, disable the port | ||
405 | */ | ||
406 | UART_PUT_CR(port, 0); | ||
407 | |||
408 | /* disable break condition and fifos */ | ||
409 | UART_PUT_LCRH(port, UART_GET_LCRH(port) & | ||
410 | ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN)); | ||
411 | } | ||
412 | |||
413 | static void | ||
414 | pl010_set_termios(struct uart_port *port, struct termios *termios, | ||
415 | struct termios *old) | ||
416 | { | ||
417 | unsigned int lcr_h, old_cr; | ||
418 | unsigned long flags; | ||
419 | unsigned int baud, quot; | ||
420 | |||
421 | /* | ||
422 | * Ask the core to calculate the divisor for us. | ||
423 | */ | ||
424 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | ||
425 | quot = uart_get_divisor(port, baud); | ||
426 | |||
427 | switch (termios->c_cflag & CSIZE) { | ||
428 | case CS5: | ||
429 | lcr_h = UART01x_LCRH_WLEN_5; | ||
430 | break; | ||
431 | case CS6: | ||
432 | lcr_h = UART01x_LCRH_WLEN_6; | ||
433 | break; | ||
434 | case CS7: | ||
435 | lcr_h = UART01x_LCRH_WLEN_7; | ||
436 | break; | ||
437 | default: // CS8 | ||
438 | lcr_h = UART01x_LCRH_WLEN_8; | ||
439 | break; | ||
440 | } | ||
441 | if (termios->c_cflag & CSTOPB) | ||
442 | lcr_h |= UART01x_LCRH_STP2; | ||
443 | if (termios->c_cflag & PARENB) { | ||
444 | lcr_h |= UART01x_LCRH_PEN; | ||
445 | if (!(termios->c_cflag & PARODD)) | ||
446 | lcr_h |= UART01x_LCRH_EPS; | ||
447 | } | ||
448 | if (port->fifosize > 1) | ||
449 | lcr_h |= UART01x_LCRH_FEN; | ||
450 | |||
451 | spin_lock_irqsave(&port->lock, flags); | ||
452 | |||
453 | /* | ||
454 | * Update the per-port timeout. | ||
455 | */ | ||
456 | uart_update_timeout(port, termios->c_cflag, baud); | ||
457 | |||
458 | port->read_status_mask = UART01x_RSR_OE; | ||
459 | if (termios->c_iflag & INPCK) | ||
460 | port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; | ||
461 | if (termios->c_iflag & (BRKINT | PARMRK)) | ||
462 | port->read_status_mask |= UART01x_RSR_BE; | ||
463 | |||
464 | /* | ||
465 | * Characters to ignore | ||
466 | */ | ||
467 | port->ignore_status_mask = 0; | ||
468 | if (termios->c_iflag & IGNPAR) | ||
469 | port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE; | ||
470 | if (termios->c_iflag & IGNBRK) { | ||
471 | port->ignore_status_mask |= UART01x_RSR_BE; | ||
472 | /* | ||
473 | * If we're ignoring parity and break indicators, | ||
474 | * ignore overruns too (for real raw support). | ||
475 | */ | ||
476 | if (termios->c_iflag & IGNPAR) | ||
477 | port->ignore_status_mask |= UART01x_RSR_OE; | ||
478 | } | ||
479 | |||
480 | /* | ||
481 | * Ignore all characters if CREAD is not set. | ||
482 | */ | ||
483 | if ((termios->c_cflag & CREAD) == 0) | ||
484 | port->ignore_status_mask |= UART_DUMMY_RSR_RX; | ||
485 | |||
486 | /* first, disable everything */ | ||
487 | old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE; | ||
488 | |||
489 | if (UART_ENABLE_MS(port, termios->c_cflag)) | ||
490 | old_cr |= UART010_CR_MSIE; | ||
491 | |||
492 | UART_PUT_CR(port, 0); | ||
493 | |||
494 | /* Set baud rate */ | ||
495 | quot -= 1; | ||
496 | UART_PUT_LCRM(port, ((quot & 0xf00) >> 8)); | ||
497 | UART_PUT_LCRL(port, (quot & 0xff)); | ||
498 | |||
499 | /* | ||
500 | * ----------v----------v----------v----------v----- | ||
501 | * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L | ||
502 | * ----------^----------^----------^----------^----- | ||
503 | */ | ||
504 | UART_PUT_LCRH(port, lcr_h); | ||
505 | UART_PUT_CR(port, old_cr); | ||
506 | |||
507 | spin_unlock_irqrestore(&port->lock, flags); | ||
508 | } | ||
509 | |||
510 | static const char *pl010_type(struct uart_port *port) | ||
511 | { | ||
512 | return port->type == PORT_AMBA ? "AMBA" : NULL; | ||
513 | } | ||
514 | |||
515 | /* | ||
516 | * Release the memory region(s) being used by 'port' | ||
517 | */ | ||
518 | static void pl010_release_port(struct uart_port *port) | ||
519 | { | ||
520 | release_mem_region(port->mapbase, UART_PORT_SIZE); | ||
521 | } | ||
522 | |||
523 | /* | ||
524 | * Request the memory region(s) being used by 'port' | ||
525 | */ | ||
526 | static int pl010_request_port(struct uart_port *port) | ||
527 | { | ||
528 | return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010") | ||
529 | != NULL ? 0 : -EBUSY; | ||
530 | } | ||
531 | |||
532 | /* | ||
533 | * Configure/autoconfigure the port. | ||
534 | */ | ||
535 | static void pl010_config_port(struct uart_port *port, int flags) | ||
536 | { | ||
537 | if (flags & UART_CONFIG_TYPE) { | ||
538 | port->type = PORT_AMBA; | ||
539 | pl010_request_port(port); | ||
540 | } | ||
541 | } | ||
542 | |||
543 | /* | ||
544 | * verify the new serial_struct (for TIOCSSERIAL). | ||
545 | */ | ||
546 | static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
547 | { | ||
548 | int ret = 0; | ||
549 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA) | ||
550 | ret = -EINVAL; | ||
551 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | ||
552 | ret = -EINVAL; | ||
553 | if (ser->baud_base < 9600) | ||
554 | ret = -EINVAL; | ||
555 | return ret; | ||
556 | } | ||
557 | |||
558 | static struct uart_ops amba_pl010_pops = { | ||
559 | .tx_empty = pl010_tx_empty, | ||
560 | .set_mctrl = pl010_set_mctrl, | ||
561 | .get_mctrl = pl010_get_mctrl, | ||
562 | .stop_tx = pl010_stop_tx, | ||
563 | .start_tx = pl010_start_tx, | ||
564 | .stop_rx = pl010_stop_rx, | ||
565 | .enable_ms = pl010_enable_ms, | ||
566 | .break_ctl = pl010_break_ctl, | ||
567 | .startup = pl010_startup, | ||
568 | .shutdown = pl010_shutdown, | ||
569 | .set_termios = pl010_set_termios, | ||
570 | .type = pl010_type, | ||
571 | .release_port = pl010_release_port, | ||
572 | .request_port = pl010_request_port, | ||
573 | .config_port = pl010_config_port, | ||
574 | .verify_port = pl010_verify_port, | ||
575 | }; | ||
576 | |||
577 | static struct uart_amba_port amba_ports[UART_NR] = { | ||
578 | { | ||
579 | .port = { | ||
580 | .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE), | ||
581 | .mapbase = INTEGRATOR_UART0_BASE, | ||
582 | .iotype = SERIAL_IO_MEM, | ||
583 | .irq = IRQ_UARTINT0, | ||
584 | .uartclk = 14745600, | ||
585 | .fifosize = 16, | ||
586 | .ops = &amba_pl010_pops, | ||
587 | .flags = ASYNC_BOOT_AUTOCONF, | ||
588 | .line = 0, | ||
589 | }, | ||
590 | .dtr_mask = 1 << 5, | ||
591 | .rts_mask = 1 << 4, | ||
592 | }, | ||
593 | { | ||
594 | .port = { | ||
595 | .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE), | ||
596 | .mapbase = INTEGRATOR_UART1_BASE, | ||
597 | .iotype = SERIAL_IO_MEM, | ||
598 | .irq = IRQ_UARTINT1, | ||
599 | .uartclk = 14745600, | ||
600 | .fifosize = 16, | ||
601 | .ops = &amba_pl010_pops, | ||
602 | .flags = ASYNC_BOOT_AUTOCONF, | ||
603 | .line = 1, | ||
604 | }, | ||
605 | .dtr_mask = 1 << 7, | ||
606 | .rts_mask = 1 << 6, | ||
607 | } | ||
608 | }; | ||
609 | |||
610 | #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE | ||
611 | |||
612 | static void | ||
613 | pl010_console_write(struct console *co, const char *s, unsigned int count) | ||
614 | { | ||
615 | struct uart_port *port = &amba_ports[co->index].port; | ||
616 | unsigned int status, old_cr; | ||
617 | int i; | ||
618 | |||
619 | /* | ||
620 | * First save the CR then disable the interrupts | ||
621 | */ | ||
622 | old_cr = UART_GET_CR(port); | ||
623 | UART_PUT_CR(port, UART01x_CR_UARTEN); | ||
624 | |||
625 | /* | ||
626 | * Now, do each character | ||
627 | */ | ||
628 | for (i = 0; i < count; i++) { | ||
629 | do { | ||
630 | status = UART_GET_FR(port); | ||
631 | } while (!UART_TX_READY(status)); | ||
632 | UART_PUT_CHAR(port, s[i]); | ||
633 | if (s[i] == '\n') { | ||
634 | do { | ||
635 | status = UART_GET_FR(port); | ||
636 | } while (!UART_TX_READY(status)); | ||
637 | UART_PUT_CHAR(port, '\r'); | ||
638 | } | ||
639 | } | ||
640 | |||
641 | /* | ||
642 | * Finally, wait for transmitter to become empty | ||
643 | * and restore the TCR | ||
644 | */ | ||
645 | do { | ||
646 | status = UART_GET_FR(port); | ||
647 | } while (status & UART01x_FR_BUSY); | ||
648 | UART_PUT_CR(port, old_cr); | ||
649 | } | ||
650 | |||
651 | static void __init | ||
652 | pl010_console_get_options(struct uart_port *port, int *baud, | ||
653 | int *parity, int *bits) | ||
654 | { | ||
655 | if (UART_GET_CR(port) & UART01x_CR_UARTEN) { | ||
656 | unsigned int lcr_h, quot; | ||
657 | lcr_h = UART_GET_LCRH(port); | ||
658 | |||
659 | *parity = 'n'; | ||
660 | if (lcr_h & UART01x_LCRH_PEN) { | ||
661 | if (lcr_h & UART01x_LCRH_EPS) | ||
662 | *parity = 'e'; | ||
663 | else | ||
664 | *parity = 'o'; | ||
665 | } | ||
666 | |||
667 | if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7) | ||
668 | *bits = 7; | ||
669 | else | ||
670 | *bits = 8; | ||
671 | |||
672 | quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8; | ||
673 | *baud = port->uartclk / (16 * (quot + 1)); | ||
674 | } | ||
675 | } | ||
676 | |||
677 | static int __init pl010_console_setup(struct console *co, char *options) | ||
678 | { | ||
679 | struct uart_port *port; | ||
680 | int baud = 38400; | ||
681 | int bits = 8; | ||
682 | int parity = 'n'; | ||
683 | int flow = 'n'; | ||
684 | |||
685 | /* | ||
686 | * Check whether an invalid uart number has been specified, and | ||
687 | * if so, search for the first available port that does have | ||
688 | * console support. | ||
689 | */ | ||
690 | if (co->index >= UART_NR) | ||
691 | co->index = 0; | ||
692 | port = &amba_ports[co->index].port; | ||
693 | |||
694 | if (options) | ||
695 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
696 | else | ||
697 | pl010_console_get_options(port, &baud, &parity, &bits); | ||
698 | |||
699 | return uart_set_options(port, co, baud, parity, bits, flow); | ||
700 | } | ||
701 | |||
702 | extern struct uart_driver amba_reg; | ||
703 | static struct console amba_console = { | ||
704 | .name = "ttyAM", | ||
705 | .write = pl010_console_write, | ||
706 | .device = uart_console_device, | ||
707 | .setup = pl010_console_setup, | ||
708 | .flags = CON_PRINTBUFFER, | ||
709 | .index = -1, | ||
710 | .data = &amba_reg, | ||
711 | }; | ||
712 | |||
713 | static int __init amba_console_init(void) | ||
714 | { | ||
715 | /* | ||
716 | * All port initializations are done statically | ||
717 | */ | ||
718 | register_console(&amba_console); | ||
719 | return 0; | ||
720 | } | ||
721 | console_initcall(amba_console_init); | ||
722 | |||
723 | static int __init amba_late_console_init(void) | ||
724 | { | ||
725 | if (!(amba_console.flags & CON_ENABLED)) | ||
726 | register_console(&amba_console); | ||
727 | return 0; | ||
728 | } | ||
729 | late_initcall(amba_late_console_init); | ||
730 | |||
731 | #define AMBA_CONSOLE &amba_console | ||
732 | #else | ||
733 | #define AMBA_CONSOLE NULL | ||
734 | #endif | ||
735 | |||
736 | static struct uart_driver amba_reg = { | ||
737 | .owner = THIS_MODULE, | ||
738 | .driver_name = "ttyAM", | ||
739 | .dev_name = "ttyAM", | ||
740 | .major = SERIAL_AMBA_MAJOR, | ||
741 | .minor = SERIAL_AMBA_MINOR, | ||
742 | .nr = UART_NR, | ||
743 | .cons = AMBA_CONSOLE, | ||
744 | }; | ||
745 | |||
746 | static int pl010_probe(struct amba_device *dev, void *id) | ||
747 | { | ||
748 | int i; | ||
749 | |||
750 | for (i = 0; i < UART_NR; i++) { | ||
751 | if (amba_ports[i].port.mapbase != dev->res.start) | ||
752 | continue; | ||
753 | |||
754 | amba_ports[i].port.dev = &dev->dev; | ||
755 | uart_add_one_port(&amba_reg, &amba_ports[i].port); | ||
756 | amba_set_drvdata(dev, &amba_ports[i]); | ||
757 | break; | ||
758 | } | ||
759 | |||
760 | return 0; | ||
761 | } | ||
762 | |||
763 | static int pl010_remove(struct amba_device *dev) | ||
764 | { | ||
765 | struct uart_amba_port *uap = amba_get_drvdata(dev); | ||
766 | |||
767 | if (uap) | ||
768 | uart_remove_one_port(&amba_reg, &uap->port); | ||
769 | |||
770 | amba_set_drvdata(dev, NULL); | ||
771 | |||
772 | return 0; | ||
773 | } | ||
774 | |||
775 | static int pl010_suspend(struct amba_device *dev, u32 state) | ||
776 | { | ||
777 | struct uart_amba_port *uap = amba_get_drvdata(dev); | ||
778 | |||
779 | if (uap) | ||
780 | uart_suspend_port(&amba_reg, &uap->port); | ||
781 | |||
782 | return 0; | ||
783 | } | ||
784 | |||
785 | static int pl010_resume(struct amba_device *dev) | ||
786 | { | ||
787 | struct uart_amba_port *uap = amba_get_drvdata(dev); | ||
788 | |||
789 | if (uap) | ||
790 | uart_resume_port(&amba_reg, &uap->port); | ||
791 | |||
792 | return 0; | ||
793 | } | ||
794 | |||
795 | static struct amba_id pl010_ids[] __initdata = { | ||
796 | { | ||
797 | .id = 0x00041010, | ||
798 | .mask = 0x000fffff, | ||
799 | }, | ||
800 | { 0, 0 }, | ||
801 | }; | ||
802 | |||
803 | static struct amba_driver pl010_driver = { | ||
804 | .drv = { | ||
805 | .name = "uart-pl010", | ||
806 | }, | ||
807 | .id_table = pl010_ids, | ||
808 | .probe = pl010_probe, | ||
809 | .remove = pl010_remove, | ||
810 | .suspend = pl010_suspend, | ||
811 | .resume = pl010_resume, | ||
812 | }; | ||
813 | |||
814 | static int __init pl010_init(void) | ||
815 | { | ||
816 | int ret; | ||
817 | |||
818 | printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n"); | ||
819 | |||
820 | ret = uart_register_driver(&amba_reg); | ||
821 | if (ret == 0) { | ||
822 | ret = amba_driver_register(&pl010_driver); | ||
823 | if (ret) | ||
824 | uart_unregister_driver(&amba_reg); | ||
825 | } | ||
826 | return ret; | ||
827 | } | ||
828 | |||
829 | static void __exit pl010_exit(void) | ||
830 | { | ||
831 | amba_driver_unregister(&pl010_driver); | ||
832 | uart_unregister_driver(&amba_reg); | ||
833 | } | ||
834 | |||
835 | module_init(pl010_init); | ||
836 | module_exit(pl010_exit); | ||
837 | |||
838 | MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd"); | ||
839 | MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $"); | ||
840 | MODULE_LICENSE("GPL"); | ||