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authorGareth Howlett <ghowlett@connecttech.com>2006-01-04 12:00:42 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-01-04 12:00:42 -0500
commit26e92861be9c0da3be30718de693976b3f6a8026 (patch)
tree22c1e9b40ada381b63d480b2cd7cf71e032dd747 /drivers/serial/8250_pci.c
parent2af7cd68f1ed20e2e72c91988c3d4f457fa29ebc (diff)
[SERIAL] Add support for more Connect Tech PCI serial boards
I've also fixed the sort-ordering comments on this naming convention. Signed-off-by: Stuart MacDonald <stuartm@connecttech.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/serial/8250_pci.c')
-rw-r--r--drivers/serial/8250_pci.c120
1 files changed, 114 insertions, 6 deletions
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 8adca0ce267f..4a589a9456f5 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -853,14 +853,15 @@ get_pci_irq(struct pci_dev *dev, struct pciserial_board *board)
853 * driver_data member. 853 * driver_data member.
854 * 854 *
855 * The makeup of these names are: 855 * The makeup of these names are:
856 * pbn_bn{_bt}_n_baud 856 * pbn_bn{_bt}_n_baud{_offsetinhex}
857 * 857 *
858 * bn = PCI BAR number 858 * bn = PCI BAR number
859 * bt = Index using PCI BARs 859 * bt = Index using PCI BARs
860 * n = number of serial ports 860 * n = number of serial ports
861 * baud = baud rate 861 * baud = baud rate
862 * offsetinhex = offset for each sequential port (in hex)
862 * 863 *
863 * This table is sorted by (in order): baud, bt, bn, n. 864 * This table is sorted by (in order): bn, bt, baud, offsetindex, n.
864 * 865 *
865 * Please note: in theory if n = 1, _bt infix should make no difference. 866 * Please note: in theory if n = 1, _bt infix should make no difference.
866 * ie, pbn_b0_1_115200 is the same as pbn_b0_bt_1_115200 867 * ie, pbn_b0_1_115200 is the same as pbn_b0_bt_1_115200
@@ -881,6 +882,13 @@ enum pci_board_num_t {
881 882
882 pbn_b0_4_1152000, 883 pbn_b0_4_1152000,
883 884
885 pbn_b0_2_1843200,
886 pbn_b0_4_1843200,
887
888 pbn_b0_2_1843200_200,
889 pbn_b0_4_1843200_200,
890 pbn_b0_8_1843200_200,
891
884 pbn_b0_bt_1_115200, 892 pbn_b0_bt_1_115200,
885 pbn_b0_bt_2_115200, 893 pbn_b0_bt_2_115200,
886 pbn_b0_bt_8_115200, 894 pbn_b0_bt_8_115200,
@@ -904,6 +912,8 @@ enum pci_board_num_t {
904 pbn_b1_4_921600, 912 pbn_b1_4_921600,
905 pbn_b1_8_921600, 913 pbn_b1_8_921600,
906 914
915 pbn_b1_2_1250000,
916
907 pbn_b1_bt_2_921600, 917 pbn_b1_bt_2_921600,
908 918
909 pbn_b1_1_1382400, 919 pbn_b1_1_1382400,
@@ -1029,6 +1039,38 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1029 .uart_offset = 8, 1039 .uart_offset = 8,
1030 }, 1040 },
1031 1041
1042 [pbn_b0_2_1843200] = {
1043 .flags = FL_BASE0,
1044 .num_ports = 2,
1045 .base_baud = 1843200,
1046 .uart_offset = 8,
1047 },
1048 [pbn_b0_4_1843200] = {
1049 .flags = FL_BASE0,
1050 .num_ports = 4,
1051 .base_baud = 1843200,
1052 .uart_offset = 8,
1053 },
1054
1055 [pbn_b0_2_1843200_200] = {
1056 .flags = FL_BASE0,
1057 .num_ports = 2,
1058 .base_baud = 1843200,
1059 .uart_offset = 0x200,
1060 },
1061 [pbn_b0_4_1843200_200] = {
1062 .flags = FL_BASE0,
1063 .num_ports = 4,
1064 .base_baud = 1843200,
1065 .uart_offset = 0x200,
1066 },
1067 [pbn_b0_8_1843200_200] = {
1068 .flags = FL_BASE0,
1069 .num_ports = 8,
1070 .base_baud = 1843200,
1071 .uart_offset = 0x200,
1072 },
1073
1032 [pbn_b0_bt_1_115200] = { 1074 [pbn_b0_bt_1_115200] = {
1033 .flags = FL_BASE0|FL_BASE_BARS, 1075 .flags = FL_BASE0|FL_BASE_BARS,
1034 .num_ports = 1, 1076 .num_ports = 1,
@@ -1141,6 +1183,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
1141 .base_baud = 921600, 1183 .base_baud = 921600,
1142 .uart_offset = 8, 1184 .uart_offset = 8,
1143 }, 1185 },
1186 [pbn_b1_2_1250000] = {
1187 .flags = FL_BASE1,
1188 .num_ports = 2,
1189 .base_baud = 1250000,
1190 .uart_offset = 8,
1191 },
1144 1192
1145 [pbn_b1_bt_2_921600] = { 1193 [pbn_b1_bt_2_921600] = {
1146 .flags = FL_BASE1|FL_BASE_BARS, 1194 .flags = FL_BASE1|FL_BASE_BARS,
@@ -1801,6 +1849,66 @@ static struct pci_device_id serial_pci_tbl[] = {
1801 PCI_SUBVENDOR_ID_CONNECT_TECH, 1849 PCI_SUBVENDOR_ID_CONNECT_TECH,
1802 PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1, 0, 0, 1850 PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1, 0, 0,
1803 pbn_b1_4_921600 }, 1851 pbn_b1_4_921600 },
1852 { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
1853 PCI_SUBVENDOR_ID_CONNECT_TECH,
1854 PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ, 0, 0,
1855 pbn_b1_2_1250000 },
1856 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
1857 PCI_SUBVENDOR_ID_CONNECT_TECH,
1858 PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2, 0, 0,
1859 pbn_b0_2_1843200 },
1860 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
1861 PCI_SUBVENDOR_ID_CONNECT_TECH,
1862 PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0,
1863 pbn_b0_4_1843200 },
1864 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
1865 PCI_SUBVENDOR_ID_CONNECT_TECH,
1866 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0,
1867 pbn_b0_2_1843200_200 },
1868 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
1869 PCI_SUBVENDOR_ID_CONNECT_TECH,
1870 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232, 0, 0,
1871 pbn_b0_4_1843200_200 },
1872 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
1873 PCI_SUBVENDOR_ID_CONNECT_TECH,
1874 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232, 0, 0,
1875 pbn_b0_8_1843200_200 },
1876 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
1877 PCI_SUBVENDOR_ID_CONNECT_TECH,
1878 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1, 0, 0,
1879 pbn_b0_2_1843200_200 },
1880 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
1881 PCI_SUBVENDOR_ID_CONNECT_TECH,
1882 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2, 0, 0,
1883 pbn_b0_4_1843200_200 },
1884 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
1885 PCI_SUBVENDOR_ID_CONNECT_TECH,
1886 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4, 0, 0,
1887 pbn_b0_8_1843200_200 },
1888 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
1889 PCI_SUBVENDOR_ID_CONNECT_TECH,
1890 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2, 0, 0,
1891 pbn_b0_2_1843200_200 },
1892 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
1893 PCI_SUBVENDOR_ID_CONNECT_TECH,
1894 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4, 0, 0,
1895 pbn_b0_4_1843200_200 },
1896 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
1897 PCI_SUBVENDOR_ID_CONNECT_TECH,
1898 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8, 0, 0,
1899 pbn_b0_8_1843200_200 },
1900 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
1901 PCI_SUBVENDOR_ID_CONNECT_TECH,
1902 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485, 0, 0,
1903 pbn_b0_2_1843200_200 },
1904 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
1905 PCI_SUBVENDOR_ID_CONNECT_TECH,
1906 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485, 0, 0,
1907 pbn_b0_4_1843200_200 },
1908 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
1909 PCI_SUBVENDOR_ID_CONNECT_TECH,
1910 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0,
1911 pbn_b0_8_1843200_200 },
1804 1912
1805 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, 1913 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530,
1806 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1914 PCI_ANY_ID, PCI_ANY_ID, 0, 0,