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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-07 17:39:20 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-07 17:39:20 -0500
commit56b85f32d530d09d6805488ad00775d4e0e3baab (patch)
treee7fbe69e338ef775d3b2dd822aa915d259b4bc94 /drivers/serial/8250_pci.c
parent3e5b08cbbf78bedd316904ab0cf3b27119433ee5 (diff)
parent568389c257fa7d74ce36c2f78bad31965fded4cf (diff)
Merge branch 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6
* 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6: (36 commits) serial: apbuart: Fixup apbuart_console_init() TTY: Add tty ioctl to figure device node of the system console. tty: add 'active' sysfs attribute to tty0 and console device drivers: serial: apbuart: Handle OF failures gracefully Serial: Avoid unbalanced IRQ wake disable during resume tty: fix typos/errors in tty_driver.h comments pch_uart : fix warnings for 64bit compile 8250: fix uninitialized FIFOs ip2: fix compiler warning on ip2main_pci_tbl specialix: fix compiler warning on specialix_pci_tbl rocket: fix compiler warning on rocket_pci_ids 8250: add a UPIO_DWAPB32 for 32 bit accesses 8250: use container_of() instead of casting serial: omap-serial: Add support for kernel debugger serial: fix pch_uart kconfig & build drivers: char: hvc: add arm JTAG DCC console support RS485 documentation: add 16C950 UART description serial: ifx6x60: fix memory leak serial: ifx6x60: free IRQ on error Serial: EG20T: add PCH_UART driver ... Fixed up conflicts in drivers/serial/apbuart.c with evil merge that makes the code look fairly sane (unlike either side).
Diffstat (limited to 'drivers/serial/8250_pci.c')
-rw-r--r--drivers/serial/8250_pci.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index 842e3b2a02b1..8b8930f700b5 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -957,6 +957,22 @@ pci_default_setup(struct serial_private *priv,
957 return setup_port(priv, port, bar, offset, board->reg_shift); 957 return setup_port(priv, port, bar, offset, board->reg_shift);
958} 958}
959 959
960static int
961ce4100_serial_setup(struct serial_private *priv,
962 const struct pciserial_board *board,
963 struct uart_port *port, int idx)
964{
965 int ret;
966
967 ret = setup_port(priv, port, 0, 0, board->reg_shift);
968 port->iotype = UPIO_MEM32;
969 port->type = PORT_XSCALE;
970 port->flags = (port->flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
971 port->regshift = 2;
972
973 return ret;
974}
975
960static int skip_tx_en_setup(struct serial_private *priv, 976static int skip_tx_en_setup(struct serial_private *priv,
961 const struct pciserial_board *board, 977 const struct pciserial_board *board,
962 struct uart_port *port, int idx) 978 struct uart_port *port, int idx)
@@ -981,6 +997,7 @@ static int skip_tx_en_setup(struct serial_private *priv,
981#define PCI_SUBDEVICE_ID_POCTAL232 0x0308 997#define PCI_SUBDEVICE_ID_POCTAL232 0x0308
982#define PCI_SUBDEVICE_ID_POCTAL422 0x0408 998#define PCI_SUBDEVICE_ID_POCTAL422 0x0408
983#define PCI_VENDOR_ID_ADVANTECH 0x13fe 999#define PCI_VENDOR_ID_ADVANTECH 0x13fe
1000#define PCI_DEVICE_ID_INTEL_CE4100_UART 0x2e66
984#define PCI_DEVICE_ID_ADVANTECH_PCI3620 0x3620 1001#define PCI_DEVICE_ID_ADVANTECH_PCI3620 0x3620
985#define PCI_DEVICE_ID_TITAN_200I 0x8028 1002#define PCI_DEVICE_ID_TITAN_200I 0x8028
986#define PCI_DEVICE_ID_TITAN_400I 0x8048 1003#define PCI_DEVICE_ID_TITAN_400I 0x8048
@@ -1072,6 +1089,13 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1072 .subdevice = PCI_ANY_ID, 1089 .subdevice = PCI_ANY_ID,
1073 .setup = skip_tx_en_setup, 1090 .setup = skip_tx_en_setup,
1074 }, 1091 },
1092 {
1093 .vendor = PCI_VENDOR_ID_INTEL,
1094 .device = PCI_DEVICE_ID_INTEL_CE4100_UART,
1095 .subvendor = PCI_ANY_ID,
1096 .subdevice = PCI_ANY_ID,
1097 .setup = ce4100_serial_setup,
1098 },
1075 /* 1099 /*
1076 * ITE 1100 * ITE
1077 */ 1101 */
@@ -1592,6 +1616,7 @@ enum pci_board_num_t {
1592 pbn_ADDIDATA_PCIe_2_3906250, 1616 pbn_ADDIDATA_PCIe_2_3906250,
1593 pbn_ADDIDATA_PCIe_4_3906250, 1617 pbn_ADDIDATA_PCIe_4_3906250,
1594 pbn_ADDIDATA_PCIe_8_3906250, 1618 pbn_ADDIDATA_PCIe_8_3906250,
1619 pbn_ce4100_1_115200,
1595}; 1620};
1596 1621
1597/* 1622/*
@@ -2281,6 +2306,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
2281 .uart_offset = 0x200, 2306 .uart_offset = 0x200,
2282 .first_offset = 0x1000, 2307 .first_offset = 0x1000,
2283 }, 2308 },
2309 [pbn_ce4100_1_115200] = {
2310 .flags = FL_BASE0,
2311 .num_ports = 1,
2312 .base_baud = 921600,
2313 .reg_shift = 2,
2314 },
2284}; 2315};
2285 2316
2286static const struct pci_device_id softmodem_blacklist[] = { 2317static const struct pci_device_id softmodem_blacklist[] = {
@@ -3765,6 +3796,11 @@ static struct pci_device_id serial_pci_tbl[] = {
3765 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, 3796 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865,
3766 0xA000, 0x3004, 3797 0xA000, 0x3004,
3767 0, 0, pbn_b0_bt_4_115200 }, 3798 0, 0, pbn_b0_bt_4_115200 },
3799 /* Intel CE4100 */
3800 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CE4100_UART,
3801 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3802 pbn_ce4100_1_115200 },
3803
3768 3804
3769 /* 3805 /*
3770 * These entries match devices with class COMMUNICATION_SERIAL, 3806 * These entries match devices with class COMMUNICATION_SERIAL,