diff options
author | Sumit.Saxena@lsi.com <Sumit.Saxena@lsi.com> | 2013-09-06 06:20:52 -0400 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2013-09-10 18:01:26 -0400 |
commit | 94cd65ddf4d70b1d536178d096eeb4d3bd08272e (patch) | |
tree | 201f07f90fb07795d9f6d03409a4ee5407600725 /drivers/scsi | |
parent | 6f8f8e4d313a47e3f8aa7eeb5201d1b02ffa0951 (diff) |
[SCSI] megaraid_sas: addded support for big endian architecture
This patch will add big endian architecture support to megaraid_sas
driver. The support added is for LSI MegaRAID all generation controllers-
(3Gb/s, 6Gb/s and 12 Gb/s controllers).
We have done basic sanity test @ppc64 arch and @x86_64. Additional
testing/observations are welcome.
[jejb: fix up rejections]
Signed-off-by: Kashyap Desai <kashyap.desai@lsi.com>
Signed-off-by: Sumit Saxena <sumit.saxena@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r-- | drivers/scsi/megaraid/megaraid_sas.h | 79 | ||||
-rw-r--r-- | drivers/scsi/megaraid/megaraid_sas_base.c | 323 | ||||
-rw-r--r-- | drivers/scsi/megaraid/megaraid_sas_fp.c | 134 | ||||
-rw-r--r-- | drivers/scsi/megaraid/megaraid_sas_fusion.c | 129 | ||||
-rw-r--r-- | drivers/scsi/megaraid/megaraid_sas_fusion.h | 24 |
5 files changed, 407 insertions, 282 deletions
diff --git a/drivers/scsi/megaraid/megaraid_sas.h b/drivers/scsi/megaraid/megaraid_sas.h index cb32df13d834..0c73ba4bf451 100644 --- a/drivers/scsi/megaraid/megaraid_sas.h +++ b/drivers/scsi/megaraid/megaraid_sas.h | |||
@@ -492,21 +492,39 @@ struct megasas_ctrl_prop { | |||
492 | * a bit in the following structure. | 492 | * a bit in the following structure. |
493 | */ | 493 | */ |
494 | struct { | 494 | struct { |
495 | u32 copyBackDisabled : 1; | 495 | #if defined(__BIG_ENDIAN_BITFIELD) |
496 | u32 SMARTerEnabled : 1; | 496 | u32 reserved:18; |
497 | u32 prCorrectUnconfiguredAreas : 1; | 497 | u32 enableJBOD:1; |
498 | u32 useFdeOnly : 1; | 498 | u32 disableSpinDownHS:1; |
499 | u32 disableNCQ : 1; | 499 | u32 allowBootWithPinnedCache:1; |
500 | u32 SSDSMARTerEnabled : 1; | 500 | u32 disableOnlineCtrlReset:1; |
501 | u32 SSDPatrolReadEnabled : 1; | 501 | u32 enableSecretKeyControl:1; |
502 | u32 enableSpinDownUnconfigured : 1; | 502 | u32 autoEnhancedImport:1; |
503 | u32 autoEnhancedImport : 1; | 503 | u32 enableSpinDownUnconfigured:1; |
504 | u32 enableSecretKeyControl : 1; | 504 | u32 SSDPatrolReadEnabled:1; |
505 | u32 disableOnlineCtrlReset : 1; | 505 | u32 SSDSMARTerEnabled:1; |
506 | u32 allowBootWithPinnedCache : 1; | 506 | u32 disableNCQ:1; |
507 | u32 disableSpinDownHS : 1; | 507 | u32 useFdeOnly:1; |
508 | u32 enableJBOD : 1; | 508 | u32 prCorrectUnconfiguredAreas:1; |
509 | u32 reserved :18; | 509 | u32 SMARTerEnabled:1; |
510 | u32 copyBackDisabled:1; | ||
511 | #else | ||
512 | u32 copyBackDisabled:1; | ||
513 | u32 SMARTerEnabled:1; | ||
514 | u32 prCorrectUnconfiguredAreas:1; | ||
515 | u32 useFdeOnly:1; | ||
516 | u32 disableNCQ:1; | ||
517 | u32 SSDSMARTerEnabled:1; | ||
518 | u32 SSDPatrolReadEnabled:1; | ||
519 | u32 enableSpinDownUnconfigured:1; | ||
520 | u32 autoEnhancedImport:1; | ||
521 | u32 enableSecretKeyControl:1; | ||
522 | u32 disableOnlineCtrlReset:1; | ||
523 | u32 allowBootWithPinnedCache:1; | ||
524 | u32 disableSpinDownHS:1; | ||
525 | u32 enableJBOD:1; | ||
526 | u32 reserved:18; | ||
527 | #endif | ||
510 | } OnOffProperties; | 528 | } OnOffProperties; |
511 | u8 autoSnapVDSpace; | 529 | u8 autoSnapVDSpace; |
512 | u8 viewSpace; | 530 | u8 viewSpace; |
@@ -820,6 +838,30 @@ struct megasas_ctrl_info { | |||
820 | u16 cacheMemorySize; /*7A2h */ | 838 | u16 cacheMemorySize; /*7A2h */ |
821 | 839 | ||
822 | struct { /*7A4h */ | 840 | struct { /*7A4h */ |
841 | #if defined(__BIG_ENDIAN_BITFIELD) | ||
842 | u32 reserved:11; | ||
843 | u32 supportUnevenSpans:1; | ||
844 | u32 dedicatedHotSparesLimited:1; | ||
845 | u32 headlessMode:1; | ||
846 | u32 supportEmulatedDrives:1; | ||
847 | u32 supportResetNow:1; | ||
848 | u32 realTimeScheduler:1; | ||
849 | u32 supportSSDPatrolRead:1; | ||
850 | u32 supportPerfTuning:1; | ||
851 | u32 disableOnlinePFKChange:1; | ||
852 | u32 supportJBOD:1; | ||
853 | u32 supportBootTimePFKChange:1; | ||
854 | u32 supportSetLinkSpeed:1; | ||
855 | u32 supportEmergencySpares:1; | ||
856 | u32 supportSuspendResumeBGops:1; | ||
857 | u32 blockSSDWriteCacheChange:1; | ||
858 | u32 supportShieldState:1; | ||
859 | u32 supportLdBBMInfo:1; | ||
860 | u32 supportLdPIType3:1; | ||
861 | u32 supportLdPIType2:1; | ||
862 | u32 supportLdPIType1:1; | ||
863 | u32 supportPIcontroller:1; | ||
864 | #else | ||
823 | u32 supportPIcontroller:1; | 865 | u32 supportPIcontroller:1; |
824 | u32 supportLdPIType1:1; | 866 | u32 supportLdPIType1:1; |
825 | u32 supportLdPIType2:1; | 867 | u32 supportLdPIType2:1; |
@@ -845,6 +887,7 @@ struct megasas_ctrl_info { | |||
845 | 887 | ||
846 | u32 supportUnevenSpans:1; | 888 | u32 supportUnevenSpans:1; |
847 | u32 reserved:11; | 889 | u32 reserved:11; |
890 | #endif | ||
848 | } adapterOperations2; | 891 | } adapterOperations2; |
849 | 892 | ||
850 | u8 driverVersion[32]; /*7A8h */ | 893 | u8 driverVersion[32]; /*7A8h */ |
@@ -1069,9 +1112,15 @@ union megasas_sgl_frame { | |||
1069 | 1112 | ||
1070 | typedef union _MFI_CAPABILITIES { | 1113 | typedef union _MFI_CAPABILITIES { |
1071 | struct { | 1114 | struct { |
1115 | #if defined(__BIG_ENDIAN_BITFIELD) | ||
1116 | u32 reserved:30; | ||
1117 | u32 support_additional_msix:1; | ||
1118 | u32 support_fp_remote_lun:1; | ||
1119 | #else | ||
1072 | u32 support_fp_remote_lun:1; | 1120 | u32 support_fp_remote_lun:1; |
1073 | u32 support_additional_msix:1; | 1121 | u32 support_additional_msix:1; |
1074 | u32 reserved:30; | 1122 | u32 reserved:30; |
1123 | #endif | ||
1075 | } mfi_capabilities; | 1124 | } mfi_capabilities; |
1076 | u32 reg; | 1125 | u32 reg; |
1077 | } MFI_CAPABILITIES; | 1126 | } MFI_CAPABILITIES; |
diff --git a/drivers/scsi/megaraid/megaraid_sas_base.c b/drivers/scsi/megaraid/megaraid_sas_base.c index 3eaec7ca8452..3020921a4746 100644 --- a/drivers/scsi/megaraid/megaraid_sas_base.c +++ b/drivers/scsi/megaraid/megaraid_sas_base.c | |||
@@ -376,13 +376,11 @@ static int | |||
376 | megasas_check_reset_xscale(struct megasas_instance *instance, | 376 | megasas_check_reset_xscale(struct megasas_instance *instance, |
377 | struct megasas_register_set __iomem *regs) | 377 | struct megasas_register_set __iomem *regs) |
378 | { | 378 | { |
379 | u32 consumer; | ||
380 | consumer = *instance->consumer; | ||
381 | 379 | ||
382 | if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) && | 380 | if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) && |
383 | (*instance->consumer == MEGASAS_ADPRESET_INPROG_SIGN)) { | 381 | (le32_to_cpu(*instance->consumer) == |
382 | MEGASAS_ADPRESET_INPROG_SIGN)) | ||
384 | return 1; | 383 | return 1; |
385 | } | ||
386 | return 0; | 384 | return 0; |
387 | } | 385 | } |
388 | 386 | ||
@@ -631,9 +629,10 @@ megasas_fire_cmd_skinny(struct megasas_instance *instance, | |||
631 | { | 629 | { |
632 | unsigned long flags; | 630 | unsigned long flags; |
633 | spin_lock_irqsave(&instance->hba_lock, flags); | 631 | spin_lock_irqsave(&instance->hba_lock, flags); |
634 | writel(0, &(regs)->inbound_high_queue_port); | 632 | writel(upper_32_bits(frame_phys_addr), |
635 | writel((frame_phys_addr | (frame_count<<1))|1, | 633 | &(regs)->inbound_high_queue_port); |
636 | &(regs)->inbound_low_queue_port); | 634 | writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1, |
635 | &(regs)->inbound_low_queue_port); | ||
637 | spin_unlock_irqrestore(&instance->hba_lock, flags); | 636 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
638 | } | 637 | } |
639 | 638 | ||
@@ -881,8 +880,8 @@ megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd) | |||
881 | 880 | ||
882 | struct megasas_header *frame_hdr = &cmd->frame->hdr; | 881 | struct megasas_header *frame_hdr = &cmd->frame->hdr; |
883 | 882 | ||
884 | frame_hdr->cmd_status = 0xFF; | 883 | frame_hdr->cmd_status = MFI_CMD_STATUS_POLL_MODE; |
885 | frame_hdr->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; | 884 | frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE); |
886 | 885 | ||
887 | /* | 886 | /* |
888 | * Issue the frame using inbound queue port | 887 | * Issue the frame using inbound queue port |
@@ -946,10 +945,12 @@ megasas_issue_blocked_abort_cmd(struct megasas_instance *instance, | |||
946 | */ | 945 | */ |
947 | abort_fr->cmd = MFI_CMD_ABORT; | 946 | abort_fr->cmd = MFI_CMD_ABORT; |
948 | abort_fr->cmd_status = 0xFF; | 947 | abort_fr->cmd_status = 0xFF; |
949 | abort_fr->flags = 0; | 948 | abort_fr->flags = cpu_to_le16(0); |
950 | abort_fr->abort_context = cmd_to_abort->index; | 949 | abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index); |
951 | abort_fr->abort_mfi_phys_addr_lo = cmd_to_abort->frame_phys_addr; | 950 | abort_fr->abort_mfi_phys_addr_lo = |
952 | abort_fr->abort_mfi_phys_addr_hi = 0; | 951 | cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr)); |
952 | abort_fr->abort_mfi_phys_addr_hi = | ||
953 | cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr)); | ||
953 | 954 | ||
954 | cmd->sync_cmd = 1; | 955 | cmd->sync_cmd = 1; |
955 | cmd->cmd_status = 0xFF; | 956 | cmd->cmd_status = 0xFF; |
@@ -988,8 +989,8 @@ megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
988 | 989 | ||
989 | if (sge_count) { | 990 | if (sge_count) { |
990 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | 991 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { |
991 | mfi_sgl->sge32[i].length = sg_dma_len(os_sgl); | 992 | mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl)); |
992 | mfi_sgl->sge32[i].phys_addr = sg_dma_address(os_sgl); | 993 | mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl)); |
993 | } | 994 | } |
994 | } | 995 | } |
995 | return sge_count; | 996 | return sge_count; |
@@ -1017,8 +1018,8 @@ megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1017 | 1018 | ||
1018 | if (sge_count) { | 1019 | if (sge_count) { |
1019 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | 1020 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { |
1020 | mfi_sgl->sge64[i].length = sg_dma_len(os_sgl); | 1021 | mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl)); |
1021 | mfi_sgl->sge64[i].phys_addr = sg_dma_address(os_sgl); | 1022 | mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl)); |
1022 | } | 1023 | } |
1023 | } | 1024 | } |
1024 | return sge_count; | 1025 | return sge_count; |
@@ -1045,10 +1046,11 @@ megasas_make_sgl_skinny(struct megasas_instance *instance, | |||
1045 | 1046 | ||
1046 | if (sge_count) { | 1047 | if (sge_count) { |
1047 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | 1048 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { |
1048 | mfi_sgl->sge_skinny[i].length = sg_dma_len(os_sgl); | 1049 | mfi_sgl->sge_skinny[i].length = |
1050 | cpu_to_le32(sg_dma_len(os_sgl)); | ||
1049 | mfi_sgl->sge_skinny[i].phys_addr = | 1051 | mfi_sgl->sge_skinny[i].phys_addr = |
1050 | sg_dma_address(os_sgl); | 1052 | cpu_to_le64(sg_dma_address(os_sgl)); |
1051 | mfi_sgl->sge_skinny[i].flag = 0; | 1053 | mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0); |
1052 | } | 1054 | } |
1053 | } | 1055 | } |
1054 | return sge_count; | 1056 | return sge_count; |
@@ -1157,8 +1159,8 @@ megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1157 | pthru->cdb_len = scp->cmd_len; | 1159 | pthru->cdb_len = scp->cmd_len; |
1158 | pthru->timeout = 0; | 1160 | pthru->timeout = 0; |
1159 | pthru->pad_0 = 0; | 1161 | pthru->pad_0 = 0; |
1160 | pthru->flags = flags; | 1162 | pthru->flags = cpu_to_le16(flags); |
1161 | pthru->data_xfer_len = scsi_bufflen(scp); | 1163 | pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp)); |
1162 | 1164 | ||
1163 | memcpy(pthru->cdb, scp->cmnd, scp->cmd_len); | 1165 | memcpy(pthru->cdb, scp->cmnd, scp->cmd_len); |
1164 | 1166 | ||
@@ -1170,18 +1172,18 @@ megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1170 | if ((scp->request->timeout / HZ) > 0xFFFF) | 1172 | if ((scp->request->timeout / HZ) > 0xFFFF) |
1171 | pthru->timeout = 0xFFFF; | 1173 | pthru->timeout = 0xFFFF; |
1172 | else | 1174 | else |
1173 | pthru->timeout = scp->request->timeout / HZ; | 1175 | pthru->timeout = cpu_to_le16(scp->request->timeout / HZ); |
1174 | } | 1176 | } |
1175 | 1177 | ||
1176 | /* | 1178 | /* |
1177 | * Construct SGL | 1179 | * Construct SGL |
1178 | */ | 1180 | */ |
1179 | if (instance->flag_ieee == 1) { | 1181 | if (instance->flag_ieee == 1) { |
1180 | pthru->flags |= MFI_FRAME_SGL64; | 1182 | pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
1181 | pthru->sge_count = megasas_make_sgl_skinny(instance, scp, | 1183 | pthru->sge_count = megasas_make_sgl_skinny(instance, scp, |
1182 | &pthru->sgl); | 1184 | &pthru->sgl); |
1183 | } else if (IS_DMA64) { | 1185 | } else if (IS_DMA64) { |
1184 | pthru->flags |= MFI_FRAME_SGL64; | 1186 | pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
1185 | pthru->sge_count = megasas_make_sgl64(instance, scp, | 1187 | pthru->sge_count = megasas_make_sgl64(instance, scp, |
1186 | &pthru->sgl); | 1188 | &pthru->sgl); |
1187 | } else | 1189 | } else |
@@ -1198,8 +1200,10 @@ megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1198 | * Sense info specific | 1200 | * Sense info specific |
1199 | */ | 1201 | */ |
1200 | pthru->sense_len = SCSI_SENSE_BUFFERSIZE; | 1202 | pthru->sense_len = SCSI_SENSE_BUFFERSIZE; |
1201 | pthru->sense_buf_phys_addr_hi = 0; | 1203 | pthru->sense_buf_phys_addr_hi = |
1202 | pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr; | 1204 | cpu_to_le32(upper_32_bits(cmd->sense_phys_addr)); |
1205 | pthru->sense_buf_phys_addr_lo = | ||
1206 | cpu_to_le32(lower_32_bits(cmd->sense_phys_addr)); | ||
1203 | 1207 | ||
1204 | /* | 1208 | /* |
1205 | * Compute the total number of frames this command consumes. FW uses | 1209 | * Compute the total number of frames this command consumes. FW uses |
@@ -1250,7 +1254,7 @@ megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1250 | ldio->timeout = 0; | 1254 | ldio->timeout = 0; |
1251 | ldio->reserved_0 = 0; | 1255 | ldio->reserved_0 = 0; |
1252 | ldio->pad_0 = 0; | 1256 | ldio->pad_0 = 0; |
1253 | ldio->flags = flags; | 1257 | ldio->flags = cpu_to_le16(flags); |
1254 | ldio->start_lba_hi = 0; | 1258 | ldio->start_lba_hi = 0; |
1255 | ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0; | 1259 | ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0; |
1256 | 1260 | ||
@@ -1258,52 +1262,59 @@ megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1258 | * 6-byte READ(0x08) or WRITE(0x0A) cdb | 1262 | * 6-byte READ(0x08) or WRITE(0x0A) cdb |
1259 | */ | 1263 | */ |
1260 | if (scp->cmd_len == 6) { | 1264 | if (scp->cmd_len == 6) { |
1261 | ldio->lba_count = (u32) scp->cmnd[4]; | 1265 | ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]); |
1262 | ldio->start_lba_lo = ((u32) scp->cmnd[1] << 16) | | 1266 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) | |
1263 | ((u32) scp->cmnd[2] << 8) | (u32) scp->cmnd[3]; | 1267 | ((u32) scp->cmnd[2] << 8) | |
1268 | (u32) scp->cmnd[3]); | ||
1264 | 1269 | ||
1265 | ldio->start_lba_lo &= 0x1FFFFF; | 1270 | ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF); |
1266 | } | 1271 | } |
1267 | 1272 | ||
1268 | /* | 1273 | /* |
1269 | * 10-byte READ(0x28) or WRITE(0x2A) cdb | 1274 | * 10-byte READ(0x28) or WRITE(0x2A) cdb |
1270 | */ | 1275 | */ |
1271 | else if (scp->cmd_len == 10) { | 1276 | else if (scp->cmd_len == 10) { |
1272 | ldio->lba_count = (u32) scp->cmnd[8] | | 1277 | ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] | |
1273 | ((u32) scp->cmnd[7] << 8); | 1278 | ((u32) scp->cmnd[7] << 8)); |
1274 | ldio->start_lba_lo = ((u32) scp->cmnd[2] << 24) | | 1279 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) | |
1275 | ((u32) scp->cmnd[3] << 16) | | 1280 | ((u32) scp->cmnd[3] << 16) | |
1276 | ((u32) scp->cmnd[4] << 8) | (u32) scp->cmnd[5]; | 1281 | ((u32) scp->cmnd[4] << 8) | |
1282 | (u32) scp->cmnd[5]); | ||
1277 | } | 1283 | } |
1278 | 1284 | ||
1279 | /* | 1285 | /* |
1280 | * 12-byte READ(0xA8) or WRITE(0xAA) cdb | 1286 | * 12-byte READ(0xA8) or WRITE(0xAA) cdb |
1281 | */ | 1287 | */ |
1282 | else if (scp->cmd_len == 12) { | 1288 | else if (scp->cmd_len == 12) { |
1283 | ldio->lba_count = ((u32) scp->cmnd[6] << 24) | | 1289 | ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) | |
1284 | ((u32) scp->cmnd[7] << 16) | | 1290 | ((u32) scp->cmnd[7] << 16) | |
1285 | ((u32) scp->cmnd[8] << 8) | (u32) scp->cmnd[9]; | 1291 | ((u32) scp->cmnd[8] << 8) | |
1292 | (u32) scp->cmnd[9]); | ||
1286 | 1293 | ||
1287 | ldio->start_lba_lo = ((u32) scp->cmnd[2] << 24) | | 1294 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) | |
1288 | ((u32) scp->cmnd[3] << 16) | | 1295 | ((u32) scp->cmnd[3] << 16) | |
1289 | ((u32) scp->cmnd[4] << 8) | (u32) scp->cmnd[5]; | 1296 | ((u32) scp->cmnd[4] << 8) | |
1297 | (u32) scp->cmnd[5]); | ||
1290 | } | 1298 | } |
1291 | 1299 | ||
1292 | /* | 1300 | /* |
1293 | * 16-byte READ(0x88) or WRITE(0x8A) cdb | 1301 | * 16-byte READ(0x88) or WRITE(0x8A) cdb |
1294 | */ | 1302 | */ |
1295 | else if (scp->cmd_len == 16) { | 1303 | else if (scp->cmd_len == 16) { |
1296 | ldio->lba_count = ((u32) scp->cmnd[10] << 24) | | 1304 | ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) | |
1297 | ((u32) scp->cmnd[11] << 16) | | 1305 | ((u32) scp->cmnd[11] << 16) | |
1298 | ((u32) scp->cmnd[12] << 8) | (u32) scp->cmnd[13]; | 1306 | ((u32) scp->cmnd[12] << 8) | |
1307 | (u32) scp->cmnd[13]); | ||
1299 | 1308 | ||
1300 | ldio->start_lba_lo = ((u32) scp->cmnd[6] << 24) | | 1309 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) | |
1301 | ((u32) scp->cmnd[7] << 16) | | 1310 | ((u32) scp->cmnd[7] << 16) | |
1302 | ((u32) scp->cmnd[8] << 8) | (u32) scp->cmnd[9]; | 1311 | ((u32) scp->cmnd[8] << 8) | |
1312 | (u32) scp->cmnd[9]); | ||
1303 | 1313 | ||
1304 | ldio->start_lba_hi = ((u32) scp->cmnd[2] << 24) | | 1314 | ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) | |
1305 | ((u32) scp->cmnd[3] << 16) | | 1315 | ((u32) scp->cmnd[3] << 16) | |
1306 | ((u32) scp->cmnd[4] << 8) | (u32) scp->cmnd[5]; | 1316 | ((u32) scp->cmnd[4] << 8) | |
1317 | (u32) scp->cmnd[5]); | ||
1307 | 1318 | ||
1308 | } | 1319 | } |
1309 | 1320 | ||
@@ -1311,11 +1322,11 @@ megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1311 | * Construct SGL | 1322 | * Construct SGL |
1312 | */ | 1323 | */ |
1313 | if (instance->flag_ieee) { | 1324 | if (instance->flag_ieee) { |
1314 | ldio->flags |= MFI_FRAME_SGL64; | 1325 | ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
1315 | ldio->sge_count = megasas_make_sgl_skinny(instance, scp, | 1326 | ldio->sge_count = megasas_make_sgl_skinny(instance, scp, |
1316 | &ldio->sgl); | 1327 | &ldio->sgl); |
1317 | } else if (IS_DMA64) { | 1328 | } else if (IS_DMA64) { |
1318 | ldio->flags |= MFI_FRAME_SGL64; | 1329 | ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
1319 | ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl); | 1330 | ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl); |
1320 | } else | 1331 | } else |
1321 | ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl); | 1332 | ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl); |
@@ -1331,7 +1342,7 @@ megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp, | |||
1331 | */ | 1342 | */ |
1332 | ldio->sense_len = SCSI_SENSE_BUFFERSIZE; | 1343 | ldio->sense_len = SCSI_SENSE_BUFFERSIZE; |
1333 | ldio->sense_buf_phys_addr_hi = 0; | 1344 | ldio->sense_buf_phys_addr_hi = 0; |
1334 | ldio->sense_buf_phys_addr_lo = cmd->sense_phys_addr; | 1345 | ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr); |
1335 | 1346 | ||
1336 | /* | 1347 | /* |
1337 | * Compute the total number of frames this command consumes. FW uses | 1348 | * Compute the total number of frames this command consumes. FW uses |
@@ -1402,20 +1413,32 @@ megasas_dump_pending_frames(struct megasas_instance *instance) | |||
1402 | ldio = (struct megasas_io_frame *)cmd->frame; | 1413 | ldio = (struct megasas_io_frame *)cmd->frame; |
1403 | mfi_sgl = &ldio->sgl; | 1414 | mfi_sgl = &ldio->sgl; |
1404 | sgcount = ldio->sge_count; | 1415 | sgcount = ldio->sge_count; |
1405 | printk(KERN_ERR "megasas[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",instance->host->host_no, cmd->frame_count,ldio->cmd,ldio->target_id, ldio->start_lba_lo,ldio->start_lba_hi,ldio->sense_buf_phys_addr_lo,sgcount); | 1416 | printk(KERN_ERR "megasas[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x," |
1417 | " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n", | ||
1418 | instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id, | ||
1419 | le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi), | ||
1420 | le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount); | ||
1406 | } | 1421 | } |
1407 | else { | 1422 | else { |
1408 | pthru = (struct megasas_pthru_frame *) cmd->frame; | 1423 | pthru = (struct megasas_pthru_frame *) cmd->frame; |
1409 | mfi_sgl = &pthru->sgl; | 1424 | mfi_sgl = &pthru->sgl; |
1410 | sgcount = pthru->sge_count; | 1425 | sgcount = pthru->sge_count; |
1411 | printk(KERN_ERR "megasas[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",instance->host->host_no,cmd->frame_count,pthru->cmd,pthru->target_id,pthru->lun,pthru->cdb_len , pthru->data_xfer_len,pthru->sense_buf_phys_addr_lo,sgcount); | 1426 | printk(KERN_ERR "megasas[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, " |
1427 | "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n", | ||
1428 | instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id, | ||
1429 | pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len), | ||
1430 | le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount); | ||
1412 | } | 1431 | } |
1413 | if(megasas_dbg_lvl & MEGASAS_DBG_LVL){ | 1432 | if(megasas_dbg_lvl & MEGASAS_DBG_LVL){ |
1414 | for (n = 0; n < sgcount; n++){ | 1433 | for (n = 0; n < sgcount; n++){ |
1415 | if (IS_DMA64) | 1434 | if (IS_DMA64) |
1416 | printk(KERN_ERR "megasas: sgl len : 0x%x, sgl addr : 0x%08lx ",mfi_sgl->sge64[n].length , (unsigned long)mfi_sgl->sge64[n].phys_addr) ; | 1435 | printk(KERN_ERR "megasas: sgl len : 0x%x, sgl addr : 0x%llx ", |
1436 | le32_to_cpu(mfi_sgl->sge64[n].length), | ||
1437 | le64_to_cpu(mfi_sgl->sge64[n].phys_addr)); | ||
1417 | else | 1438 | else |
1418 | printk(KERN_ERR "megasas: sgl len : 0x%x, sgl addr : 0x%x ",mfi_sgl->sge32[n].length , mfi_sgl->sge32[n].phys_addr) ; | 1439 | printk(KERN_ERR "megasas: sgl len : 0x%x, sgl addr : 0x%x ", |
1440 | le32_to_cpu(mfi_sgl->sge32[n].length), | ||
1441 | le32_to_cpu(mfi_sgl->sge32[n].phys_addr)); | ||
1419 | } | 1442 | } |
1420 | } | 1443 | } |
1421 | printk(KERN_ERR "\n"); | 1444 | printk(KERN_ERR "\n"); |
@@ -1676,11 +1699,11 @@ static void megasas_complete_cmd_dpc(unsigned long instance_addr) | |||
1676 | 1699 | ||
1677 | spin_lock_irqsave(&instance->completion_lock, flags); | 1700 | spin_lock_irqsave(&instance->completion_lock, flags); |
1678 | 1701 | ||
1679 | producer = *instance->producer; | 1702 | producer = le32_to_cpu(*instance->producer); |
1680 | consumer = *instance->consumer; | 1703 | consumer = le32_to_cpu(*instance->consumer); |
1681 | 1704 | ||
1682 | while (consumer != producer) { | 1705 | while (consumer != producer) { |
1683 | context = instance->reply_queue[consumer]; | 1706 | context = le32_to_cpu(instance->reply_queue[consumer]); |
1684 | if (context >= instance->max_fw_cmds) { | 1707 | if (context >= instance->max_fw_cmds) { |
1685 | printk(KERN_ERR "Unexpected context value %x\n", | 1708 | printk(KERN_ERR "Unexpected context value %x\n", |
1686 | context); | 1709 | context); |
@@ -1697,7 +1720,7 @@ static void megasas_complete_cmd_dpc(unsigned long instance_addr) | |||
1697 | } | 1720 | } |
1698 | } | 1721 | } |
1699 | 1722 | ||
1700 | *instance->consumer = producer; | 1723 | *instance->consumer = cpu_to_le32(producer); |
1701 | 1724 | ||
1702 | spin_unlock_irqrestore(&instance->completion_lock, flags); | 1725 | spin_unlock_irqrestore(&instance->completion_lock, flags); |
1703 | 1726 | ||
@@ -1718,7 +1741,7 @@ void megasas_do_ocr(struct megasas_instance *instance) | |||
1718 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) || | 1741 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) || |
1719 | (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) || | 1742 | (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) || |
1720 | (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) { | 1743 | (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) { |
1721 | *instance->consumer = MEGASAS_ADPRESET_INPROG_SIGN; | 1744 | *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN); |
1722 | } | 1745 | } |
1723 | instance->instancet->disable_intr(instance); | 1746 | instance->instancet->disable_intr(instance); |
1724 | instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT; | 1747 | instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT; |
@@ -2188,6 +2211,7 @@ megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, | |||
2188 | struct megasas_header *hdr = &cmd->frame->hdr; | 2211 | struct megasas_header *hdr = &cmd->frame->hdr; |
2189 | unsigned long flags; | 2212 | unsigned long flags; |
2190 | struct fusion_context *fusion = instance->ctrl_context; | 2213 | struct fusion_context *fusion = instance->ctrl_context; |
2214 | u32 opcode; | ||
2191 | 2215 | ||
2192 | /* flag for the retry reset */ | 2216 | /* flag for the retry reset */ |
2193 | cmd->retry_for_fw_reset = 0; | 2217 | cmd->retry_for_fw_reset = 0; |
@@ -2289,9 +2313,10 @@ megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, | |||
2289 | case MFI_CMD_SMP: | 2313 | case MFI_CMD_SMP: |
2290 | case MFI_CMD_STP: | 2314 | case MFI_CMD_STP: |
2291 | case MFI_CMD_DCMD: | 2315 | case MFI_CMD_DCMD: |
2316 | opcode = le32_to_cpu(cmd->frame->dcmd.opcode); | ||
2292 | /* Check for LD map update */ | 2317 | /* Check for LD map update */ |
2293 | if ((cmd->frame->dcmd.opcode == MR_DCMD_LD_MAP_GET_INFO) && | 2318 | if ((opcode == MR_DCMD_LD_MAP_GET_INFO) |
2294 | (cmd->frame->dcmd.mbox.b[1] == 1)) { | 2319 | && (cmd->frame->dcmd.mbox.b[1] == 1)) { |
2295 | fusion->fast_path_io = 0; | 2320 | fusion->fast_path_io = 0; |
2296 | spin_lock_irqsave(instance->host->host_lock, flags); | 2321 | spin_lock_irqsave(instance->host->host_lock, flags); |
2297 | if (cmd->frame->hdr.cmd_status != 0) { | 2322 | if (cmd->frame->hdr.cmd_status != 0) { |
@@ -2325,8 +2350,8 @@ megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, | |||
2325 | flags); | 2350 | flags); |
2326 | break; | 2351 | break; |
2327 | } | 2352 | } |
2328 | if (cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_GET_INFO || | 2353 | if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO || |
2329 | cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_GET) { | 2354 | opcode == MR_DCMD_CTRL_EVENT_GET) { |
2330 | spin_lock_irqsave(&poll_aen_lock, flags); | 2355 | spin_lock_irqsave(&poll_aen_lock, flags); |
2331 | megasas_poll_wait_aen = 0; | 2356 | megasas_poll_wait_aen = 0; |
2332 | spin_unlock_irqrestore(&poll_aen_lock, flags); | 2357 | spin_unlock_irqrestore(&poll_aen_lock, flags); |
@@ -2335,7 +2360,7 @@ megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, | |||
2335 | /* | 2360 | /* |
2336 | * See if got an event notification | 2361 | * See if got an event notification |
2337 | */ | 2362 | */ |
2338 | if (cmd->frame->dcmd.opcode == MR_DCMD_CTRL_EVENT_WAIT) | 2363 | if (opcode == MR_DCMD_CTRL_EVENT_WAIT) |
2339 | megasas_service_aen(instance, cmd); | 2364 | megasas_service_aen(instance, cmd); |
2340 | else | 2365 | else |
2341 | megasas_complete_int_cmd(instance, cmd); | 2366 | megasas_complete_int_cmd(instance, cmd); |
@@ -2608,7 +2633,7 @@ megasas_deplete_reply_queue(struct megasas_instance *instance, | |||
2608 | PCI_DEVICE_ID_LSI_VERDE_ZCR)) { | 2633 | PCI_DEVICE_ID_LSI_VERDE_ZCR)) { |
2609 | 2634 | ||
2610 | *instance->consumer = | 2635 | *instance->consumer = |
2611 | MEGASAS_ADPRESET_INPROG_SIGN; | 2636 | cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN); |
2612 | } | 2637 | } |
2613 | 2638 | ||
2614 | 2639 | ||
@@ -2985,7 +3010,7 @@ static int megasas_create_frame_pool(struct megasas_instance *instance) | |||
2985 | } | 3010 | } |
2986 | 3011 | ||
2987 | memset(cmd->frame, 0, total_sz); | 3012 | memset(cmd->frame, 0, total_sz); |
2988 | cmd->frame->io.context = cmd->index; | 3013 | cmd->frame->io.context = cpu_to_le32(cmd->index); |
2989 | cmd->frame->io.pad_0 = 0; | 3014 | cmd->frame->io.pad_0 = 0; |
2990 | if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) && | 3015 | if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) && |
2991 | (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) && | 3016 | (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) && |
@@ -3145,13 +3170,13 @@ megasas_get_pd_list(struct megasas_instance *instance) | |||
3145 | dcmd->cmd = MFI_CMD_DCMD; | 3170 | dcmd->cmd = MFI_CMD_DCMD; |
3146 | dcmd->cmd_status = 0xFF; | 3171 | dcmd->cmd_status = 0xFF; |
3147 | dcmd->sge_count = 1; | 3172 | dcmd->sge_count = 1; |
3148 | dcmd->flags = MFI_FRAME_DIR_READ; | 3173 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
3149 | dcmd->timeout = 0; | 3174 | dcmd->timeout = 0; |
3150 | dcmd->pad_0 = 0; | 3175 | dcmd->pad_0 = 0; |
3151 | dcmd->data_xfer_len = MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST); | 3176 | dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST)); |
3152 | dcmd->opcode = MR_DCMD_PD_LIST_QUERY; | 3177 | dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY); |
3153 | dcmd->sgl.sge32[0].phys_addr = ci_h; | 3178 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); |
3154 | dcmd->sgl.sge32[0].length = MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST); | 3179 | dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST)); |
3155 | 3180 | ||
3156 | if (!megasas_issue_polled(instance, cmd)) { | 3181 | if (!megasas_issue_polled(instance, cmd)) { |
3157 | ret = 0; | 3182 | ret = 0; |
@@ -3166,16 +3191,16 @@ megasas_get_pd_list(struct megasas_instance *instance) | |||
3166 | pd_addr = ci->addr; | 3191 | pd_addr = ci->addr; |
3167 | 3192 | ||
3168 | if ( ret == 0 && | 3193 | if ( ret == 0 && |
3169 | (ci->count < | 3194 | (le32_to_cpu(ci->count) < |
3170 | (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) { | 3195 | (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) { |
3171 | 3196 | ||
3172 | memset(instance->pd_list, 0, | 3197 | memset(instance->pd_list, 0, |
3173 | MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)); | 3198 | MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)); |
3174 | 3199 | ||
3175 | for (pd_index = 0; pd_index < ci->count; pd_index++) { | 3200 | for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) { |
3176 | 3201 | ||
3177 | instance->pd_list[pd_addr->deviceId].tid = | 3202 | instance->pd_list[pd_addr->deviceId].tid = |
3178 | pd_addr->deviceId; | 3203 | le16_to_cpu(pd_addr->deviceId); |
3179 | instance->pd_list[pd_addr->deviceId].driveType = | 3204 | instance->pd_list[pd_addr->deviceId].driveType = |
3180 | pd_addr->scsiDevType; | 3205 | pd_addr->scsiDevType; |
3181 | instance->pd_list[pd_addr->deviceId].driveState = | 3206 | instance->pd_list[pd_addr->deviceId].driveState = |
@@ -3209,6 +3234,7 @@ megasas_get_ld_list(struct megasas_instance *instance) | |||
3209 | struct megasas_dcmd_frame *dcmd; | 3234 | struct megasas_dcmd_frame *dcmd; |
3210 | struct MR_LD_LIST *ci; | 3235 | struct MR_LD_LIST *ci; |
3211 | dma_addr_t ci_h = 0; | 3236 | dma_addr_t ci_h = 0; |
3237 | u32 ld_count; | ||
3212 | 3238 | ||
3213 | cmd = megasas_get_cmd(instance); | 3239 | cmd = megasas_get_cmd(instance); |
3214 | 3240 | ||
@@ -3235,12 +3261,12 @@ megasas_get_ld_list(struct megasas_instance *instance) | |||
3235 | dcmd->cmd = MFI_CMD_DCMD; | 3261 | dcmd->cmd = MFI_CMD_DCMD; |
3236 | dcmd->cmd_status = 0xFF; | 3262 | dcmd->cmd_status = 0xFF; |
3237 | dcmd->sge_count = 1; | 3263 | dcmd->sge_count = 1; |
3238 | dcmd->flags = MFI_FRAME_DIR_READ; | 3264 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
3239 | dcmd->timeout = 0; | 3265 | dcmd->timeout = 0; |
3240 | dcmd->data_xfer_len = sizeof(struct MR_LD_LIST); | 3266 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST)); |
3241 | dcmd->opcode = MR_DCMD_LD_GET_LIST; | 3267 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST); |
3242 | dcmd->sgl.sge32[0].phys_addr = ci_h; | 3268 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); |
3243 | dcmd->sgl.sge32[0].length = sizeof(struct MR_LD_LIST); | 3269 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST)); |
3244 | dcmd->pad_0 = 0; | 3270 | dcmd->pad_0 = 0; |
3245 | 3271 | ||
3246 | if (!megasas_issue_polled(instance, cmd)) { | 3272 | if (!megasas_issue_polled(instance, cmd)) { |
@@ -3249,12 +3275,14 @@ megasas_get_ld_list(struct megasas_instance *instance) | |||
3249 | ret = -1; | 3275 | ret = -1; |
3250 | } | 3276 | } |
3251 | 3277 | ||
3278 | ld_count = le32_to_cpu(ci->ldCount); | ||
3279 | |||
3252 | /* the following function will get the instance PD LIST */ | 3280 | /* the following function will get the instance PD LIST */ |
3253 | 3281 | ||
3254 | if ((ret == 0) && (ci->ldCount <= MAX_LOGICAL_DRIVES)) { | 3282 | if ((ret == 0) && (ld_count <= MAX_LOGICAL_DRIVES)) { |
3255 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); | 3283 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); |
3256 | 3284 | ||
3257 | for (ld_index = 0; ld_index < ci->ldCount; ld_index++) { | 3285 | for (ld_index = 0; ld_index < ld_count; ld_index++) { |
3258 | if (ci->ldList[ld_index].state != 0) { | 3286 | if (ci->ldList[ld_index].state != 0) { |
3259 | ids = ci->ldList[ld_index].ref.targetId; | 3287 | ids = ci->ldList[ld_index].ref.targetId; |
3260 | instance->ld_ids[ids] = | 3288 | instance->ld_ids[ids] = |
@@ -3289,6 +3317,7 @@ megasas_ld_list_query(struct megasas_instance *instance, u8 query_type) | |||
3289 | struct megasas_dcmd_frame *dcmd; | 3317 | struct megasas_dcmd_frame *dcmd; |
3290 | struct MR_LD_TARGETID_LIST *ci; | 3318 | struct MR_LD_TARGETID_LIST *ci; |
3291 | dma_addr_t ci_h = 0; | 3319 | dma_addr_t ci_h = 0; |
3320 | u32 tgtid_count; | ||
3292 | 3321 | ||
3293 | cmd = megasas_get_cmd(instance); | 3322 | cmd = megasas_get_cmd(instance); |
3294 | 3323 | ||
@@ -3318,12 +3347,12 @@ megasas_ld_list_query(struct megasas_instance *instance, u8 query_type) | |||
3318 | dcmd->cmd = MFI_CMD_DCMD; | 3347 | dcmd->cmd = MFI_CMD_DCMD; |
3319 | dcmd->cmd_status = 0xFF; | 3348 | dcmd->cmd_status = 0xFF; |
3320 | dcmd->sge_count = 1; | 3349 | dcmd->sge_count = 1; |
3321 | dcmd->flags = MFI_FRAME_DIR_READ; | 3350 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
3322 | dcmd->timeout = 0; | 3351 | dcmd->timeout = 0; |
3323 | dcmd->data_xfer_len = sizeof(struct MR_LD_TARGETID_LIST); | 3352 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST)); |
3324 | dcmd->opcode = MR_DCMD_LD_LIST_QUERY; | 3353 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY); |
3325 | dcmd->sgl.sge32[0].phys_addr = ci_h; | 3354 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); |
3326 | dcmd->sgl.sge32[0].length = sizeof(struct MR_LD_TARGETID_LIST); | 3355 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST)); |
3327 | dcmd->pad_0 = 0; | 3356 | dcmd->pad_0 = 0; |
3328 | 3357 | ||
3329 | if (!megasas_issue_polled(instance, cmd) && !dcmd->cmd_status) { | 3358 | if (!megasas_issue_polled(instance, cmd) && !dcmd->cmd_status) { |
@@ -3333,9 +3362,11 @@ megasas_ld_list_query(struct megasas_instance *instance, u8 query_type) | |||
3333 | ret = 1; | 3362 | ret = 1; |
3334 | } | 3363 | } |
3335 | 3364 | ||
3336 | if ((ret == 0) && (ci->count <= (MAX_LOGICAL_DRIVES))) { | 3365 | tgtid_count = le32_to_cpu(ci->count); |
3366 | |||
3367 | if ((ret == 0) && (tgtid_count <= (MAX_LOGICAL_DRIVES))) { | ||
3337 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); | 3368 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); |
3338 | for (ld_index = 0; ld_index < ci->count; ld_index++) { | 3369 | for (ld_index = 0; ld_index < tgtid_count; ld_index++) { |
3339 | ids = ci->targetId[ld_index]; | 3370 | ids = ci->targetId[ld_index]; |
3340 | instance->ld_ids[ids] = ci->targetId[ld_index]; | 3371 | instance->ld_ids[ids] = ci->targetId[ld_index]; |
3341 | } | 3372 | } |
@@ -3393,13 +3424,13 @@ megasas_get_ctrl_info(struct megasas_instance *instance, | |||
3393 | dcmd->cmd = MFI_CMD_DCMD; | 3424 | dcmd->cmd = MFI_CMD_DCMD; |
3394 | dcmd->cmd_status = 0xFF; | 3425 | dcmd->cmd_status = 0xFF; |
3395 | dcmd->sge_count = 1; | 3426 | dcmd->sge_count = 1; |
3396 | dcmd->flags = MFI_FRAME_DIR_READ; | 3427 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
3397 | dcmd->timeout = 0; | 3428 | dcmd->timeout = 0; |
3398 | dcmd->pad_0 = 0; | 3429 | dcmd->pad_0 = 0; |
3399 | dcmd->data_xfer_len = sizeof(struct megasas_ctrl_info); | 3430 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info)); |
3400 | dcmd->opcode = MR_DCMD_CTRL_GET_INFO; | 3431 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO); |
3401 | dcmd->sgl.sge32[0].phys_addr = ci_h; | 3432 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); |
3402 | dcmd->sgl.sge32[0].length = sizeof(struct megasas_ctrl_info); | 3433 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info)); |
3403 | 3434 | ||
3404 | if (!megasas_issue_polled(instance, cmd)) { | 3435 | if (!megasas_issue_polled(instance, cmd)) { |
3405 | ret = 0; | 3436 | ret = 0; |
@@ -3455,17 +3486,20 @@ megasas_issue_init_mfi(struct megasas_instance *instance) | |||
3455 | memset(initq_info, 0, sizeof(struct megasas_init_queue_info)); | 3486 | memset(initq_info, 0, sizeof(struct megasas_init_queue_info)); |
3456 | init_frame->context = context; | 3487 | init_frame->context = context; |
3457 | 3488 | ||
3458 | initq_info->reply_queue_entries = instance->max_fw_cmds + 1; | 3489 | initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1); |
3459 | initq_info->reply_queue_start_phys_addr_lo = instance->reply_queue_h; | 3490 | initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h); |
3460 | 3491 | ||
3461 | initq_info->producer_index_phys_addr_lo = instance->producer_h; | 3492 | initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h); |
3462 | initq_info->consumer_index_phys_addr_lo = instance->consumer_h; | 3493 | initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h); |
3463 | 3494 | ||
3464 | init_frame->cmd = MFI_CMD_INIT; | 3495 | init_frame->cmd = MFI_CMD_INIT; |
3465 | init_frame->cmd_status = 0xFF; | 3496 | init_frame->cmd_status = 0xFF; |
3466 | init_frame->queue_info_new_phys_addr_lo = initq_info_h; | 3497 | init_frame->queue_info_new_phys_addr_lo = |
3498 | cpu_to_le32(lower_32_bits(initq_info_h)); | ||
3499 | init_frame->queue_info_new_phys_addr_hi = | ||
3500 | cpu_to_le32(upper_32_bits(initq_info_h)); | ||
3467 | 3501 | ||
3468 | init_frame->data_xfer_len = sizeof(struct megasas_init_queue_info); | 3502 | init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info)); |
3469 | 3503 | ||
3470 | /* | 3504 | /* |
3471 | * disable the intr before firing the init frame to FW | 3505 | * disable the intr before firing the init frame to FW |
@@ -3747,8 +3781,8 @@ static int megasas_init_fw(struct megasas_instance *instance) | |||
3747 | if (ctrl_info && !megasas_get_ctrl_info(instance, ctrl_info)) { | 3781 | if (ctrl_info && !megasas_get_ctrl_info(instance, ctrl_info)) { |
3748 | 3782 | ||
3749 | max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) * | 3783 | max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) * |
3750 | ctrl_info->max_strips_per_io; | 3784 | le16_to_cpu(ctrl_info->max_strips_per_io); |
3751 | max_sectors_2 = ctrl_info->max_request_size; | 3785 | max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size); |
3752 | 3786 | ||
3753 | tmp_sectors = min_t(u32, max_sectors_1 , max_sectors_2); | 3787 | tmp_sectors = min_t(u32, max_sectors_1 , max_sectors_2); |
3754 | 3788 | ||
@@ -3757,14 +3791,18 @@ static int megasas_init_fw(struct megasas_instance *instance) | |||
3757 | instance->is_imr = 0; | 3791 | instance->is_imr = 0; |
3758 | dev_info(&instance->pdev->dev, "Controller type: MR," | 3792 | dev_info(&instance->pdev->dev, "Controller type: MR," |
3759 | "Memory size is: %dMB\n", | 3793 | "Memory size is: %dMB\n", |
3760 | ctrl_info->memory_size); | 3794 | le16_to_cpu(ctrl_info->memory_size)); |
3761 | } else { | 3795 | } else { |
3762 | instance->is_imr = 1; | 3796 | instance->is_imr = 1; |
3763 | dev_info(&instance->pdev->dev, | 3797 | dev_info(&instance->pdev->dev, |
3764 | "Controller type: iMR\n"); | 3798 | "Controller type: iMR\n"); |
3765 | } | 3799 | } |
3800 | /* OnOffProperties are converted into CPU arch*/ | ||
3801 | le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties); | ||
3766 | instance->disableOnlineCtrlReset = | 3802 | instance->disableOnlineCtrlReset = |
3767 | ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset; | 3803 | ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset; |
3804 | /* adapterOperations2 are converted into CPU arch*/ | ||
3805 | le32_to_cpus((u32 *)&ctrl_info->adapterOperations2); | ||
3768 | instance->UnevenSpanSupport = | 3806 | instance->UnevenSpanSupport = |
3769 | ctrl_info->adapterOperations2.supportUnevenSpans; | 3807 | ctrl_info->adapterOperations2.supportUnevenSpans; |
3770 | if (instance->UnevenSpanSupport) { | 3808 | if (instance->UnevenSpanSupport) { |
@@ -3778,7 +3816,6 @@ static int megasas_init_fw(struct megasas_instance *instance) | |||
3778 | 3816 | ||
3779 | } | 3817 | } |
3780 | } | 3818 | } |
3781 | |||
3782 | instance->max_sectors_per_req = instance->max_num_sge * | 3819 | instance->max_sectors_per_req = instance->max_num_sge * |
3783 | PAGE_SIZE / 512; | 3820 | PAGE_SIZE / 512; |
3784 | if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors)) | 3821 | if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors)) |
@@ -3884,20 +3921,24 @@ megasas_get_seq_num(struct megasas_instance *instance, | |||
3884 | dcmd->cmd = MFI_CMD_DCMD; | 3921 | dcmd->cmd = MFI_CMD_DCMD; |
3885 | dcmd->cmd_status = 0x0; | 3922 | dcmd->cmd_status = 0x0; |
3886 | dcmd->sge_count = 1; | 3923 | dcmd->sge_count = 1; |
3887 | dcmd->flags = MFI_FRAME_DIR_READ; | 3924 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
3888 | dcmd->timeout = 0; | 3925 | dcmd->timeout = 0; |
3889 | dcmd->pad_0 = 0; | 3926 | dcmd->pad_0 = 0; |
3890 | dcmd->data_xfer_len = sizeof(struct megasas_evt_log_info); | 3927 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info)); |
3891 | dcmd->opcode = MR_DCMD_CTRL_EVENT_GET_INFO; | 3928 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO); |
3892 | dcmd->sgl.sge32[0].phys_addr = el_info_h; | 3929 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h); |
3893 | dcmd->sgl.sge32[0].length = sizeof(struct megasas_evt_log_info); | 3930 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info)); |
3894 | 3931 | ||
3895 | megasas_issue_blocked_cmd(instance, cmd); | 3932 | megasas_issue_blocked_cmd(instance, cmd); |
3896 | 3933 | ||
3897 | /* | 3934 | /* |
3898 | * Copy the data back into callers buffer | 3935 | * Copy the data back into callers buffer |
3899 | */ | 3936 | */ |
3900 | memcpy(eli, el_info, sizeof(struct megasas_evt_log_info)); | 3937 | eli->newest_seq_num = le32_to_cpu(el_info->newest_seq_num); |
3938 | eli->oldest_seq_num = le32_to_cpu(el_info->oldest_seq_num); | ||
3939 | eli->clear_seq_num = le32_to_cpu(el_info->clear_seq_num); | ||
3940 | eli->shutdown_seq_num = le32_to_cpu(el_info->shutdown_seq_num); | ||
3941 | eli->boot_seq_num = le32_to_cpu(el_info->boot_seq_num); | ||
3901 | 3942 | ||
3902 | pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info), | 3943 | pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info), |
3903 | el_info, el_info_h); | 3944 | el_info, el_info_h); |
@@ -3944,6 +3985,7 @@ megasas_register_aen(struct megasas_instance *instance, u32 seq_num, | |||
3944 | if (instance->aen_cmd) { | 3985 | if (instance->aen_cmd) { |
3945 | 3986 | ||
3946 | prev_aen.word = instance->aen_cmd->frame->dcmd.mbox.w[1]; | 3987 | prev_aen.word = instance->aen_cmd->frame->dcmd.mbox.w[1]; |
3988 | prev_aen.members.locale = le16_to_cpu(prev_aen.members.locale); | ||
3947 | 3989 | ||
3948 | /* | 3990 | /* |
3949 | * A class whose enum value is smaller is inclusive of all | 3991 | * A class whose enum value is smaller is inclusive of all |
@@ -3956,7 +3998,7 @@ megasas_register_aen(struct megasas_instance *instance, u32 seq_num, | |||
3956 | * values | 3998 | * values |
3957 | */ | 3999 | */ |
3958 | if ((prev_aen.members.class <= curr_aen.members.class) && | 4000 | if ((prev_aen.members.class <= curr_aen.members.class) && |
3959 | !((prev_aen.members.locale & curr_aen.members.locale) ^ | 4001 | !((le16_to_cpu(prev_aen.members.locale) & curr_aen.members.locale) ^ |
3960 | curr_aen.members.locale)) { | 4002 | curr_aen.members.locale)) { |
3961 | /* | 4003 | /* |
3962 | * Previously issued event registration includes | 4004 | * Previously issued event registration includes |
@@ -3964,7 +4006,7 @@ megasas_register_aen(struct megasas_instance *instance, u32 seq_num, | |||
3964 | */ | 4006 | */ |
3965 | return 0; | 4007 | return 0; |
3966 | } else { | 4008 | } else { |
3967 | curr_aen.members.locale |= prev_aen.members.locale; | 4009 | curr_aen.members.locale |= le16_to_cpu(prev_aen.members.locale); |
3968 | 4010 | ||
3969 | if (prev_aen.members.class < curr_aen.members.class) | 4011 | if (prev_aen.members.class < curr_aen.members.class) |
3970 | curr_aen.members.class = prev_aen.members.class; | 4012 | curr_aen.members.class = prev_aen.members.class; |
@@ -3999,16 +4041,16 @@ megasas_register_aen(struct megasas_instance *instance, u32 seq_num, | |||
3999 | dcmd->cmd = MFI_CMD_DCMD; | 4041 | dcmd->cmd = MFI_CMD_DCMD; |
4000 | dcmd->cmd_status = 0x0; | 4042 | dcmd->cmd_status = 0x0; |
4001 | dcmd->sge_count = 1; | 4043 | dcmd->sge_count = 1; |
4002 | dcmd->flags = MFI_FRAME_DIR_READ; | 4044 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
4003 | dcmd->timeout = 0; | 4045 | dcmd->timeout = 0; |
4004 | dcmd->pad_0 = 0; | 4046 | dcmd->pad_0 = 0; |
4047 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail)); | ||
4048 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT); | ||
4049 | dcmd->mbox.w[0] = cpu_to_le32(seq_num); | ||
4005 | instance->last_seq_num = seq_num; | 4050 | instance->last_seq_num = seq_num; |
4006 | dcmd->data_xfer_len = sizeof(struct megasas_evt_detail); | 4051 | dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word); |
4007 | dcmd->opcode = MR_DCMD_CTRL_EVENT_WAIT; | 4052 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h); |
4008 | dcmd->mbox.w[0] = seq_num; | 4053 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail)); |
4009 | dcmd->mbox.w[1] = curr_aen.word; | ||
4010 | dcmd->sgl.sge32[0].phys_addr = (u32) instance->evt_detail_h; | ||
4011 | dcmd->sgl.sge32[0].length = sizeof(struct megasas_evt_detail); | ||
4012 | 4054 | ||
4013 | if (instance->aen_cmd != NULL) { | 4055 | if (instance->aen_cmd != NULL) { |
4014 | megasas_return_cmd(instance, cmd); | 4056 | megasas_return_cmd(instance, cmd); |
@@ -4054,8 +4096,9 @@ static int megasas_start_aen(struct megasas_instance *instance) | |||
4054 | class_locale.members.locale = MR_EVT_LOCALE_ALL; | 4096 | class_locale.members.locale = MR_EVT_LOCALE_ALL; |
4055 | class_locale.members.class = MR_EVT_CLASS_DEBUG; | 4097 | class_locale.members.class = MR_EVT_CLASS_DEBUG; |
4056 | 4098 | ||
4057 | return megasas_register_aen(instance, eli.newest_seq_num + 1, | 4099 | return megasas_register_aen(instance, |
4058 | class_locale.word); | 4100 | le32_to_cpu(eli.newest_seq_num) + 1, |
4101 | class_locale.word); | ||
4059 | } | 4102 | } |
4060 | 4103 | ||
4061 | /** | 4104 | /** |
@@ -4150,6 +4193,7 @@ megasas_set_dma_mask(struct pci_dev *pdev) | |||
4150 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) | 4193 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) |
4151 | goto fail_set_dma_mask; | 4194 | goto fail_set_dma_mask; |
4152 | } | 4195 | } |
4196 | |||
4153 | return 0; | 4197 | return 0; |
4154 | 4198 | ||
4155 | fail_set_dma_mask: | 4199 | fail_set_dma_mask: |
@@ -4468,11 +4512,11 @@ static void megasas_flush_cache(struct megasas_instance *instance) | |||
4468 | dcmd->cmd = MFI_CMD_DCMD; | 4512 | dcmd->cmd = MFI_CMD_DCMD; |
4469 | dcmd->cmd_status = 0x0; | 4513 | dcmd->cmd_status = 0x0; |
4470 | dcmd->sge_count = 0; | 4514 | dcmd->sge_count = 0; |
4471 | dcmd->flags = MFI_FRAME_DIR_NONE; | 4515 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE); |
4472 | dcmd->timeout = 0; | 4516 | dcmd->timeout = 0; |
4473 | dcmd->pad_0 = 0; | 4517 | dcmd->pad_0 = 0; |
4474 | dcmd->data_xfer_len = 0; | 4518 | dcmd->data_xfer_len = 0; |
4475 | dcmd->opcode = MR_DCMD_CTRL_CACHE_FLUSH; | 4519 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH); |
4476 | dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; | 4520 | dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; |
4477 | 4521 | ||
4478 | megasas_issue_blocked_cmd(instance, cmd); | 4522 | megasas_issue_blocked_cmd(instance, cmd); |
@@ -4513,11 +4557,11 @@ static void megasas_shutdown_controller(struct megasas_instance *instance, | |||
4513 | dcmd->cmd = MFI_CMD_DCMD; | 4557 | dcmd->cmd = MFI_CMD_DCMD; |
4514 | dcmd->cmd_status = 0x0; | 4558 | dcmd->cmd_status = 0x0; |
4515 | dcmd->sge_count = 0; | 4559 | dcmd->sge_count = 0; |
4516 | dcmd->flags = MFI_FRAME_DIR_NONE; | 4560 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE); |
4517 | dcmd->timeout = 0; | 4561 | dcmd->timeout = 0; |
4518 | dcmd->pad_0 = 0; | 4562 | dcmd->pad_0 = 0; |
4519 | dcmd->data_xfer_len = 0; | 4563 | dcmd->data_xfer_len = 0; |
4520 | dcmd->opcode = opcode; | 4564 | dcmd->opcode = cpu_to_le32(opcode); |
4521 | 4565 | ||
4522 | megasas_issue_blocked_cmd(instance, cmd); | 4566 | megasas_issue_blocked_cmd(instance, cmd); |
4523 | 4567 | ||
@@ -4932,10 +4976,11 @@ megasas_mgmt_fw_ioctl(struct megasas_instance *instance, | |||
4932 | * alone separately | 4976 | * alone separately |
4933 | */ | 4977 | */ |
4934 | memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE); | 4978 | memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE); |
4935 | cmd->frame->hdr.context = cmd->index; | 4979 | cmd->frame->hdr.context = cpu_to_le32(cmd->index); |
4936 | cmd->frame->hdr.pad_0 = 0; | 4980 | cmd->frame->hdr.pad_0 = 0; |
4937 | cmd->frame->hdr.flags &= ~(MFI_FRAME_IEEE | MFI_FRAME_SGL64 | | 4981 | cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE | |
4938 | MFI_FRAME_SENSE64); | 4982 | MFI_FRAME_SGL64 | |
4983 | MFI_FRAME_SENSE64)); | ||
4939 | 4984 | ||
4940 | /* | 4985 | /* |
4941 | * The management interface between applications and the fw uses | 4986 | * The management interface between applications and the fw uses |
@@ -4969,8 +5014,8 @@ megasas_mgmt_fw_ioctl(struct megasas_instance *instance, | |||
4969 | * We don't change the dma_coherent_mask, so | 5014 | * We don't change the dma_coherent_mask, so |
4970 | * pci_alloc_consistent only returns 32bit addresses | 5015 | * pci_alloc_consistent only returns 32bit addresses |
4971 | */ | 5016 | */ |
4972 | kern_sge32[i].phys_addr = (u32) buf_handle; | 5017 | kern_sge32[i].phys_addr = cpu_to_le32(buf_handle); |
4973 | kern_sge32[i].length = ioc->sgl[i].iov_len; | 5018 | kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len); |
4974 | 5019 | ||
4975 | /* | 5020 | /* |
4976 | * We created a kernel buffer corresponding to the | 5021 | * We created a kernel buffer corresponding to the |
@@ -4993,7 +5038,7 @@ megasas_mgmt_fw_ioctl(struct megasas_instance *instance, | |||
4993 | 5038 | ||
4994 | sense_ptr = | 5039 | sense_ptr = |
4995 | (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off); | 5040 | (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off); |
4996 | *sense_ptr = sense_handle; | 5041 | *sense_ptr = cpu_to_le32(sense_handle); |
4997 | } | 5042 | } |
4998 | 5043 | ||
4999 | /* | 5044 | /* |
@@ -5053,9 +5098,9 @@ megasas_mgmt_fw_ioctl(struct megasas_instance *instance, | |||
5053 | for (i = 0; i < ioc->sge_count; i++) { | 5098 | for (i = 0; i < ioc->sge_count; i++) { |
5054 | if (kbuff_arr[i]) | 5099 | if (kbuff_arr[i]) |
5055 | dma_free_coherent(&instance->pdev->dev, | 5100 | dma_free_coherent(&instance->pdev->dev, |
5056 | kern_sge32[i].length, | 5101 | le32_to_cpu(kern_sge32[i].length), |
5057 | kbuff_arr[i], | 5102 | kbuff_arr[i], |
5058 | kern_sge32[i].phys_addr); | 5103 | le32_to_cpu(kern_sge32[i].phys_addr)); |
5059 | } | 5104 | } |
5060 | 5105 | ||
5061 | megasas_return_cmd(instance, cmd); | 5106 | megasas_return_cmd(instance, cmd); |
@@ -5409,7 +5454,7 @@ megasas_aen_polling(struct work_struct *work) | |||
5409 | host = instance->host; | 5454 | host = instance->host; |
5410 | if (instance->evt_detail) { | 5455 | if (instance->evt_detail) { |
5411 | 5456 | ||
5412 | switch (instance->evt_detail->code) { | 5457 | switch (le32_to_cpu(instance->evt_detail->code)) { |
5413 | case MR_EVT_PD_INSERTED: | 5458 | case MR_EVT_PD_INSERTED: |
5414 | if (megasas_get_pd_list(instance) == 0) { | 5459 | if (megasas_get_pd_list(instance) == 0) { |
5415 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { | 5460 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { |
@@ -5602,7 +5647,7 @@ megasas_aen_polling(struct work_struct *work) | |||
5602 | return ; | 5647 | return ; |
5603 | } | 5648 | } |
5604 | 5649 | ||
5605 | seq_num = instance->evt_detail->seq_num + 1; | 5650 | seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1; |
5606 | 5651 | ||
5607 | /* Register AEN with FW for latest sequence number plus 1 */ | 5652 | /* Register AEN with FW for latest sequence number plus 1 */ |
5608 | class_locale.members.reserved = 0; | 5653 | class_locale.members.reserved = 0; |
diff --git a/drivers/scsi/megaraid/megaraid_sas_fp.c b/drivers/scsi/megaraid/megaraid_sas_fp.c index 75e811810d0b..e24b6eb645b5 100644 --- a/drivers/scsi/megaraid/megaraid_sas_fp.c +++ b/drivers/scsi/megaraid/megaraid_sas_fp.c | |||
@@ -128,12 +128,12 @@ static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_FW_RAID_MAP_ALL *map) | |||
128 | 128 | ||
129 | u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_FW_RAID_MAP_ALL *map) | 129 | u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_FW_RAID_MAP_ALL *map) |
130 | { | 130 | { |
131 | return map->raidMap.arMapInfo[ar].pd[arm]; | 131 | return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]); |
132 | } | 132 | } |
133 | 133 | ||
134 | u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_FW_RAID_MAP_ALL *map) | 134 | u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_FW_RAID_MAP_ALL *map) |
135 | { | 135 | { |
136 | return map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef; | 136 | return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef); |
137 | } | 137 | } |
138 | 138 | ||
139 | u16 MR_PdDevHandleGet(u32 pd, struct MR_FW_RAID_MAP_ALL *map) | 139 | u16 MR_PdDevHandleGet(u32 pd, struct MR_FW_RAID_MAP_ALL *map) |
@@ -148,7 +148,7 @@ u16 MR_GetLDTgtId(u32 ld, struct MR_FW_RAID_MAP_ALL *map) | |||
148 | 148 | ||
149 | u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_FW_RAID_MAP_ALL *map) | 149 | u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_FW_RAID_MAP_ALL *map) |
150 | { | 150 | { |
151 | return map->raidMap.ldTgtIdToLd[ldTgtId]; | 151 | return le16_to_cpu(map->raidMap.ldTgtIdToLd[ldTgtId]); |
152 | } | 152 | } |
153 | 153 | ||
154 | static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span, | 154 | static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span, |
@@ -167,18 +167,22 @@ u8 MR_ValidateMapInfo(struct megasas_instance *instance) | |||
167 | struct LD_LOAD_BALANCE_INFO *lbInfo = fusion->load_balance_info; | 167 | struct LD_LOAD_BALANCE_INFO *lbInfo = fusion->load_balance_info; |
168 | PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span; | 168 | PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span; |
169 | struct MR_FW_RAID_MAP *pFwRaidMap = &map->raidMap; | 169 | struct MR_FW_RAID_MAP *pFwRaidMap = &map->raidMap; |
170 | struct MR_LD_RAID *raid; | ||
171 | int ldCount, num_lds; | ||
172 | u16 ld; | ||
173 | |||
170 | 174 | ||
171 | if (pFwRaidMap->totalSize != | 175 | if (le32_to_cpu(pFwRaidMap->totalSize) != |
172 | (sizeof(struct MR_FW_RAID_MAP) -sizeof(struct MR_LD_SPAN_MAP) + | 176 | (sizeof(struct MR_FW_RAID_MAP) -sizeof(struct MR_LD_SPAN_MAP) + |
173 | (sizeof(struct MR_LD_SPAN_MAP) *pFwRaidMap->ldCount))) { | 177 | (sizeof(struct MR_LD_SPAN_MAP) * le32_to_cpu(pFwRaidMap->ldCount)))) { |
174 | printk(KERN_ERR "megasas: map info structure size 0x%x is not matching with ld count\n", | 178 | printk(KERN_ERR "megasas: map info structure size 0x%x is not matching with ld count\n", |
175 | (unsigned int)((sizeof(struct MR_FW_RAID_MAP) - | 179 | (unsigned int)((sizeof(struct MR_FW_RAID_MAP) - |
176 | sizeof(struct MR_LD_SPAN_MAP)) + | 180 | sizeof(struct MR_LD_SPAN_MAP)) + |
177 | (sizeof(struct MR_LD_SPAN_MAP) * | 181 | (sizeof(struct MR_LD_SPAN_MAP) * |
178 | pFwRaidMap->ldCount))); | 182 | le32_to_cpu(pFwRaidMap->ldCount)))); |
179 | printk(KERN_ERR "megasas: span map %x, pFwRaidMap->totalSize " | 183 | printk(KERN_ERR "megasas: span map %x, pFwRaidMap->totalSize " |
180 | ": %x\n", (unsigned int)sizeof(struct MR_LD_SPAN_MAP), | 184 | ": %x\n", (unsigned int)sizeof(struct MR_LD_SPAN_MAP), |
181 | pFwRaidMap->totalSize); | 185 | le32_to_cpu(pFwRaidMap->totalSize)); |
182 | return 0; | 186 | return 0; |
183 | } | 187 | } |
184 | 188 | ||
@@ -187,6 +191,15 @@ u8 MR_ValidateMapInfo(struct megasas_instance *instance) | |||
187 | 191 | ||
188 | mr_update_load_balance_params(map, lbInfo); | 192 | mr_update_load_balance_params(map, lbInfo); |
189 | 193 | ||
194 | num_lds = le32_to_cpu(map->raidMap.ldCount); | ||
195 | |||
196 | /*Convert Raid capability values to CPU arch */ | ||
197 | for (ldCount = 0; ldCount < num_lds; ldCount++) { | ||
198 | ld = MR_TargetIdToLdGet(ldCount, map); | ||
199 | raid = MR_LdRaidGet(ld, map); | ||
200 | le32_to_cpus((u32 *)&raid->capability); | ||
201 | } | ||
202 | |||
190 | return 1; | 203 | return 1; |
191 | } | 204 | } |
192 | 205 | ||
@@ -200,23 +213,20 @@ u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk, | |||
200 | 213 | ||
201 | for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) { | 214 | for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) { |
202 | 215 | ||
203 | for (j = 0; j < pSpanBlock->block_span_info.noElements; j++) { | 216 | for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) { |
204 | quad = &pSpanBlock->block_span_info.quad[j]; | 217 | quad = &pSpanBlock->block_span_info.quad[j]; |
205 | 218 | ||
206 | if (quad->diff == 0) | 219 | if (le32_to_cpu(quad->diff) == 0) |
207 | return SPAN_INVALID; | 220 | return SPAN_INVALID; |
208 | if (quad->logStart <= row && row <= quad->logEnd && | 221 | if (le64_to_cpu(quad->logStart) <= row && row <= |
209 | (mega_mod64(row-quad->logStart, quad->diff)) == 0) { | 222 | le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart), |
223 | le32_to_cpu(quad->diff))) == 0) { | ||
210 | if (span_blk != NULL) { | 224 | if (span_blk != NULL) { |
211 | u64 blk, debugBlk; | 225 | u64 blk, debugBlk; |
212 | blk = | 226 | blk = mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff)); |
213 | mega_div64_32( | ||
214 | (row-quad->logStart), | ||
215 | quad->diff); | ||
216 | debugBlk = blk; | 227 | debugBlk = blk; |
217 | 228 | ||
218 | blk = (blk + quad->offsetInSpan) << | 229 | blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift; |
219 | raid->stripeShift; | ||
220 | *span_blk = blk; | 230 | *span_blk = blk; |
221 | } | 231 | } |
222 | return span; | 232 | return span; |
@@ -257,8 +267,8 @@ static int getSpanInfo(struct MR_FW_RAID_MAP_ALL *map, PLD_SPAN_INFO ldSpanInfo) | |||
257 | for (span = 0; span < raid->spanDepth; span++) | 267 | for (span = 0; span < raid->spanDepth; span++) |
258 | dev_dbg(&instance->pdev->dev, "Span=%x," | 268 | dev_dbg(&instance->pdev->dev, "Span=%x," |
259 | " number of quads=%x\n", span, | 269 | " number of quads=%x\n", span, |
260 | map->raidMap.ldSpanMap[ld].spanBlock[span]. | 270 | le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. |
261 | block_span_info.noElements); | 271 | block_span_info.noElements)); |
262 | for (element = 0; element < MAX_QUAD_DEPTH; element++) { | 272 | for (element = 0; element < MAX_QUAD_DEPTH; element++) { |
263 | span_set = &(ldSpanInfo[ld].span_set[element]); | 273 | span_set = &(ldSpanInfo[ld].span_set[element]); |
264 | if (span_set->span_row_data_width == 0) | 274 | if (span_set->span_row_data_width == 0) |
@@ -286,22 +296,22 @@ static int getSpanInfo(struct MR_FW_RAID_MAP_ALL *map, PLD_SPAN_INFO ldSpanInfo) | |||
286 | (long unsigned int)span_set->data_strip_end); | 296 | (long unsigned int)span_set->data_strip_end); |
287 | 297 | ||
288 | for (span = 0; span < raid->spanDepth; span++) { | 298 | for (span = 0; span < raid->spanDepth; span++) { |
289 | if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | 299 | if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. |
290 | block_span_info.noElements >= | 300 | block_span_info.noElements) >= |
291 | element + 1) { | 301 | element + 1) { |
292 | quad = &map->raidMap.ldSpanMap[ld]. | 302 | quad = &map->raidMap.ldSpanMap[ld]. |
293 | spanBlock[span].block_span_info. | 303 | spanBlock[span].block_span_info. |
294 | quad[element]; | 304 | quad[element]; |
295 | dev_dbg(&instance->pdev->dev, "Span=%x," | 305 | dev_dbg(&instance->pdev->dev, "Span=%x," |
296 | "Quad=%x, diff=%x\n", span, | 306 | "Quad=%x, diff=%x\n", span, |
297 | element, quad->diff); | 307 | element, le32_to_cpu(quad->diff)); |
298 | dev_dbg(&instance->pdev->dev, | 308 | dev_dbg(&instance->pdev->dev, |
299 | "offset_in_span=0x%08lx\n", | 309 | "offset_in_span=0x%08lx\n", |
300 | (long unsigned int)quad->offsetInSpan); | 310 | (long unsigned int)le64_to_cpu(quad->offsetInSpan)); |
301 | dev_dbg(&instance->pdev->dev, | 311 | dev_dbg(&instance->pdev->dev, |
302 | "logical start=0x%08lx, end=0x%08lx\n", | 312 | "logical start=0x%08lx, end=0x%08lx\n", |
303 | (long unsigned int)quad->logStart, | 313 | (long unsigned int)le64_to_cpu(quad->logStart), |
304 | (long unsigned int)quad->logEnd); | 314 | (long unsigned int)le64_to_cpu(quad->logEnd)); |
305 | } | 315 | } |
306 | } | 316 | } |
307 | } | 317 | } |
@@ -348,23 +358,23 @@ u32 mr_spanset_get_span_block(struct megasas_instance *instance, | |||
348 | continue; | 358 | continue; |
349 | 359 | ||
350 | for (span = 0; span < raid->spanDepth; span++) | 360 | for (span = 0; span < raid->spanDepth; span++) |
351 | if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | 361 | if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. |
352 | block_span_info.noElements >= info+1) { | 362 | block_span_info.noElements) >= info+1) { |
353 | quad = &map->raidMap.ldSpanMap[ld]. | 363 | quad = &map->raidMap.ldSpanMap[ld]. |
354 | spanBlock[span]. | 364 | spanBlock[span]. |
355 | block_span_info.quad[info]; | 365 | block_span_info.quad[info]; |
356 | if (quad->diff == 0) | 366 | if (le32_to_cpu(quad->diff == 0)) |
357 | return SPAN_INVALID; | 367 | return SPAN_INVALID; |
358 | if (quad->logStart <= row && | 368 | if (le64_to_cpu(quad->logStart) <= row && |
359 | row <= quad->logEnd && | 369 | row <= le64_to_cpu(quad->logEnd) && |
360 | (mega_mod64(row - quad->logStart, | 370 | (mega_mod64(row - le64_to_cpu(quad->logStart), |
361 | quad->diff)) == 0) { | 371 | le32_to_cpu(quad->diff))) == 0) { |
362 | if (span_blk != NULL) { | 372 | if (span_blk != NULL) { |
363 | u64 blk; | 373 | u64 blk; |
364 | blk = mega_div64_32 | 374 | blk = mega_div64_32 |
365 | ((row - quad->logStart), | 375 | ((row - le64_to_cpu(quad->logStart)), |
366 | quad->diff); | 376 | le32_to_cpu(quad->diff)); |
367 | blk = (blk + quad->offsetInSpan) | 377 | blk = (blk + le64_to_cpu(quad->offsetInSpan)) |
368 | << raid->stripeShift; | 378 | << raid->stripeShift; |
369 | *span_blk = blk; | 379 | *span_blk = blk; |
370 | } | 380 | } |
@@ -415,8 +425,8 @@ static u64 get_row_from_strip(struct megasas_instance *instance, | |||
415 | span_set_Row = mega_div64_32(span_set_Strip, | 425 | span_set_Row = mega_div64_32(span_set_Strip, |
416 | span_set->span_row_data_width) * span_set->diff; | 426 | span_set->span_row_data_width) * span_set->diff; |
417 | for (span = 0, span_offset = 0; span < raid->spanDepth; span++) | 427 | for (span = 0, span_offset = 0; span < raid->spanDepth; span++) |
418 | if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | 428 | if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. |
419 | block_span_info.noElements >= info+1) { | 429 | block_span_info.noElements >= info+1)) { |
420 | if (strip_offset >= | 430 | if (strip_offset >= |
421 | span_set->strip_offset[span]) | 431 | span_set->strip_offset[span]) |
422 | span_offset++; | 432 | span_offset++; |
@@ -480,18 +490,18 @@ static u64 get_strip_from_row(struct megasas_instance *instance, | |||
480 | continue; | 490 | continue; |
481 | 491 | ||
482 | for (span = 0; span < raid->spanDepth; span++) | 492 | for (span = 0; span < raid->spanDepth; span++) |
483 | if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | 493 | if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. |
484 | block_span_info.noElements >= info+1) { | 494 | block_span_info.noElements) >= info+1) { |
485 | quad = &map->raidMap.ldSpanMap[ld]. | 495 | quad = &map->raidMap.ldSpanMap[ld]. |
486 | spanBlock[span].block_span_info.quad[info]; | 496 | spanBlock[span].block_span_info.quad[info]; |
487 | if (quad->logStart <= row && | 497 | if (le64_to_cpu(quad->logStart) <= row && |
488 | row <= quad->logEnd && | 498 | row <= le64_to_cpu(quad->logEnd) && |
489 | mega_mod64((row - quad->logStart), | 499 | mega_mod64((row - le64_to_cpu(quad->logStart)), |
490 | quad->diff) == 0) { | 500 | le32_to_cpu(quad->diff)) == 0) { |
491 | strip = mega_div64_32 | 501 | strip = mega_div64_32 |
492 | (((row - span_set->data_row_start) | 502 | (((row - span_set->data_row_start) |
493 | - quad->logStart), | 503 | - le64_to_cpu(quad->logStart)), |
494 | quad->diff); | 504 | le32_to_cpu(quad->diff)); |
495 | strip *= span_set->span_row_data_width; | 505 | strip *= span_set->span_row_data_width; |
496 | strip += span_set->data_strip_start; | 506 | strip += span_set->data_strip_start; |
497 | strip += span_set->strip_offset[span]; | 507 | strip += span_set->strip_offset[span]; |
@@ -543,8 +553,8 @@ static u32 get_arm_from_strip(struct megasas_instance *instance, | |||
543 | span_set->span_row_data_width); | 553 | span_set->span_row_data_width); |
544 | 554 | ||
545 | for (span = 0, span_offset = 0; span < raid->spanDepth; span++) | 555 | for (span = 0, span_offset = 0; span < raid->spanDepth; span++) |
546 | if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | 556 | if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. |
547 | block_span_info.noElements >= info+1) { | 557 | block_span_info.noElements) >= info+1) { |
548 | if (strip_offset >= | 558 | if (strip_offset >= |
549 | span_set->strip_offset[span]) | 559 | span_set->strip_offset[span]) |
550 | span_offset = | 560 | span_offset = |
@@ -669,7 +679,7 @@ static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld, | |||
669 | } | 679 | } |
670 | } | 680 | } |
671 | 681 | ||
672 | *pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk; | 682 | *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk); |
673 | pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | | 683 | pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | |
674 | physArm; | 684 | physArm; |
675 | return retval; | 685 | return retval; |
@@ -765,7 +775,7 @@ u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow, | |||
765 | } | 775 | } |
766 | } | 776 | } |
767 | 777 | ||
768 | *pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk; | 778 | *pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk); |
769 | pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | | 779 | pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) | |
770 | physArm; | 780 | physArm; |
771 | return retval; | 781 | return retval; |
@@ -965,7 +975,7 @@ MR_BuildRaidContext(struct megasas_instance *instance, | |||
965 | regSize += stripSize; | 975 | regSize += stripSize; |
966 | } | 976 | } |
967 | 977 | ||
968 | pRAID_Context->timeoutValue = map->raidMap.fpPdIoTimeoutSec; | 978 | pRAID_Context->timeoutValue = cpu_to_le16(map->raidMap.fpPdIoTimeoutSec); |
969 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || | 979 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
970 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) | 980 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) |
971 | pRAID_Context->regLockFlags = (isRead) ? | 981 | pRAID_Context->regLockFlags = (isRead) ? |
@@ -974,8 +984,8 @@ MR_BuildRaidContext(struct megasas_instance *instance, | |||
974 | pRAID_Context->regLockFlags = (isRead) ? | 984 | pRAID_Context->regLockFlags = (isRead) ? |
975 | REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite; | 985 | REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite; |
976 | pRAID_Context->VirtualDiskTgtId = raid->targetId; | 986 | pRAID_Context->VirtualDiskTgtId = raid->targetId; |
977 | pRAID_Context->regLockRowLBA = regStart; | 987 | pRAID_Context->regLockRowLBA = cpu_to_le64(regStart); |
978 | pRAID_Context->regLockLength = regSize; | 988 | pRAID_Context->regLockLength = cpu_to_le32(regSize); |
979 | pRAID_Context->configSeqNum = raid->seqNum; | 989 | pRAID_Context->configSeqNum = raid->seqNum; |
980 | /* save pointer to raid->LUN array */ | 990 | /* save pointer to raid->LUN array */ |
981 | *raidLUN = raid->LUN; | 991 | *raidLUN = raid->LUN; |
@@ -1050,8 +1060,8 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map, | |||
1050 | raid = MR_LdRaidGet(ld, map); | 1060 | raid = MR_LdRaidGet(ld, map); |
1051 | for (element = 0; element < MAX_QUAD_DEPTH; element++) { | 1061 | for (element = 0; element < MAX_QUAD_DEPTH; element++) { |
1052 | for (span = 0; span < raid->spanDepth; span++) { | 1062 | for (span = 0; span < raid->spanDepth; span++) { |
1053 | if (map->raidMap.ldSpanMap[ld].spanBlock[span]. | 1063 | if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span]. |
1054 | block_span_info.noElements < | 1064 | block_span_info.noElements) < |
1055 | element + 1) | 1065 | element + 1) |
1056 | continue; | 1066 | continue; |
1057 | span_set = &(ldSpanInfo[ld].span_set[element]); | 1067 | span_set = &(ldSpanInfo[ld].span_set[element]); |
@@ -1059,14 +1069,14 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map, | |||
1059 | spanBlock[span].block_span_info. | 1069 | spanBlock[span].block_span_info. |
1060 | quad[element]; | 1070 | quad[element]; |
1061 | 1071 | ||
1062 | span_set->diff = quad->diff; | 1072 | span_set->diff = le32_to_cpu(quad->diff); |
1063 | 1073 | ||
1064 | for (count = 0, span_row_width = 0; | 1074 | for (count = 0, span_row_width = 0; |
1065 | count < raid->spanDepth; count++) { | 1075 | count < raid->spanDepth; count++) { |
1066 | if (map->raidMap.ldSpanMap[ld]. | 1076 | if (le32_to_cpu(map->raidMap.ldSpanMap[ld]. |
1067 | spanBlock[count]. | 1077 | spanBlock[count]. |
1068 | block_span_info. | 1078 | block_span_info. |
1069 | noElements >= element + 1) { | 1079 | noElements) >= element + 1) { |
1070 | span_set->strip_offset[count] = | 1080 | span_set->strip_offset[count] = |
1071 | span_row_width; | 1081 | span_row_width; |
1072 | span_row_width += | 1082 | span_row_width += |
@@ -1080,9 +1090,9 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map, | |||
1080 | } | 1090 | } |
1081 | 1091 | ||
1082 | span_set->span_row_data_width = span_row_width; | 1092 | span_set->span_row_data_width = span_row_width; |
1083 | span_row = mega_div64_32(((quad->logEnd - | 1093 | span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) - |
1084 | quad->logStart) + quad->diff), | 1094 | le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)), |
1085 | quad->diff); | 1095 | le32_to_cpu(quad->diff)); |
1086 | 1096 | ||
1087 | if (element == 0) { | 1097 | if (element == 0) { |
1088 | span_set->log_start_lba = 0; | 1098 | span_set->log_start_lba = 0; |
@@ -1099,7 +1109,7 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map, | |||
1099 | 1109 | ||
1100 | span_set->data_row_start = 0; | 1110 | span_set->data_row_start = 0; |
1101 | span_set->data_row_end = | 1111 | span_set->data_row_end = |
1102 | (span_row * quad->diff) - 1; | 1112 | (span_row * le32_to_cpu(quad->diff)) - 1; |
1103 | } else { | 1113 | } else { |
1104 | span_set_prev = &(ldSpanInfo[ld]. | 1114 | span_set_prev = &(ldSpanInfo[ld]. |
1105 | span_set[element - 1]); | 1115 | span_set[element - 1]); |
@@ -1125,7 +1135,7 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map, | |||
1125 | span_set_prev->data_row_end + 1; | 1135 | span_set_prev->data_row_end + 1; |
1126 | span_set->data_row_end = | 1136 | span_set->data_row_end = |
1127 | span_set->data_row_start + | 1137 | span_set->data_row_start + |
1128 | (span_row * quad->diff) - 1; | 1138 | (span_row * le32_to_cpu(quad->diff)) - 1; |
1129 | } | 1139 | } |
1130 | break; | 1140 | break; |
1131 | } | 1141 | } |
diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.c b/drivers/scsi/megaraid/megaraid_sas_fusion.c index 10b19a87050b..f6555921fd7a 100644 --- a/drivers/scsi/megaraid/megaraid_sas_fusion.c +++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c | |||
@@ -615,23 +615,20 @@ megasas_ioc_init_fusion(struct megasas_instance *instance) | |||
615 | 615 | ||
616 | IOCInitMessage->Function = MPI2_FUNCTION_IOC_INIT; | 616 | IOCInitMessage->Function = MPI2_FUNCTION_IOC_INIT; |
617 | IOCInitMessage->WhoInit = MPI2_WHOINIT_HOST_DRIVER; | 617 | IOCInitMessage->WhoInit = MPI2_WHOINIT_HOST_DRIVER; |
618 | IOCInitMessage->MsgVersion = MPI2_VERSION; | 618 | IOCInitMessage->MsgVersion = cpu_to_le16(MPI2_VERSION); |
619 | IOCInitMessage->HeaderVersion = MPI2_HEADER_VERSION; | 619 | IOCInitMessage->HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); |
620 | IOCInitMessage->SystemRequestFrameSize = | 620 | IOCInitMessage->SystemRequestFrameSize = cpu_to_le16(MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE / 4); |
621 | MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE / 4; | 621 | |
622 | 622 | IOCInitMessage->ReplyDescriptorPostQueueDepth = cpu_to_le16(fusion->reply_q_depth); | |
623 | IOCInitMessage->ReplyDescriptorPostQueueDepth = fusion->reply_q_depth; | 623 | IOCInitMessage->ReplyDescriptorPostQueueAddress = cpu_to_le64(fusion->reply_frames_desc_phys); |
624 | IOCInitMessage->ReplyDescriptorPostQueueAddress = | 624 | IOCInitMessage->SystemRequestFrameBaseAddress = cpu_to_le64(fusion->io_request_frames_phys); |
625 | fusion->reply_frames_desc_phys; | ||
626 | IOCInitMessage->SystemRequestFrameBaseAddress = | ||
627 | fusion->io_request_frames_phys; | ||
628 | IOCInitMessage->HostMSIxVectors = instance->msix_vectors; | 625 | IOCInitMessage->HostMSIxVectors = instance->msix_vectors; |
629 | init_frame = (struct megasas_init_frame *)cmd->frame; | 626 | init_frame = (struct megasas_init_frame *)cmd->frame; |
630 | memset(init_frame, 0, MEGAMFI_FRAME_SIZE); | 627 | memset(init_frame, 0, MEGAMFI_FRAME_SIZE); |
631 | 628 | ||
632 | frame_hdr = &cmd->frame->hdr; | 629 | frame_hdr = &cmd->frame->hdr; |
633 | frame_hdr->cmd_status = 0xFF; | 630 | frame_hdr->cmd_status = 0xFF; |
634 | frame_hdr->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; | 631 | frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE); |
635 | 632 | ||
636 | init_frame->cmd = MFI_CMD_INIT; | 633 | init_frame->cmd = MFI_CMD_INIT; |
637 | init_frame->cmd_status = 0xFF; | 634 | init_frame->cmd_status = 0xFF; |
@@ -644,18 +641,21 @@ megasas_ioc_init_fusion(struct megasas_instance *instance) | |||
644 | /* driver supports HA / Remote LUN over Fast Path interface */ | 641 | /* driver supports HA / Remote LUN over Fast Path interface */ |
645 | init_frame->driver_operations.mfi_capabilities.support_fp_remote_lun | 642 | init_frame->driver_operations.mfi_capabilities.support_fp_remote_lun |
646 | = 1; | 643 | = 1; |
644 | /* Convert capability to LE32 */ | ||
645 | cpu_to_le32s((u32 *)&init_frame->driver_operations.mfi_capabilities); | ||
647 | 646 | ||
648 | 647 | init_frame->queue_info_new_phys_addr_lo = cpu_to_le32((u32)ioc_init_handle); | |
649 | init_frame->queue_info_new_phys_addr_lo = ioc_init_handle; | 648 | init_frame->data_xfer_len = cpu_to_le32(sizeof(struct MPI2_IOC_INIT_REQUEST)); |
650 | init_frame->data_xfer_len = sizeof(struct MPI2_IOC_INIT_REQUEST); | ||
651 | 649 | ||
652 | req_desc = | 650 | req_desc = |
653 | (union MEGASAS_REQUEST_DESCRIPTOR_UNION *)fusion->req_frames_desc; | 651 | (union MEGASAS_REQUEST_DESCRIPTOR_UNION *)fusion->req_frames_desc; |
654 | 652 | ||
655 | req_desc->Words = cmd->frame_phys_addr; | 653 | req_desc->Words = 0; |
656 | req_desc->MFAIo.RequestFlags = | 654 | req_desc->MFAIo.RequestFlags = |
657 | (MEGASAS_REQ_DESCRIPT_FLAGS_MFA << | 655 | (MEGASAS_REQ_DESCRIPT_FLAGS_MFA << |
658 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); | 656 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); |
657 | cpu_to_le32s((u32 *)&req_desc->MFAIo); | ||
658 | req_desc->Words |= cpu_to_le64(cmd->frame_phys_addr); | ||
659 | 659 | ||
660 | /* | 660 | /* |
661 | * disable the intr before firing the init frame | 661 | * disable the intr before firing the init frame |
@@ -746,13 +746,13 @@ megasas_get_ld_map_info(struct megasas_instance *instance) | |||
746 | dcmd->cmd = MFI_CMD_DCMD; | 746 | dcmd->cmd = MFI_CMD_DCMD; |
747 | dcmd->cmd_status = 0xFF; | 747 | dcmd->cmd_status = 0xFF; |
748 | dcmd->sge_count = 1; | 748 | dcmd->sge_count = 1; |
749 | dcmd->flags = MFI_FRAME_DIR_READ; | 749 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
750 | dcmd->timeout = 0; | 750 | dcmd->timeout = 0; |
751 | dcmd->pad_0 = 0; | 751 | dcmd->pad_0 = 0; |
752 | dcmd->data_xfer_len = size_map_info; | 752 | dcmd->data_xfer_len = cpu_to_le32(size_map_info); |
753 | dcmd->opcode = MR_DCMD_LD_MAP_GET_INFO; | 753 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_MAP_GET_INFO); |
754 | dcmd->sgl.sge32[0].phys_addr = ci_h; | 754 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); |
755 | dcmd->sgl.sge32[0].length = size_map_info; | 755 | dcmd->sgl.sge32[0].length = cpu_to_le32(size_map_info); |
756 | 756 | ||
757 | if (!megasas_issue_polled(instance, cmd)) | 757 | if (!megasas_issue_polled(instance, cmd)) |
758 | ret = 0; | 758 | ret = 0; |
@@ -821,7 +821,7 @@ megasas_sync_map_info(struct megasas_instance *instance) | |||
821 | 821 | ||
822 | map = fusion->ld_map[instance->map_id & 1]; | 822 | map = fusion->ld_map[instance->map_id & 1]; |
823 | 823 | ||
824 | num_lds = map->raidMap.ldCount; | 824 | num_lds = le32_to_cpu(map->raidMap.ldCount); |
825 | 825 | ||
826 | dcmd = &cmd->frame->dcmd; | 826 | dcmd = &cmd->frame->dcmd; |
827 | 827 | ||
@@ -849,15 +849,15 @@ megasas_sync_map_info(struct megasas_instance *instance) | |||
849 | dcmd->cmd = MFI_CMD_DCMD; | 849 | dcmd->cmd = MFI_CMD_DCMD; |
850 | dcmd->cmd_status = 0xFF; | 850 | dcmd->cmd_status = 0xFF; |
851 | dcmd->sge_count = 1; | 851 | dcmd->sge_count = 1; |
852 | dcmd->flags = MFI_FRAME_DIR_WRITE; | 852 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_WRITE); |
853 | dcmd->timeout = 0; | 853 | dcmd->timeout = 0; |
854 | dcmd->pad_0 = 0; | 854 | dcmd->pad_0 = 0; |
855 | dcmd->data_xfer_len = size_map_info; | 855 | dcmd->data_xfer_len = cpu_to_le32(size_map_info); |
856 | dcmd->mbox.b[0] = num_lds; | 856 | dcmd->mbox.b[0] = num_lds; |
857 | dcmd->mbox.b[1] = MEGASAS_DCMD_MBOX_PEND_FLAG; | 857 | dcmd->mbox.b[1] = MEGASAS_DCMD_MBOX_PEND_FLAG; |
858 | dcmd->opcode = MR_DCMD_LD_MAP_GET_INFO; | 858 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_MAP_GET_INFO); |
859 | dcmd->sgl.sge32[0].phys_addr = ci_h; | 859 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); |
860 | dcmd->sgl.sge32[0].length = size_map_info; | 860 | dcmd->sgl.sge32[0].length = cpu_to_le32(size_map_info); |
861 | 861 | ||
862 | instance->map_update_cmd = cmd; | 862 | instance->map_update_cmd = cmd; |
863 | 863 | ||
@@ -1060,9 +1060,8 @@ megasas_fire_cmd_fusion(struct megasas_instance *instance, | |||
1060 | 1060 | ||
1061 | spin_lock_irqsave(&instance->hba_lock, flags); | 1061 | spin_lock_irqsave(&instance->hba_lock, flags); |
1062 | 1062 | ||
1063 | writel(req_desc_lo, | 1063 | writel(le32_to_cpu(req_desc_lo), &(regs)->inbound_low_queue_port); |
1064 | &(regs)->inbound_low_queue_port); | 1064 | writel(le32_to_cpu(req_desc_hi), &(regs)->inbound_high_queue_port); |
1065 | writel(req_desc_hi, &(regs)->inbound_high_queue_port); | ||
1066 | spin_unlock_irqrestore(&instance->hba_lock, flags); | 1065 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
1067 | } | 1066 | } |
1068 | 1067 | ||
@@ -1150,8 +1149,8 @@ megasas_make_sgl_fusion(struct megasas_instance *instance, | |||
1150 | return sge_count; | 1149 | return sge_count; |
1151 | 1150 | ||
1152 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | 1151 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { |
1153 | sgl_ptr->Length = sg_dma_len(os_sgl); | 1152 | sgl_ptr->Length = cpu_to_le32(sg_dma_len(os_sgl)); |
1154 | sgl_ptr->Address = sg_dma_address(os_sgl); | 1153 | sgl_ptr->Address = cpu_to_le64(sg_dma_address(os_sgl)); |
1155 | sgl_ptr->Flags = 0; | 1154 | sgl_ptr->Flags = 0; |
1156 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || | 1155 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
1157 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { | 1156 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { |
@@ -1170,9 +1169,9 @@ megasas_make_sgl_fusion(struct megasas_instance *instance, | |||
1170 | PCI_DEVICE_ID_LSI_INVADER) || | 1169 | PCI_DEVICE_ID_LSI_INVADER) || |
1171 | (instance->pdev->device == | 1170 | (instance->pdev->device == |
1172 | PCI_DEVICE_ID_LSI_FURY)) { | 1171 | PCI_DEVICE_ID_LSI_FURY)) { |
1173 | if ((cmd->io_request->IoFlags & | 1172 | if ((le16_to_cpu(cmd->io_request->IoFlags) & |
1174 | MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) != | 1173 | MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) != |
1175 | MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) | 1174 | MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) |
1176 | cmd->io_request->ChainOffset = | 1175 | cmd->io_request->ChainOffset = |
1177 | fusion-> | 1176 | fusion-> |
1178 | chain_offset_io_request; | 1177 | chain_offset_io_request; |
@@ -1194,9 +1193,8 @@ megasas_make_sgl_fusion(struct megasas_instance *instance, | |||
1194 | sg_chain->Flags = | 1193 | sg_chain->Flags = |
1195 | (IEEE_SGE_FLAGS_CHAIN_ELEMENT | | 1194 | (IEEE_SGE_FLAGS_CHAIN_ELEMENT | |
1196 | MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR); | 1195 | MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR); |
1197 | sg_chain->Length = (sizeof(union MPI2_SGE_IO_UNION) | 1196 | sg_chain->Length = cpu_to_le32((sizeof(union MPI2_SGE_IO_UNION) * (sge_count - sg_processed))); |
1198 | *(sge_count - sg_processed)); | 1197 | sg_chain->Address = cpu_to_le64(cmd->sg_frame_phys_addr); |
1199 | sg_chain->Address = cmd->sg_frame_phys_addr; | ||
1200 | 1198 | ||
1201 | sgl_ptr = | 1199 | sgl_ptr = |
1202 | (struct MPI25_IEEE_SGE_CHAIN64 *)cmd->sg_frame; | 1200 | (struct MPI25_IEEE_SGE_CHAIN64 *)cmd->sg_frame; |
@@ -1254,7 +1252,7 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len, | |||
1254 | io_request->CDB.EEDP32.PrimaryReferenceTag = | 1252 | io_request->CDB.EEDP32.PrimaryReferenceTag = |
1255 | cpu_to_be32(ref_tag); | 1253 | cpu_to_be32(ref_tag); |
1256 | io_request->CDB.EEDP32.PrimaryApplicationTagMask = 0xffff; | 1254 | io_request->CDB.EEDP32.PrimaryApplicationTagMask = 0xffff; |
1257 | io_request->IoFlags = 32; /* Specify 32-byte cdb */ | 1255 | io_request->IoFlags = cpu_to_le16(32); /* Specify 32-byte cdb */ |
1258 | 1256 | ||
1259 | /* Transfer length */ | 1257 | /* Transfer length */ |
1260 | cdb[28] = (u8)((num_blocks >> 24) & 0xff); | 1258 | cdb[28] = (u8)((num_blocks >> 24) & 0xff); |
@@ -1264,19 +1262,19 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len, | |||
1264 | 1262 | ||
1265 | /* set SCSI IO EEDPFlags */ | 1263 | /* set SCSI IO EEDPFlags */ |
1266 | if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) { | 1264 | if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) { |
1267 | io_request->EEDPFlags = | 1265 | io_request->EEDPFlags = cpu_to_le16( |
1268 | MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | | 1266 | MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | |
1269 | MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG | | 1267 | MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG | |
1270 | MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP | | 1268 | MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP | |
1271 | MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG | | 1269 | MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG | |
1272 | MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD; | 1270 | MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD); |
1273 | } else { | 1271 | } else { |
1274 | io_request->EEDPFlags = | 1272 | io_request->EEDPFlags = cpu_to_le16( |
1275 | MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | | 1273 | MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG | |
1276 | MPI2_SCSIIO_EEDPFLAGS_INSERT_OP; | 1274 | MPI2_SCSIIO_EEDPFLAGS_INSERT_OP); |
1277 | } | 1275 | } |
1278 | io_request->Control |= (0x4 << 26); | 1276 | io_request->Control |= cpu_to_le32((0x4 << 26)); |
1279 | io_request->EEDPBlockSize = scp->device->sector_size; | 1277 | io_request->EEDPBlockSize = cpu_to_le32(scp->device->sector_size); |
1280 | } else { | 1278 | } else { |
1281 | /* Some drives don't support 16/12 byte CDB's, convert to 10 */ | 1279 | /* Some drives don't support 16/12 byte CDB's, convert to 10 */ |
1282 | if (((cdb_len == 12) || (cdb_len == 16)) && | 1280 | if (((cdb_len == 12) || (cdb_len == 16)) && |
@@ -1304,7 +1302,7 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len, | |||
1304 | cdb[8] = (u8)(num_blocks & 0xff); | 1302 | cdb[8] = (u8)(num_blocks & 0xff); |
1305 | cdb[7] = (u8)((num_blocks >> 8) & 0xff); | 1303 | cdb[7] = (u8)((num_blocks >> 8) & 0xff); |
1306 | 1304 | ||
1307 | io_request->IoFlags = 10; /* Specify 10-byte cdb */ | 1305 | io_request->IoFlags = cpu_to_le16(10); /* Specify 10-byte cdb */ |
1308 | cdb_len = 10; | 1306 | cdb_len = 10; |
1309 | } else if ((cdb_len < 16) && (start_blk > 0xffffffff)) { | 1307 | } else if ((cdb_len < 16) && (start_blk > 0xffffffff)) { |
1310 | /* Convert to 16 byte CDB for large LBA's */ | 1308 | /* Convert to 16 byte CDB for large LBA's */ |
@@ -1342,7 +1340,7 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len, | |||
1342 | cdb[11] = (u8)((num_blocks >> 16) & 0xff); | 1340 | cdb[11] = (u8)((num_blocks >> 16) & 0xff); |
1343 | cdb[10] = (u8)((num_blocks >> 24) & 0xff); | 1341 | cdb[10] = (u8)((num_blocks >> 24) & 0xff); |
1344 | 1342 | ||
1345 | io_request->IoFlags = 16; /* Specify 16-byte cdb */ | 1343 | io_request->IoFlags = cpu_to_le16(16); /* Specify 16-byte cdb */ |
1346 | cdb_len = 16; | 1344 | cdb_len = 16; |
1347 | } | 1345 | } |
1348 | 1346 | ||
@@ -1410,7 +1408,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance, | |||
1410 | fusion = instance->ctrl_context; | 1408 | fusion = instance->ctrl_context; |
1411 | 1409 | ||
1412 | io_request = cmd->io_request; | 1410 | io_request = cmd->io_request; |
1413 | io_request->RaidContext.VirtualDiskTgtId = device_id; | 1411 | io_request->RaidContext.VirtualDiskTgtId = cpu_to_le16(device_id); |
1414 | io_request->RaidContext.status = 0; | 1412 | io_request->RaidContext.status = 0; |
1415 | io_request->RaidContext.exStatus = 0; | 1413 | io_request->RaidContext.exStatus = 0; |
1416 | 1414 | ||
@@ -1474,7 +1472,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance, | |||
1474 | io_info.ldStartBlock = ((u64)start_lba_hi << 32) | start_lba_lo; | 1472 | io_info.ldStartBlock = ((u64)start_lba_hi << 32) | start_lba_lo; |
1475 | io_info.numBlocks = datalength; | 1473 | io_info.numBlocks = datalength; |
1476 | io_info.ldTgtId = device_id; | 1474 | io_info.ldTgtId = device_id; |
1477 | io_request->DataLength = scsi_bufflen(scp); | 1475 | io_request->DataLength = cpu_to_le32(scsi_bufflen(scp)); |
1478 | 1476 | ||
1479 | if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) | 1477 | if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) |
1480 | io_info.isRead = 1; | 1478 | io_info.isRead = 1; |
@@ -1514,8 +1512,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance, | |||
1514 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); | 1512 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); |
1515 | io_request->RaidContext.Type = MPI2_TYPE_CUDA; | 1513 | io_request->RaidContext.Type = MPI2_TYPE_CUDA; |
1516 | io_request->RaidContext.nseg = 0x1; | 1514 | io_request->RaidContext.nseg = 0x1; |
1517 | io_request->IoFlags |= | 1515 | io_request->IoFlags |= cpu_to_le16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH); |
1518 | MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH; | ||
1519 | io_request->RaidContext.regLockFlags |= | 1516 | io_request->RaidContext.regLockFlags |= |
1520 | (MR_RL_FLAGS_GRANT_DESTINATION_CUDA | | 1517 | (MR_RL_FLAGS_GRANT_DESTINATION_CUDA | |
1521 | MR_RL_FLAGS_SEQ_NUM_ENABLE); | 1518 | MR_RL_FLAGS_SEQ_NUM_ENABLE); |
@@ -1535,7 +1532,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance, | |||
1535 | memcpy(io_request->LUN, raidLUN, 8); | 1532 | memcpy(io_request->LUN, raidLUN, 8); |
1536 | } else { | 1533 | } else { |
1537 | io_request->RaidContext.timeoutValue = | 1534 | io_request->RaidContext.timeoutValue = |
1538 | local_map_ptr->raidMap.fpPdIoTimeoutSec; | 1535 | cpu_to_le16(local_map_ptr->raidMap.fpPdIoTimeoutSec); |
1539 | cmd->request_desc->SCSIIO.RequestFlags = | 1536 | cmd->request_desc->SCSIIO.RequestFlags = |
1540 | (MEGASAS_REQ_DESCRIPT_FLAGS_LD_IO | 1537 | (MEGASAS_REQ_DESCRIPT_FLAGS_LD_IO |
1541 | << MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); | 1538 | << MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); |
@@ -1553,7 +1550,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance, | |||
1553 | io_request->RaidContext.nseg = 0x1; | 1550 | io_request->RaidContext.nseg = 0x1; |
1554 | } | 1551 | } |
1555 | io_request->Function = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST; | 1552 | io_request->Function = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST; |
1556 | io_request->DevHandle = device_id; | 1553 | io_request->DevHandle = cpu_to_le16(device_id); |
1557 | } /* Not FP */ | 1554 | } /* Not FP */ |
1558 | } | 1555 | } |
1559 | 1556 | ||
@@ -1587,7 +1584,7 @@ megasas_build_dcdb_fusion(struct megasas_instance *instance, | |||
1587 | +scmd->device->id; | 1584 | +scmd->device->id; |
1588 | local_map_ptr = fusion->ld_map[(instance->map_id & 1)]; | 1585 | local_map_ptr = fusion->ld_map[(instance->map_id & 1)]; |
1589 | 1586 | ||
1590 | io_request->DataLength = scsi_bufflen(scmd); | 1587 | io_request->DataLength = cpu_to_le32(scsi_bufflen(scmd)); |
1591 | 1588 | ||
1592 | 1589 | ||
1593 | /* Check if this is a system PD I/O */ | 1590 | /* Check if this is a system PD I/O */ |
@@ -1647,7 +1644,7 @@ megasas_build_dcdb_fusion(struct megasas_instance *instance, | |||
1647 | /* set RAID context values */ | 1644 | /* set RAID context values */ |
1648 | pRAID_Context->regLockFlags = REGION_TYPE_SHARED_READ; | 1645 | pRAID_Context->regLockFlags = REGION_TYPE_SHARED_READ; |
1649 | pRAID_Context->timeoutValue = raid->fpIoTimeoutForLd; | 1646 | pRAID_Context->timeoutValue = raid->fpIoTimeoutForLd; |
1650 | pRAID_Context->VirtualDiskTgtId = device_id; | 1647 | pRAID_Context->VirtualDiskTgtId = cpu_to_le16(device_id); |
1651 | pRAID_Context->regLockRowLBA = 0; | 1648 | pRAID_Context->regLockRowLBA = 0; |
1652 | pRAID_Context->regLockLength = 0; | 1649 | pRAID_Context->regLockLength = 0; |
1653 | pRAID_Context->configSeqNum = raid->seqNum; | 1650 | pRAID_Context->configSeqNum = raid->seqNum; |
@@ -1676,12 +1673,12 @@ megasas_build_dcdb_fusion(struct megasas_instance *instance, | |||
1676 | 1673 | ||
1677 | NonFastPath: | 1674 | NonFastPath: |
1678 | io_request->Function = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST; | 1675 | io_request->Function = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST; |
1679 | io_request->DevHandle = device_id; | 1676 | io_request->DevHandle = cpu_to_le16(device_id); |
1680 | cmd->request_desc->SCSIIO.RequestFlags = | 1677 | cmd->request_desc->SCSIIO.RequestFlags = |
1681 | (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO << | 1678 | (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO << |
1682 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); | 1679 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); |
1683 | } | 1680 | } |
1684 | io_request->RaidContext.VirtualDiskTgtId = device_id; | 1681 | io_request->RaidContext.VirtualDiskTgtId = cpu_to_le16(device_id); |
1685 | io_request->LUN[1] = scmd->device->lun; | 1682 | io_request->LUN[1] = scmd->device->lun; |
1686 | } | 1683 | } |
1687 | 1684 | ||
@@ -1721,7 +1718,7 @@ megasas_build_io_fusion(struct megasas_instance *instance, | |||
1721 | * Just the CDB length,rest of the Flags are zero | 1718 | * Just the CDB length,rest of the Flags are zero |
1722 | * This will be modified for FP in build_ldio_fusion | 1719 | * This will be modified for FP in build_ldio_fusion |
1723 | */ | 1720 | */ |
1724 | io_request->IoFlags = scp->cmd_len; | 1721 | io_request->IoFlags = cpu_to_le16(scp->cmd_len); |
1725 | 1722 | ||
1726 | if (megasas_is_ldio(scp)) | 1723 | if (megasas_is_ldio(scp)) |
1727 | megasas_build_ldio_fusion(instance, scp, cmd); | 1724 | megasas_build_ldio_fusion(instance, scp, cmd); |
@@ -1746,17 +1743,17 @@ megasas_build_io_fusion(struct megasas_instance *instance, | |||
1746 | 1743 | ||
1747 | io_request->RaidContext.numSGE = sge_count; | 1744 | io_request->RaidContext.numSGE = sge_count; |
1748 | 1745 | ||
1749 | io_request->SGLFlags = MPI2_SGE_FLAGS_64_BIT_ADDRESSING; | 1746 | io_request->SGLFlags = cpu_to_le16(MPI2_SGE_FLAGS_64_BIT_ADDRESSING); |
1750 | 1747 | ||
1751 | if (scp->sc_data_direction == PCI_DMA_TODEVICE) | 1748 | if (scp->sc_data_direction == PCI_DMA_TODEVICE) |
1752 | io_request->Control |= MPI2_SCSIIO_CONTROL_WRITE; | 1749 | io_request->Control |= cpu_to_le32(MPI2_SCSIIO_CONTROL_WRITE); |
1753 | else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) | 1750 | else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) |
1754 | io_request->Control |= MPI2_SCSIIO_CONTROL_READ; | 1751 | io_request->Control |= cpu_to_le32(MPI2_SCSIIO_CONTROL_READ); |
1755 | 1752 | ||
1756 | io_request->SGLOffset0 = | 1753 | io_request->SGLOffset0 = |
1757 | offsetof(struct MPI2_RAID_SCSI_IO_REQUEST, SGL) / 4; | 1754 | offsetof(struct MPI2_RAID_SCSI_IO_REQUEST, SGL) / 4; |
1758 | 1755 | ||
1759 | io_request->SenseBufferLowAddress = cmd->sense_phys_addr; | 1756 | io_request->SenseBufferLowAddress = cpu_to_le32(cmd->sense_phys_addr); |
1760 | io_request->SenseBufferLength = SCSI_SENSE_BUFFERSIZE; | 1757 | io_request->SenseBufferLength = SCSI_SENSE_BUFFERSIZE; |
1761 | 1758 | ||
1762 | cmd->scmd = scp; | 1759 | cmd->scmd = scp; |
@@ -1821,7 +1818,7 @@ megasas_build_and_issue_cmd_fusion(struct megasas_instance *instance, | |||
1821 | } | 1818 | } |
1822 | 1819 | ||
1823 | req_desc = cmd->request_desc; | 1820 | req_desc = cmd->request_desc; |
1824 | req_desc->SCSIIO.SMID = index; | 1821 | req_desc->SCSIIO.SMID = cpu_to_le16(index); |
1825 | 1822 | ||
1826 | if (cmd->io_request->ChainOffset != 0 && | 1823 | if (cmd->io_request->ChainOffset != 0 && |
1827 | cmd->io_request->ChainOffset != 0xF) | 1824 | cmd->io_request->ChainOffset != 0xF) |
@@ -1883,7 +1880,7 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex) | |||
1883 | num_completed = 0; | 1880 | num_completed = 0; |
1884 | 1881 | ||
1885 | while ((d_val.u.low != UINT_MAX) && (d_val.u.high != UINT_MAX)) { | 1882 | while ((d_val.u.low != UINT_MAX) && (d_val.u.high != UINT_MAX)) { |
1886 | smid = reply_desc->SMID; | 1883 | smid = le16_to_cpu(reply_desc->SMID); |
1887 | 1884 | ||
1888 | cmd_fusion = fusion->cmd_list[smid - 1]; | 1885 | cmd_fusion = fusion->cmd_list[smid - 1]; |
1889 | 1886 | ||
@@ -2101,12 +2098,12 @@ build_mpt_mfi_pass_thru(struct megasas_instance *instance, | |||
2101 | SGL) / 4; | 2098 | SGL) / 4; |
2102 | io_req->ChainOffset = fusion->chain_offset_mfi_pthru; | 2099 | io_req->ChainOffset = fusion->chain_offset_mfi_pthru; |
2103 | 2100 | ||
2104 | mpi25_ieee_chain->Address = mfi_cmd->frame_phys_addr; | 2101 | mpi25_ieee_chain->Address = cpu_to_le64(mfi_cmd->frame_phys_addr); |
2105 | 2102 | ||
2106 | mpi25_ieee_chain->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT | | 2103 | mpi25_ieee_chain->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT | |
2107 | MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR; | 2104 | MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR; |
2108 | 2105 | ||
2109 | mpi25_ieee_chain->Length = MEGASAS_MAX_SZ_CHAIN_FRAME; | 2106 | mpi25_ieee_chain->Length = cpu_to_le32(MEGASAS_MAX_SZ_CHAIN_FRAME); |
2110 | 2107 | ||
2111 | return 0; | 2108 | return 0; |
2112 | } | 2109 | } |
@@ -2139,7 +2136,7 @@ build_mpt_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd) | |||
2139 | req_desc->SCSIIO.RequestFlags = (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO << | 2136 | req_desc->SCSIIO.RequestFlags = (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO << |
2140 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); | 2137 | MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT); |
2141 | 2138 | ||
2142 | req_desc->SCSIIO.SMID = index; | 2139 | req_desc->SCSIIO.SMID = cpu_to_le16(index); |
2143 | 2140 | ||
2144 | return req_desc; | 2141 | return req_desc; |
2145 | } | 2142 | } |
diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.h b/drivers/scsi/megaraid/megaraid_sas_fusion.h index 92b4daa172b6..e88d935d5912 100644 --- a/drivers/scsi/megaraid/megaraid_sas_fusion.h +++ b/drivers/scsi/megaraid/megaraid_sas_fusion.h | |||
@@ -93,8 +93,13 @@ enum MR_RAID_FLAGS_IO_SUB_TYPE { | |||
93 | */ | 93 | */ |
94 | 94 | ||
95 | struct RAID_CONTEXT { | 95 | struct RAID_CONTEXT { |
96 | #if defined(__BIG_ENDIAN_BITFIELD) | ||
97 | u8 nseg:4; | ||
98 | u8 Type:4; | ||
99 | #else | ||
96 | u8 Type:4; | 100 | u8 Type:4; |
97 | u8 nseg:4; | 101 | u8 nseg:4; |
102 | #endif | ||
98 | u8 resvd0; | 103 | u8 resvd0; |
99 | u16 timeoutValue; | 104 | u16 timeoutValue; |
100 | u8 regLockFlags; | 105 | u8 regLockFlags; |
@@ -298,8 +303,13 @@ struct MPI2_RAID_SCSI_IO_REQUEST { | |||
298 | * MPT RAID MFA IO Descriptor. | 303 | * MPT RAID MFA IO Descriptor. |
299 | */ | 304 | */ |
300 | struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR { | 305 | struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR { |
306 | #if defined(__BIG_ENDIAN_BITFIELD) | ||
307 | u32 MessageAddress1:24; /* bits 31:8*/ | ||
308 | u32 RequestFlags:8; | ||
309 | #else | ||
301 | u32 RequestFlags:8; | 310 | u32 RequestFlags:8; |
302 | u32 MessageAddress1:24; /* bits 31:8*/ | 311 | u32 MessageAddress1:24; /* bits 31:8*/ |
312 | #endif | ||
303 | u32 MessageAddress2; /* bits 61:32 */ | 313 | u32 MessageAddress2; /* bits 61:32 */ |
304 | }; | 314 | }; |
305 | 315 | ||
@@ -518,6 +528,19 @@ struct MR_SPAN_BLOCK_INFO { | |||
518 | 528 | ||
519 | struct MR_LD_RAID { | 529 | struct MR_LD_RAID { |
520 | struct { | 530 | struct { |
531 | #if defined(__BIG_ENDIAN_BITFIELD) | ||
532 | u32 reserved4:7; | ||
533 | u32 fpNonRWCapable:1; | ||
534 | u32 fpReadAcrossStripe:1; | ||
535 | u32 fpWriteAcrossStripe:1; | ||
536 | u32 fpReadCapable:1; | ||
537 | u32 fpWriteCapable:1; | ||
538 | u32 encryptionType:8; | ||
539 | u32 pdPiMode:4; | ||
540 | u32 ldPiMode:4; | ||
541 | u32 reserved5:3; | ||
542 | u32 fpCapable:1; | ||
543 | #else | ||
521 | u32 fpCapable:1; | 544 | u32 fpCapable:1; |
522 | u32 reserved5:3; | 545 | u32 reserved5:3; |
523 | u32 ldPiMode:4; | 546 | u32 ldPiMode:4; |
@@ -529,6 +552,7 @@ struct MR_LD_RAID { | |||
529 | u32 fpReadAcrossStripe:1; | 552 | u32 fpReadAcrossStripe:1; |
530 | u32 fpNonRWCapable:1; | 553 | u32 fpNonRWCapable:1; |
531 | u32 reserved4:7; | 554 | u32 reserved4:7; |
555 | #endif | ||
532 | } capability; | 556 | } capability; |
533 | u32 reserved6; | 557 | u32 reserved6; |
534 | u64 size; | 558 | u64 size; |