diff options
author | Saurav Kashyap <saurav.kashyap@qlogic.com> | 2012-11-21 02:40:29 -0500 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2012-11-30 06:14:10 -0500 |
commit | fa4926306a8ea67a1cdd4f6b3407a23653dab0d2 (patch) | |
tree | 31e10e9398ed655f8229a455207831c854ac652a /drivers/scsi | |
parent | 681e014b20d1af6851c5461dd9e6323999dd273a (diff) |
[SCSI] qla2xxx: Fix for warnings reported by sparse.
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_dbg.c | 4 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_def.h | 4 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_gbl.h | 1 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_init.c | 62 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_iocb.c | 4 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_isr.c | 2 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_mbx.c | 4 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_nx.c | 77 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_os.c | 15 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_target.c | 2 |
10 files changed, 54 insertions, 121 deletions
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index 44efe3cc79e6..04b28235e584 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c | |||
@@ -526,8 +526,8 @@ qla25xx_copy_mq(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) | |||
526 | ha->max_req_queues : ha->max_rsp_queues; | 526 | ha->max_req_queues : ha->max_rsp_queues; |
527 | mq->count = htonl(que_cnt); | 527 | mq->count = htonl(que_cnt); |
528 | for (cnt = 0; cnt < que_cnt; cnt++) { | 528 | for (cnt = 0; cnt < que_cnt; cnt++) { |
529 | reg = (struct device_reg_25xxmq *) ((void *) | 529 | reg = (struct device_reg_25xxmq __iomem *) |
530 | ha->mqiobase + cnt * QLA_QUE_PAGE); | 530 | (ha->mqiobase + cnt * QLA_QUE_PAGE); |
531 | que_idx = cnt * 4; | 531 | que_idx = cnt * 4; |
532 | mq->qregs[que_idx] = htonl(RD_REG_DWORD(®->req_q_in)); | 532 | mq->qregs[que_idx] = htonl(RD_REG_DWORD(®->req_q_in)); |
533 | mq->qregs[que_idx+1] = htonl(RD_REG_DWORD(®->req_q_out)); | 533 | mq->qregs[que_idx+1] = htonl(RD_REG_DWORD(®->req_q_out)); |
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h index a9725bf5527b..6e7727f46d43 100644 --- a/drivers/scsi/qla2xxx/qla_def.h +++ b/drivers/scsi/qla2xxx/qla_def.h | |||
@@ -2486,9 +2486,9 @@ struct bidi_statistics { | |||
2486 | #define QLA_MAX_QUEUES 256 | 2486 | #define QLA_MAX_QUEUES 256 |
2487 | #define ISP_QUE_REG(ha, id) \ | 2487 | #define ISP_QUE_REG(ha, id) \ |
2488 | ((ha->mqenable || IS_QLA83XX(ha)) ? \ | 2488 | ((ha->mqenable || IS_QLA83XX(ha)) ? \ |
2489 | ((void *)(ha->mqiobase) +\ | 2489 | ((device_reg_t __iomem *)(ha->mqiobase) +\ |
2490 | (QLA_QUE_PAGE * id)) :\ | 2490 | (QLA_QUE_PAGE * id)) :\ |
2491 | ((void *)(ha->iobase))) | 2491 | ((device_reg_t __iomem *)(ha->iobase))) |
2492 | #define QLA_REQ_QUE_ID(tag) \ | 2492 | #define QLA_REQ_QUE_ID(tag) \ |
2493 | ((tag < QLA_MAX_QUEUES && tag > 0) ? tag : 0) | 2493 | ((tag < QLA_MAX_QUEUES && tag > 0) ? tag : 0) |
2494 | #define QLA_DEFAULT_QUE_QOS 5 | 2494 | #define QLA_DEFAULT_QUE_QOS 5 |
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h index 6acb39785a46..dfad9595be56 100644 --- a/drivers/scsi/qla2xxx/qla_gbl.h +++ b/drivers/scsi/qla2xxx/qla_gbl.h | |||
@@ -598,7 +598,6 @@ extern void qla82xx_init_flags(struct qla_hw_data *); | |||
598 | 598 | ||
599 | /* ISP 8021 hardware related */ | 599 | /* ISP 8021 hardware related */ |
600 | extern void qla82xx_set_drv_active(scsi_qla_host_t *); | 600 | extern void qla82xx_set_drv_active(scsi_qla_host_t *); |
601 | extern void qla82xx_crb_win_unlock(struct qla_hw_data *); | ||
602 | extern int qla82xx_wr_32(struct qla_hw_data *, ulong, u32); | 601 | extern int qla82xx_wr_32(struct qla_hw_data *, ulong, u32); |
603 | extern int qla82xx_rd_32(struct qla_hw_data *, ulong); | 602 | extern int qla82xx_rd_32(struct qla_hw_data *, ulong); |
604 | extern int qla82xx_rdmem(struct qla_hw_data *, u64, void *, int); | 603 | extern int qla82xx_rdmem(struct qla_hw_data *, u64, void *, int); |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 39044fc40194..b7e42a80e165 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -429,7 +429,7 @@ qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, | |||
429 | /* QLogic ISP2x00 Hardware Support Functions. */ | 429 | /* QLogic ISP2x00 Hardware Support Functions. */ |
430 | /****************************************************************************/ | 430 | /****************************************************************************/ |
431 | 431 | ||
432 | int | 432 | static int |
433 | qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) | 433 | qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) |
434 | { | 434 | { |
435 | int rval = QLA_SUCCESS; | 435 | int rval = QLA_SUCCESS; |
@@ -997,7 +997,7 @@ qla2x00_reset_chip(scsi_qla_host_t *vha) | |||
997 | * | 997 | * |
998 | * Returns 0 on success. | 998 | * Returns 0 on success. |
999 | */ | 999 | */ |
1000 | int | 1000 | static int |
1001 | qla81xx_reset_mpi(scsi_qla_host_t *vha) | 1001 | qla81xx_reset_mpi(scsi_qla_host_t *vha) |
1002 | { | 1002 | { |
1003 | uint16_t mb[4] = {0x1010, 0, 1, 0}; | 1003 | uint16_t mb[4] = {0x1010, 0, 1, 0}; |
@@ -3865,7 +3865,7 @@ qla83xx_reset_ownership(scsi_qla_host_t *vha) | |||
3865 | } | 3865 | } |
3866 | } | 3866 | } |
3867 | 3867 | ||
3868 | int | 3868 | static int |
3869 | __qla83xx_set_drv_ack(scsi_qla_host_t *vha) | 3869 | __qla83xx_set_drv_ack(scsi_qla_host_t *vha) |
3870 | { | 3870 | { |
3871 | int rval = QLA_SUCCESS; | 3871 | int rval = QLA_SUCCESS; |
@@ -3881,19 +3881,7 @@ __qla83xx_set_drv_ack(scsi_qla_host_t *vha) | |||
3881 | return rval; | 3881 | return rval; |
3882 | } | 3882 | } |
3883 | 3883 | ||
3884 | int | 3884 | static int |
3885 | qla83xx_set_drv_ack(scsi_qla_host_t *vha) | ||
3886 | { | ||
3887 | int rval = QLA_SUCCESS; | ||
3888 | |||
3889 | qla83xx_idc_lock(vha, 0); | ||
3890 | rval = __qla83xx_set_drv_ack(vha); | ||
3891 | qla83xx_idc_unlock(vha, 0); | ||
3892 | |||
3893 | return rval; | ||
3894 | } | ||
3895 | |||
3896 | int | ||
3897 | __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) | 3885 | __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) |
3898 | { | 3886 | { |
3899 | int rval = QLA_SUCCESS; | 3887 | int rval = QLA_SUCCESS; |
@@ -3909,19 +3897,7 @@ __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) | |||
3909 | return rval; | 3897 | return rval; |
3910 | } | 3898 | } |
3911 | 3899 | ||
3912 | int | 3900 | static const char * |
3913 | qla83xx_clear_drv_ack(scsi_qla_host_t *vha) | ||
3914 | { | ||
3915 | int rval = QLA_SUCCESS; | ||
3916 | |||
3917 | qla83xx_idc_lock(vha, 0); | ||
3918 | rval = __qla83xx_clear_drv_ack(vha); | ||
3919 | qla83xx_idc_unlock(vha, 0); | ||
3920 | |||
3921 | return rval; | ||
3922 | } | ||
3923 | |||
3924 | const char * | ||
3925 | qla83xx_dev_state_to_string(uint32_t dev_state) | 3901 | qla83xx_dev_state_to_string(uint32_t dev_state) |
3926 | { | 3902 | { |
3927 | switch (dev_state) { | 3903 | switch (dev_state) { |
@@ -3975,7 +3951,7 @@ qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) | |||
3975 | } | 3951 | } |
3976 | 3952 | ||
3977 | /* Assumes idc_lock always held on entry */ | 3953 | /* Assumes idc_lock always held on entry */ |
3978 | int | 3954 | static int |
3979 | qla83xx_initiating_reset(scsi_qla_host_t *vha) | 3955 | qla83xx_initiating_reset(scsi_qla_host_t *vha) |
3980 | { | 3956 | { |
3981 | struct qla_hw_data *ha = vha->hw; | 3957 | struct qla_hw_data *ha = vha->hw; |
@@ -4023,36 +3999,12 @@ __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) | |||
4023 | } | 3999 | } |
4024 | 4000 | ||
4025 | int | 4001 | int |
4026 | qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) | ||
4027 | { | ||
4028 | int rval = QLA_SUCCESS; | ||
4029 | |||
4030 | qla83xx_idc_lock(vha, 0); | ||
4031 | rval = __qla83xx_set_idc_control(vha, idc_control); | ||
4032 | qla83xx_idc_unlock(vha, 0); | ||
4033 | |||
4034 | return rval; | ||
4035 | } | ||
4036 | |||
4037 | int | ||
4038 | __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) | 4002 | __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) |
4039 | { | 4003 | { |
4040 | return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); | 4004 | return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); |
4041 | } | 4005 | } |
4042 | 4006 | ||
4043 | int | 4007 | static int |
4044 | qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) | ||
4045 | { | ||
4046 | int rval = QLA_SUCCESS; | ||
4047 | |||
4048 | qla83xx_idc_lock(vha, 0); | ||
4049 | rval = __qla83xx_get_idc_control(vha, idc_control); | ||
4050 | qla83xx_idc_unlock(vha, 0); | ||
4051 | |||
4052 | return rval; | ||
4053 | } | ||
4054 | |||
4055 | int | ||
4056 | qla83xx_check_driver_presence(scsi_qla_host_t *vha) | 4008 | qla83xx_check_driver_presence(scsi_qla_host_t *vha) |
4057 | { | 4009 | { |
4058 | uint32_t drv_presence = 0; | 4010 | uint32_t drv_presence = 0; |
diff --git a/drivers/scsi/qla2xxx/qla_iocb.c b/drivers/scsi/qla2xxx/qla_iocb.c index 03b752632839..b6104042b7ac 100644 --- a/drivers/scsi/qla2xxx/qla_iocb.c +++ b/drivers/scsi/qla2xxx/qla_iocb.c | |||
@@ -520,7 +520,7 @@ __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req, | |||
520 | 520 | ||
521 | mrk24 = NULL; | 521 | mrk24 = NULL; |
522 | req = ha->req_q_map[0]; | 522 | req = ha->req_q_map[0]; |
523 | mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, 0); | 523 | mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL); |
524 | if (mrk == NULL) { | 524 | if (mrk == NULL) { |
525 | ql_log(ql_log_warn, base_vha, 0x3026, | 525 | ql_log(ql_log_warn, base_vha, 0x3026, |
526 | "Failed to allocate Marker IOCB.\n"); | 526 | "Failed to allocate Marker IOCB.\n"); |
@@ -2551,7 +2551,7 @@ sufficient_dsds: | |||
2551 | (unsigned long __iomem *)ha->nxdb_wr_ptr, | 2551 | (unsigned long __iomem *)ha->nxdb_wr_ptr, |
2552 | dbval); | 2552 | dbval); |
2553 | wmb(); | 2553 | wmb(); |
2554 | while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) { | 2554 | while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) { |
2555 | WRT_REG_DWORD( | 2555 | WRT_REG_DWORD( |
2556 | (unsigned long __iomem *)ha->nxdb_wr_ptr, | 2556 | (unsigned long __iomem *)ha->nxdb_wr_ptr, |
2557 | dbval); | 2557 | dbval); |
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index 5733811ce8e7..bb611e21b301 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
@@ -337,7 +337,7 @@ qla2x00_get_link_speed_str(struct qla_hw_data *ha) | |||
337 | return link_speed; | 337 | return link_speed; |
338 | } | 338 | } |
339 | 339 | ||
340 | void | 340 | static void |
341 | qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) | 341 | qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) |
342 | { | 342 | { |
343 | struct qla_hw_data *ha = vha->hw; | 343 | struct qla_hw_data *ha = vha->hw; |
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index bdf7fa772396..68c55eaa318c 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -3536,7 +3536,7 @@ qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req) | |||
3536 | if (IS_QLA83XX(ha)) | 3536 | if (IS_QLA83XX(ha)) |
3537 | mcp->mb[15] = 0; | 3537 | mcp->mb[15] = 0; |
3538 | 3538 | ||
3539 | reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) + | 3539 | reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) + |
3540 | QLA_QUE_PAGE * req->id); | 3540 | QLA_QUE_PAGE * req->id); |
3541 | 3541 | ||
3542 | mcp->mb[4] = req->id; | 3542 | mcp->mb[4] = req->id; |
@@ -3605,7 +3605,7 @@ qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp) | |||
3605 | if (IS_QLA83XX(ha)) | 3605 | if (IS_QLA83XX(ha)) |
3606 | mcp->mb[15] = 0; | 3606 | mcp->mb[15] = 0; |
3607 | 3607 | ||
3608 | reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) + | 3608 | reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) + |
3609 | QLA_QUE_PAGE * rsp->id); | 3609 | QLA_QUE_PAGE * rsp->id); |
3610 | 3610 | ||
3611 | mcp->mb[4] = rsp->id; | 3611 | mcp->mb[4] = rsp->id; |
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index 14cd361742fa..f0fdc222770d 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c | |||
@@ -36,7 +36,7 @@ | |||
36 | 36 | ||
37 | #define MAX_CRB_XFORM 60 | 37 | #define MAX_CRB_XFORM 60 |
38 | static unsigned long crb_addr_xform[MAX_CRB_XFORM]; | 38 | static unsigned long crb_addr_xform[MAX_CRB_XFORM]; |
39 | int qla82xx_crb_table_initialized; | 39 | static int qla82xx_crb_table_initialized; |
40 | 40 | ||
41 | #define qla82xx_crb_addr_transform(name) \ | 41 | #define qla82xx_crb_addr_transform(name) \ |
42 | (crb_addr_xform[QLA82XX_HW_PX_MAP_CRB_##name] = \ | 42 | (crb_addr_xform[QLA82XX_HW_PX_MAP_CRB_##name] = \ |
@@ -102,7 +102,7 @@ static void qla82xx_crb_addr_transform_setup(void) | |||
102 | qla82xx_crb_table_initialized = 1; | 102 | qla82xx_crb_table_initialized = 1; |
103 | } | 103 | } |
104 | 104 | ||
105 | struct crb_128M_2M_block_map crb_128M_2M_map[64] = { | 105 | static struct crb_128M_2M_block_map crb_128M_2M_map[64] = { |
106 | {{{0, 0, 0, 0} } }, | 106 | {{{0, 0, 0, 0} } }, |
107 | {{{1, 0x0100000, 0x0102000, 0x120000}, | 107 | {{{1, 0x0100000, 0x0102000, 0x120000}, |
108 | {1, 0x0110000, 0x0120000, 0x130000}, | 108 | {1, 0x0110000, 0x0120000, 0x130000}, |
@@ -262,7 +262,7 @@ struct crb_128M_2M_block_map crb_128M_2M_map[64] = { | |||
262 | /* | 262 | /* |
263 | * top 12 bits of crb internal address (hub, agent) | 263 | * top 12 bits of crb internal address (hub, agent) |
264 | */ | 264 | */ |
265 | unsigned qla82xx_crb_hub_agt[64] = { | 265 | static unsigned qla82xx_crb_hub_agt[64] = { |
266 | 0, | 266 | 0, |
267 | QLA82XX_HW_CRB_HUB_AGT_ADR_PS, | 267 | QLA82XX_HW_CRB_HUB_AGT_ADR_PS, |
268 | QLA82XX_HW_CRB_HUB_AGT_ADR_MN, | 268 | QLA82XX_HW_CRB_HUB_AGT_ADR_MN, |
@@ -330,7 +330,7 @@ unsigned qla82xx_crb_hub_agt[64] = { | |||
330 | }; | 330 | }; |
331 | 331 | ||
332 | /* Device states */ | 332 | /* Device states */ |
333 | char *q_dev_state[] = { | 333 | static char *q_dev_state[] = { |
334 | "Unknown", | 334 | "Unknown", |
335 | "Cold", | 335 | "Cold", |
336 | "Initializing", | 336 | "Initializing", |
@@ -359,12 +359,13 @@ qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong *off) | |||
359 | 359 | ||
360 | ha->crb_win = CRB_HI(*off); | 360 | ha->crb_win = CRB_HI(*off); |
361 | writel(ha->crb_win, | 361 | writel(ha->crb_win, |
362 | (void *)(CRB_WINDOW_2M + ha->nx_pcibase)); | 362 | (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); |
363 | 363 | ||
364 | /* Read back value to make sure write has gone through before trying | 364 | /* Read back value to make sure write has gone through before trying |
365 | * to use it. | 365 | * to use it. |
366 | */ | 366 | */ |
367 | win_read = RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase)); | 367 | win_read = RD_REG_DWORD((void __iomem *) |
368 | (CRB_WINDOW_2M + ha->nx_pcibase)); | ||
368 | if (win_read != ha->crb_win) { | 369 | if (win_read != ha->crb_win) { |
369 | ql_dbg(ql_dbg_p3p, vha, 0xb000, | 370 | ql_dbg(ql_dbg_p3p, vha, 0xb000, |
370 | "%s: Written crbwin (0x%x) " | 371 | "%s: Written crbwin (0x%x) " |
@@ -567,7 +568,7 @@ qla82xx_pci_mem_bound_check(struct qla_hw_data *ha, | |||
567 | return 1; | 568 | return 1; |
568 | } | 569 | } |
569 | 570 | ||
570 | int qla82xx_pci_set_window_warning_count; | 571 | static int qla82xx_pci_set_window_warning_count; |
571 | 572 | ||
572 | static unsigned long | 573 | static unsigned long |
573 | qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) | 574 | qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) |
@@ -677,10 +678,10 @@ static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha, | |||
677 | u64 off, void *data, int size) | 678 | u64 off, void *data, int size) |
678 | { | 679 | { |
679 | unsigned long flags; | 680 | unsigned long flags; |
680 | void *addr = NULL; | 681 | void __iomem *addr = NULL; |
681 | int ret = 0; | 682 | int ret = 0; |
682 | u64 start; | 683 | u64 start; |
683 | uint8_t *mem_ptr = NULL; | 684 | uint8_t __iomem *mem_ptr = NULL; |
684 | unsigned long mem_base; | 685 | unsigned long mem_base; |
685 | unsigned long mem_page; | 686 | unsigned long mem_page; |
686 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | 687 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
@@ -712,7 +713,7 @@ static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha, | |||
712 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE * 2); | 713 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE * 2); |
713 | else | 714 | else |
714 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE); | 715 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE); |
715 | if (mem_ptr == 0UL) { | 716 | if (mem_ptr == NULL) { |
716 | *(u8 *)data = 0; | 717 | *(u8 *)data = 0; |
717 | return -1; | 718 | return -1; |
718 | } | 719 | } |
@@ -749,10 +750,10 @@ qla82xx_pci_mem_write_direct(struct qla_hw_data *ha, | |||
749 | u64 off, void *data, int size) | 750 | u64 off, void *data, int size) |
750 | { | 751 | { |
751 | unsigned long flags; | 752 | unsigned long flags; |
752 | void *addr = NULL; | 753 | void __iomem *addr = NULL; |
753 | int ret = 0; | 754 | int ret = 0; |
754 | u64 start; | 755 | u64 start; |
755 | uint8_t *mem_ptr = NULL; | 756 | uint8_t __iomem *mem_ptr = NULL; |
756 | unsigned long mem_base; | 757 | unsigned long mem_base; |
757 | unsigned long mem_page; | 758 | unsigned long mem_page; |
758 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | 759 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
@@ -784,7 +785,7 @@ qla82xx_pci_mem_write_direct(struct qla_hw_data *ha, | |||
784 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE*2); | 785 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE*2); |
785 | else | 786 | else |
786 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE); | 787 | mem_ptr = ioremap(mem_base + mem_page, PAGE_SIZE); |
787 | if (mem_ptr == 0UL) | 788 | if (mem_ptr == NULL) |
788 | return -1; | 789 | return -1; |
789 | 790 | ||
790 | addr = mem_ptr; | 791 | addr = mem_ptr; |
@@ -908,24 +909,24 @@ qla82xx_wait_rom_done(struct qla_hw_data *ha) | |||
908 | return 0; | 909 | return 0; |
909 | } | 910 | } |
910 | 911 | ||
911 | int | 912 | static int |
912 | qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag) | 913 | qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag) |
913 | { | 914 | { |
914 | uint32_t off_value, rval = 0; | 915 | uint32_t off_value, rval = 0; |
915 | 916 | ||
916 | WRT_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase), | 917 | WRT_REG_DWORD((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase), |
917 | (off & 0xFFFF0000)); | 918 | (off & 0xFFFF0000)); |
918 | 919 | ||
919 | /* Read back value to make sure write has gone through */ | 920 | /* Read back value to make sure write has gone through */ |
920 | RD_REG_DWORD((void *)(CRB_WINDOW_2M + ha->nx_pcibase)); | 921 | RD_REG_DWORD((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); |
921 | off_value = (off & 0x0000FFFF); | 922 | off_value = (off & 0x0000FFFF); |
922 | 923 | ||
923 | if (flag) | 924 | if (flag) |
924 | WRT_REG_DWORD((void *) | 925 | WRT_REG_DWORD((void __iomem *) |
925 | (off_value + CRB_INDIRECT_2M + ha->nx_pcibase), | 926 | (off_value + CRB_INDIRECT_2M + ha->nx_pcibase), |
926 | data); | 927 | data); |
927 | else | 928 | else |
928 | rval = RD_REG_DWORD((void *) | 929 | rval = RD_REG_DWORD((void __iomem *) |
929 | (off_value + CRB_INDIRECT_2M + ha->nx_pcibase)); | 930 | (off_value + CRB_INDIRECT_2M + ha->nx_pcibase)); |
930 | 931 | ||
931 | return rval; | 932 | return rval; |
@@ -1764,14 +1765,6 @@ void qla82xx_config_rings(struct scsi_qla_host *vha) | |||
1764 | WRT_REG_DWORD((unsigned long __iomem *)®->rsp_q_out[0], 0); | 1765 | WRT_REG_DWORD((unsigned long __iomem *)®->rsp_q_out[0], 0); |
1765 | } | 1766 | } |
1766 | 1767 | ||
1767 | void qla82xx_reset_adapter(struct scsi_qla_host *vha) | ||
1768 | { | ||
1769 | struct qla_hw_data *ha = vha->hw; | ||
1770 | vha->flags.online = 0; | ||
1771 | qla2x00_try_to_stop_firmware(vha); | ||
1772 | ha->isp_ops->disable_intrs(ha); | ||
1773 | } | ||
1774 | |||
1775 | static int | 1768 | static int |
1776 | qla82xx_fw_load_from_blob(struct qla_hw_data *ha) | 1769 | qla82xx_fw_load_from_blob(struct qla_hw_data *ha) |
1777 | { | 1770 | { |
@@ -1856,7 +1849,7 @@ qla82xx_set_product_offset(struct qla_hw_data *ha) | |||
1856 | return -1; | 1849 | return -1; |
1857 | } | 1850 | } |
1858 | 1851 | ||
1859 | int | 1852 | static int |
1860 | qla82xx_validate_firmware_blob(scsi_qla_host_t *vha, uint8_t fw_type) | 1853 | qla82xx_validate_firmware_blob(scsi_qla_host_t *vha, uint8_t fw_type) |
1861 | { | 1854 | { |
1862 | __le32 val; | 1855 | __le32 val; |
@@ -1961,20 +1954,6 @@ qla82xx_check_rcvpeg_state(struct qla_hw_data *ha) | |||
1961 | } | 1954 | } |
1962 | 1955 | ||
1963 | /* ISR related functions */ | 1956 | /* ISR related functions */ |
1964 | uint32_t qla82xx_isr_int_target_mask_enable[8] = { | ||
1965 | ISR_INT_TARGET_MASK, ISR_INT_TARGET_MASK_F1, | ||
1966 | ISR_INT_TARGET_MASK_F2, ISR_INT_TARGET_MASK_F3, | ||
1967 | ISR_INT_TARGET_MASK_F4, ISR_INT_TARGET_MASK_F5, | ||
1968 | ISR_INT_TARGET_MASK_F7, ISR_INT_TARGET_MASK_F7 | ||
1969 | }; | ||
1970 | |||
1971 | uint32_t qla82xx_isr_int_target_status[8] = { | ||
1972 | ISR_INT_TARGET_STATUS, ISR_INT_TARGET_STATUS_F1, | ||
1973 | ISR_INT_TARGET_STATUS_F2, ISR_INT_TARGET_STATUS_F3, | ||
1974 | ISR_INT_TARGET_STATUS_F4, ISR_INT_TARGET_STATUS_F5, | ||
1975 | ISR_INT_TARGET_STATUS_F7, ISR_INT_TARGET_STATUS_F7 | ||
1976 | }; | ||
1977 | |||
1978 | static struct qla82xx_legacy_intr_set legacy_intr[] = \ | 1957 | static struct qla82xx_legacy_intr_set legacy_intr[] = \ |
1979 | QLA82XX_LEGACY_INTR_CONFIG; | 1958 | QLA82XX_LEGACY_INTR_CONFIG; |
1980 | 1959 | ||
@@ -2813,7 +2792,7 @@ qla82xx_start_iocbs(scsi_qla_host_t *vha) | |||
2813 | else { | 2792 | else { |
2814 | WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr, dbval); | 2793 | WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr, dbval); |
2815 | wmb(); | 2794 | wmb(); |
2816 | while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) { | 2795 | while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) { |
2817 | WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr, | 2796 | WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr, |
2818 | dbval); | 2797 | dbval); |
2819 | wmb(); | 2798 | wmb(); |
@@ -2821,7 +2800,8 @@ qla82xx_start_iocbs(scsi_qla_host_t *vha) | |||
2821 | } | 2800 | } |
2822 | } | 2801 | } |
2823 | 2802 | ||
2824 | void qla82xx_rom_lock_recovery(struct qla_hw_data *ha) | 2803 | static void |
2804 | qla82xx_rom_lock_recovery(struct qla_hw_data *ha) | ||
2825 | { | 2805 | { |
2826 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); | 2806 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
2827 | 2807 | ||
@@ -3177,7 +3157,7 @@ qla82xx_check_md_needed(scsi_qla_host_t *vha) | |||
3177 | } | 3157 | } |
3178 | 3158 | ||
3179 | 3159 | ||
3180 | int | 3160 | static int |
3181 | qla82xx_check_fw_alive(scsi_qla_host_t *vha) | 3161 | qla82xx_check_fw_alive(scsi_qla_host_t *vha) |
3182 | { | 3162 | { |
3183 | uint32_t fw_heartbeat_counter; | 3163 | uint32_t fw_heartbeat_counter; |
@@ -3817,7 +3797,8 @@ qla82xx_minidump_process_rdocm(scsi_qla_host_t *vha, | |||
3817 | loop_cnt = ocm_hdr->op_count; | 3797 | loop_cnt = ocm_hdr->op_count; |
3818 | 3798 | ||
3819 | for (i = 0; i < loop_cnt; i++) { | 3799 | for (i = 0; i < loop_cnt; i++) { |
3820 | r_value = RD_REG_DWORD((void *)(r_addr + ha->nx_pcibase)); | 3800 | r_value = RD_REG_DWORD((void __iomem *) |
3801 | (r_addr + ha->nx_pcibase)); | ||
3821 | *data_ptr++ = cpu_to_le32(r_value); | 3802 | *data_ptr++ = cpu_to_le32(r_value); |
3822 | r_addr += r_stride; | 3803 | r_addr += r_stride; |
3823 | } | 3804 | } |
@@ -4376,7 +4357,7 @@ qla82xx_md_free(scsi_qla_host_t *vha) | |||
4376 | ha->md_tmplt_hdr, ha->md_template_size / 1024); | 4357 | ha->md_tmplt_hdr, ha->md_template_size / 1024); |
4377 | dma_free_coherent(&ha->pdev->dev, ha->md_template_size, | 4358 | dma_free_coherent(&ha->pdev->dev, ha->md_template_size, |
4378 | ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); | 4359 | ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); |
4379 | ha->md_tmplt_hdr = 0; | 4360 | ha->md_tmplt_hdr = NULL; |
4380 | } | 4361 | } |
4381 | 4362 | ||
4382 | /* Release the template data buffer allocated */ | 4363 | /* Release the template data buffer allocated */ |
@@ -4386,7 +4367,7 @@ qla82xx_md_free(scsi_qla_host_t *vha) | |||
4386 | ha->md_dump, ha->md_dump_size / 1024); | 4367 | ha->md_dump, ha->md_dump_size / 1024); |
4387 | vfree(ha->md_dump); | 4368 | vfree(ha->md_dump); |
4388 | ha->md_dump_size = 0; | 4369 | ha->md_dump_size = 0; |
4389 | ha->md_dump = 0; | 4370 | ha->md_dump = NULL; |
4390 | } | 4371 | } |
4391 | } | 4372 | } |
4392 | 4373 | ||
@@ -4423,7 +4404,7 @@ qla82xx_md_prep(scsi_qla_host_t *vha) | |||
4423 | dma_free_coherent(&ha->pdev->dev, | 4404 | dma_free_coherent(&ha->pdev->dev, |
4424 | ha->md_template_size, | 4405 | ha->md_template_size, |
4425 | ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); | 4406 | ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); |
4426 | ha->md_tmplt_hdr = 0; | 4407 | ha->md_tmplt_hdr = NULL; |
4427 | } | 4408 | } |
4428 | 4409 | ||
4429 | } | 4410 | } |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index f4b1fc800194..0cdc6e2f11a2 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -41,7 +41,7 @@ static struct kmem_cache *ctx_cachep; | |||
41 | */ | 41 | */ |
42 | int ql_errlev = ql_log_all; | 42 | int ql_errlev = ql_log_all; |
43 | 43 | ||
44 | int ql2xenableclass2; | 44 | static int ql2xenableclass2; |
45 | module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR); | 45 | module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR); |
46 | MODULE_PARM_DESC(ql2xenableclass2, | 46 | MODULE_PARM_DESC(ql2xenableclass2, |
47 | "Specify if Class 2 operations are supported from the very " | 47 | "Specify if Class 2 operations are supported from the very " |
@@ -3835,7 +3835,7 @@ qla83xx_idc_state_handler_work(struct work_struct *work) | |||
3835 | qla83xx_idc_unlock(base_vha, 0); | 3835 | qla83xx_idc_unlock(base_vha, 0); |
3836 | } | 3836 | } |
3837 | 3837 | ||
3838 | int | 3838 | static int |
3839 | qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha) | 3839 | qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha) |
3840 | { | 3840 | { |
3841 | int rval = QLA_SUCCESS; | 3841 | int rval = QLA_SUCCESS; |
@@ -3953,7 +3953,7 @@ qla83xx_wait_logic(void) | |||
3953 | } | 3953 | } |
3954 | } | 3954 | } |
3955 | 3955 | ||
3956 | int | 3956 | static int |
3957 | qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha) | 3957 | qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha) |
3958 | { | 3958 | { |
3959 | int rval; | 3959 | int rval; |
@@ -4012,7 +4012,7 @@ qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha) | |||
4012 | return rval; | 4012 | return rval; |
4013 | } | 4013 | } |
4014 | 4014 | ||
4015 | int | 4015 | static int |
4016 | qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha) | 4016 | qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha) |
4017 | { | 4017 | { |
4018 | int rval = QLA_SUCCESS; | 4018 | int rval = QLA_SUCCESS; |
@@ -4211,7 +4211,7 @@ qla83xx_clear_drv_presence(scsi_qla_host_t *vha) | |||
4211 | return rval; | 4211 | return rval; |
4212 | } | 4212 | } |
4213 | 4213 | ||
4214 | void | 4214 | static void |
4215 | qla83xx_need_reset_handler(scsi_qla_host_t *vha) | 4215 | qla83xx_need_reset_handler(scsi_qla_host_t *vha) |
4216 | { | 4216 | { |
4217 | struct qla_hw_data *ha = vha->hw; | 4217 | struct qla_hw_data *ha = vha->hw; |
@@ -4250,7 +4250,7 @@ qla83xx_need_reset_handler(scsi_qla_host_t *vha) | |||
4250 | ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n"); | 4250 | ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n"); |
4251 | } | 4251 | } |
4252 | 4252 | ||
4253 | int | 4253 | static int |
4254 | qla83xx_device_bootstrap(scsi_qla_host_t *vha) | 4254 | qla83xx_device_bootstrap(scsi_qla_host_t *vha) |
4255 | { | 4255 | { |
4256 | int rval = QLA_SUCCESS; | 4256 | int rval = QLA_SUCCESS; |
@@ -4986,7 +4986,8 @@ qla2xxx_pci_mmio_enabled(struct pci_dev *pdev) | |||
4986 | return PCI_ERS_RESULT_RECOVERED; | 4986 | return PCI_ERS_RESULT_RECOVERED; |
4987 | } | 4987 | } |
4988 | 4988 | ||
4989 | uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha) | 4989 | static uint32_t |
4990 | qla82xx_error_recovery(scsi_qla_host_t *base_vha) | ||
4990 | { | 4991 | { |
4991 | uint32_t rval = QLA_FUNCTION_FAILED; | 4992 | uint32_t rval = QLA_FUNCTION_FAILED; |
4992 | uint32_t drv_active = 0; | 4993 | uint32_t drv_active = 0; |
diff --git a/drivers/scsi/qla2xxx/qla_target.c b/drivers/scsi/qla2xxx/qla_target.c index 62aa5584f644..dc98ec9b1b7a 100644 --- a/drivers/scsi/qla2xxx/qla_target.c +++ b/drivers/scsi/qla2xxx/qla_target.c | |||
@@ -1029,7 +1029,7 @@ void qlt_stop_phase2(struct qla_tgt *tgt) | |||
1029 | EXPORT_SYMBOL(qlt_stop_phase2); | 1029 | EXPORT_SYMBOL(qlt_stop_phase2); |
1030 | 1030 | ||
1031 | /* Called from qlt_remove_target() -> qla2x00_remove_one() */ | 1031 | /* Called from qlt_remove_target() -> qla2x00_remove_one() */ |
1032 | void qlt_release(struct qla_tgt *tgt) | 1032 | static void qlt_release(struct qla_tgt *tgt) |
1033 | { | 1033 | { |
1034 | struct qla_hw_data *ha = tgt->ha; | 1034 | struct qla_hw_data *ha = tgt->ha; |
1035 | 1035 | ||