aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi
diff options
context:
space:
mode:
authorJames Bottomley <James.Bottomley@HansenPartnership.com>2008-01-03 13:29:03 -0500
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-02-07 19:02:43 -0500
commita2c6ef71364e3c7e7509d1bf0e61e8b853744190 (patch)
treeadbb31964d7484f0febba2e095c58c8bb4d24e72 /drivers/scsi
parent642978beb48331db1bafde0262eee33f658cfc39 (diff)
[SCSI] NCR53C9x: remove driver
Acked-by: Boaz Harrosh <bharrosh@panasas.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/NCR53C9x.c3654
-rw-r--r--drivers/scsi/NCR53C9x.h668
2 files changed, 0 insertions, 4322 deletions
diff --git a/drivers/scsi/NCR53C9x.c b/drivers/scsi/NCR53C9x.c
deleted file mode 100644
index 5b0efc903918..000000000000
--- a/drivers/scsi/NCR53C9x.c
+++ /dev/null
@@ -1,3654 +0,0 @@
1/* NCR53C9x.c: Generic SCSI driver code for NCR53C9x chips.
2 *
3 * Originally esp.c : EnhancedScsiProcessor Sun SCSI driver code.
4 *
5 * Copyright (C) 1995, 1998 David S. Miller (davem@caip.rutgers.edu)
6 *
7 * Most DMA dependencies put in driver specific files by
8 * Jesper Skov (jskov@cygnus.co.uk)
9 *
10 * Set up to use esp_read/esp_write (preprocessor macros in NCR53c9x.h) by
11 * Tymm Twillman (tymm@coe.missouri.edu)
12 */
13
14/* TODO:
15 *
16 * 1) Maybe disable parity checking in config register one for SCSI1
17 * targets. (Gilmore says parity error on the SBus can lock up
18 * old sun4c's)
19 * 2) Add support for DMA2 pipelining.
20 * 3) Add tagged queueing.
21 * 4) Maybe change use of "esp" to something more "NCR"'ish.
22 */
23
24#include <linux/module.h>
25
26#include <linux/kernel.h>
27#include <linux/delay.h>
28#include <linux/types.h>
29#include <linux/string.h>
30#include <linux/slab.h>
31#include <linux/blkdev.h>
32#include <linux/interrupt.h>
33#include <linux/proc_fs.h>
34#include <linux/stat.h>
35#include <linux/init.h>
36
37#include "scsi.h"
38#include <scsi/scsi_host.h>
39#include "NCR53C9x.h"
40
41#include <asm/system.h>
42#include <asm/ptrace.h>
43#include <asm/pgtable.h>
44#include <asm/io.h>
45#include <asm/irq.h>
46
47/* Command phase enumeration. */
48enum {
49 not_issued = 0x00, /* Still in the issue_SC queue. */
50
51 /* Various forms of selecting a target. */
52#define in_slct_mask 0x10
53 in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */
54 in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */
55 in_slct_msg = 0x12, /* select, then send a message */
56 in_slct_tag = 0x13, /* select and send tagged queue msg */
57 in_slct_sneg = 0x14, /* select and acquire sync capabilities */
58
59 /* Any post selection activity. */
60#define in_phases_mask 0x20
61 in_datain = 0x20, /* Data is transferring from the bus */
62 in_dataout = 0x21, /* Data is transferring to the bus */
63 in_data_done = 0x22, /* Last DMA data operation done (maybe) */
64 in_msgin = 0x23, /* Eating message from target */
65 in_msgincont = 0x24, /* Eating more msg bytes from target */
66 in_msgindone = 0x25, /* Decide what to do with what we got */
67 in_msgout = 0x26, /* Sending message to target */
68 in_msgoutdone = 0x27, /* Done sending msg out */
69 in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */
70 in_cmdend = 0x29, /* Done sending slow cmd */
71 in_status = 0x2a, /* Was in status phase, finishing cmd */
72 in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */
73 in_the_dark = 0x2c, /* Don't know what bus phase we are in */
74
75 /* Special states, ie. not normal bus transitions... */
76#define in_spec_mask 0x80
77 in_abortone = 0x80, /* Aborting one command currently */
78 in_abortall = 0x81, /* Blowing away all commands we have */
79 in_resetdev = 0x82, /* SCSI target reset in progress */
80 in_resetbus = 0x83, /* SCSI bus reset in progress */
81 in_tgterror = 0x84, /* Target did something stupid */
82};
83
84enum {
85 /* Zero has special meaning, see skipahead[12]. */
86/*0*/ do_never,
87
88/*1*/ do_phase_determine,
89/*2*/ do_reset_bus,
90/*3*/ do_reset_complete,
91/*4*/ do_work_bus,
92/*5*/ do_intr_end
93};
94
95/* The master ring of all esp hosts we are managing in this driver. */
96static struct NCR_ESP *espchain;
97int nesps = 0, esps_in_use = 0, esps_running = 0;
98EXPORT_SYMBOL(nesps);
99EXPORT_SYMBOL(esps_running);
100
101irqreturn_t esp_intr(int irq, void *dev_id);
102
103/* Debugging routines */
104static struct esp_cmdstrings {
105 unchar cmdchar;
106 char *text;
107} esp_cmd_strings[] = {
108 /* Miscellaneous */
109 { ESP_CMD_NULL, "ESP_NOP", },
110 { ESP_CMD_FLUSH, "FIFO_FLUSH", },
111 { ESP_CMD_RC, "RSTESP", },
112 { ESP_CMD_RS, "RSTSCSI", },
113 /* Disconnected State Group */
114 { ESP_CMD_RSEL, "RESLCTSEQ", },
115 { ESP_CMD_SEL, "SLCTNATN", },
116 { ESP_CMD_SELA, "SLCTATN", },
117 { ESP_CMD_SELAS, "SLCTATNSTOP", },
118 { ESP_CMD_ESEL, "ENSLCTRESEL", },
119 { ESP_CMD_DSEL, "DISSELRESEL", },
120 { ESP_CMD_SA3, "SLCTATN3", },
121 { ESP_CMD_RSEL3, "RESLCTSEQ", },
122 /* Target State Group */
123 { ESP_CMD_SMSG, "SNDMSG", },
124 { ESP_CMD_SSTAT, "SNDSTATUS", },
125 { ESP_CMD_SDATA, "SNDDATA", },
126 { ESP_CMD_DSEQ, "DISCSEQ", },
127 { ESP_CMD_TSEQ, "TERMSEQ", },
128 { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
129 { ESP_CMD_DCNCT, "DISC", },
130 { ESP_CMD_RMSG, "RCVMSG", },
131 { ESP_CMD_RCMD, "RCVCMD", },
132 { ESP_CMD_RDATA, "RCVDATA", },
133 { ESP_CMD_RCSEQ, "RCVCMDSEQ", },
134 /* Initiator State Group */
135 { ESP_CMD_TI, "TRANSINFO", },
136 { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
137 { ESP_CMD_MOK, "MSGACCEPTED", },
138 { ESP_CMD_TPAD, "TPAD", },
139 { ESP_CMD_SATN, "SATN", },
140 { ESP_CMD_RATN, "RATN", },
141};
142#define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
143
144/* Print textual representation of an ESP command */
145static inline void esp_print_cmd(unchar espcmd)
146{
147 unchar dma_bit = espcmd & ESP_CMD_DMA;
148 int i;
149
150 espcmd &= ~dma_bit;
151 for(i=0; i<NUM_ESP_COMMANDS; i++)
152 if(esp_cmd_strings[i].cmdchar == espcmd)
153 break;
154 if(i==NUM_ESP_COMMANDS)
155 printk("ESP_Unknown");
156 else
157 printk("%s%s", esp_cmd_strings[i].text,
158 ((dma_bit) ? "+DMA" : ""));
159}
160
161/* Print the status register's value */
162static inline void esp_print_statreg(unchar statreg)
163{
164 unchar phase;
165
166 printk("STATUS<");
167 phase = statreg & ESP_STAT_PMASK;
168 printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
169 (phase == ESP_DIP ? "DATA-IN" :
170 (phase == ESP_CMDP ? "COMMAND" :
171 (phase == ESP_STATP ? "STATUS" :
172 (phase == ESP_MOP ? "MSG-OUT" :
173 (phase == ESP_MIP ? "MSG_IN" :
174 "unknown")))))));
175 if(statreg & ESP_STAT_TDONE)
176 printk("TRANS_DONE,");
177 if(statreg & ESP_STAT_TCNT)
178 printk("TCOUNT_ZERO,");
179 if(statreg & ESP_STAT_PERR)
180 printk("P_ERROR,");
181 if(statreg & ESP_STAT_SPAM)
182 printk("SPAM,");
183 if(statreg & ESP_STAT_INTR)
184 printk("IRQ,");
185 printk(">");
186}
187
188/* Print the interrupt register's value */
189static inline void esp_print_ireg(unchar intreg)
190{
191 printk("INTREG< ");
192 if(intreg & ESP_INTR_S)
193 printk("SLCT_NATN ");
194 if(intreg & ESP_INTR_SATN)
195 printk("SLCT_ATN ");
196 if(intreg & ESP_INTR_RSEL)
197 printk("RSLCT ");
198 if(intreg & ESP_INTR_FDONE)
199 printk("FDONE ");
200 if(intreg & ESP_INTR_BSERV)
201 printk("BSERV ");
202 if(intreg & ESP_INTR_DC)
203 printk("DISCNCT ");
204 if(intreg & ESP_INTR_IC)
205 printk("ILL_CMD ");
206 if(intreg & ESP_INTR_SR)
207 printk("SCSI_BUS_RESET ");
208 printk(">");
209}
210
211/* Print the sequence step registers contents */
212static inline void esp_print_seqreg(unchar stepreg)
213{
214 stepreg &= ESP_STEP_VBITS;
215 printk("STEP<%s>",
216 (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
217 (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
218 (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
219 (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
220 (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
221 "UNKNOWN"))))));
222}
223
224static char *phase_string(int phase)
225{
226 switch(phase) {
227 case not_issued:
228 return "UNISSUED";
229 case in_slct_norm:
230 return "SLCTNORM";
231 case in_slct_stop:
232 return "SLCTSTOP";
233 case in_slct_msg:
234 return "SLCTMSG";
235 case in_slct_tag:
236 return "SLCTTAG";
237 case in_slct_sneg:
238 return "SLCTSNEG";
239 case in_datain:
240 return "DATAIN";
241 case in_dataout:
242 return "DATAOUT";
243 case in_data_done:
244 return "DATADONE";
245 case in_msgin:
246 return "MSGIN";
247 case in_msgincont:
248 return "MSGINCONT";
249 case in_msgindone:
250 return "MSGINDONE";
251 case in_msgout:
252 return "MSGOUT";
253 case in_msgoutdone:
254 return "MSGOUTDONE";
255 case in_cmdbegin:
256 return "CMDBEGIN";
257 case in_cmdend:
258 return "CMDEND";
259 case in_status:
260 return "STATUS";
261 case in_freeing:
262 return "FREEING";
263 case in_the_dark:
264 return "CLUELESS";
265 case in_abortone:
266 return "ABORTONE";
267 case in_abortall:
268 return "ABORTALL";
269 case in_resetdev:
270 return "RESETDEV";
271 case in_resetbus:
272 return "RESETBUS";
273 case in_tgterror:
274 return "TGTERROR";
275 default:
276 return "UNKNOWN";
277 };
278}
279
280#ifdef DEBUG_STATE_MACHINE
281static inline void esp_advance_phase(Scsi_Cmnd *s, int newphase)
282{
283 ESPLOG(("<%s>", phase_string(newphase)));
284 s->SCp.sent_command = s->SCp.phase;
285 s->SCp.phase = newphase;
286}
287#else
288#define esp_advance_phase(__s, __newphase) \
289 (__s)->SCp.sent_command = (__s)->SCp.phase; \
290 (__s)->SCp.phase = (__newphase);
291#endif
292
293#ifdef DEBUG_ESP_CMDS
294static inline void esp_cmd(struct NCR_ESP *esp, struct ESP_regs *eregs,
295 unchar cmd)
296{
297 esp->espcmdlog[esp->espcmdent] = cmd;
298 esp->espcmdent = (esp->espcmdent + 1) & 31;
299 esp_write(eregs->esp_cmnd, cmd);
300}
301#else
302#define esp_cmd(__esp, __eregs, __cmd) esp_write((__eregs)->esp_cmnd, (__cmd))
303#endif
304
305/* How we use the various Linux SCSI data structures for operation.
306 *
307 * struct scsi_cmnd:
308 *
309 * We keep track of the syncronous capabilities of a target
310 * in the device member, using sync_min_period and
311 * sync_max_offset. These are the values we directly write
312 * into the ESP registers while running a command. If offset
313 * is zero the ESP will use asynchronous transfers.
314 * If the borken flag is set we assume we shouldn't even bother
315 * trying to negotiate for synchronous transfer as this target
316 * is really stupid. If we notice the target is dropping the
317 * bus, and we have been allowing it to disconnect, we clear
318 * the disconnect flag.
319 */
320
321/* Manipulation of the ESP command queues. Thanks to the aha152x driver
322 * and its author, Juergen E. Fischer, for the methods used here.
323 * Note that these are per-ESP queues, not global queues like
324 * the aha152x driver uses.
325 */
326static inline void append_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
327{
328 Scsi_Cmnd *end;
329
330 new_SC->host_scribble = (unsigned char *) NULL;
331 if(!*SC)
332 *SC = new_SC;
333 else {
334 for(end=*SC;end->host_scribble;end=(Scsi_Cmnd *)end->host_scribble)
335 ;
336 end->host_scribble = (unsigned char *) new_SC;
337 }
338}
339
340static inline void prepend_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
341{
342 new_SC->host_scribble = (unsigned char *) *SC;
343 *SC = new_SC;
344}
345
346static inline Scsi_Cmnd *remove_first_SC(Scsi_Cmnd **SC)
347{
348 Scsi_Cmnd *ptr;
349
350 ptr = *SC;
351 if(ptr)
352 *SC = (Scsi_Cmnd *) (*SC)->host_scribble;
353 return ptr;
354}
355
356static inline Scsi_Cmnd *remove_SC(Scsi_Cmnd **SC, int target, int lun)
357{
358 Scsi_Cmnd *ptr, *prev;
359
360 for(ptr = *SC, prev = NULL;
361 ptr && ((ptr->device->id != target) || (ptr->device->lun != lun));
362 prev = ptr, ptr = (Scsi_Cmnd *) ptr->host_scribble)
363 ;
364 if(ptr) {
365 if(prev)
366 prev->host_scribble=ptr->host_scribble;
367 else
368 *SC=(Scsi_Cmnd *)ptr->host_scribble;
369 }
370 return ptr;
371}
372
373/* Resetting various pieces of the ESP scsi driver chipset */
374
375/* Reset the ESP chip, _not_ the SCSI bus. */
376static void esp_reset_esp(struct NCR_ESP *esp, struct ESP_regs *eregs)
377{
378 int family_code, version, i;
379 volatile int trash;
380
381 /* Now reset the ESP chip */
382 esp_cmd(esp, eregs, ESP_CMD_RC);
383 esp_cmd(esp, eregs, ESP_CMD_NULL | ESP_CMD_DMA);
384 if(esp->erev == fast)
385 esp_write(eregs->esp_cfg2, ESP_CONFIG2_FENAB);
386 esp_cmd(esp, eregs, ESP_CMD_NULL | ESP_CMD_DMA);
387
388 /* This is the only point at which it is reliable to read
389 * the ID-code for a fast ESP chip variant.
390 */
391 esp->max_period = ((35 * esp->ccycle) / 1000);
392 if(esp->erev == fast) {
393 char *erev2string[] = {
394 "Emulex FAS236",
395 "Emulex FPESP100A",
396 "fast",
397 "QLogic FAS366",
398 "Emulex FAS216",
399 "Symbios Logic 53CF9x-2",
400 "unknown!"
401 };
402
403 version = esp_read(eregs->esp_uid);
404 family_code = (version & 0xf8) >> 3;
405 if(family_code == 0x02) {
406 if ((version & 7) == 2)
407 esp->erev = fas216;
408 else
409 esp->erev = fas236;
410 } else if(family_code == 0x0a)
411 esp->erev = fas366; /* Version is usually '5'. */
412 else if(family_code == 0x00) {
413 if ((version & 7) == 2)
414 esp->erev = fas100a; /* NCR53C9X */
415 else
416 esp->erev = espunknown;
417 } else if(family_code == 0x14) {
418 if ((version & 7) == 2)
419 esp->erev = fsc;
420 else
421 esp->erev = espunknown;
422 } else if(family_code == 0x00) {
423 if ((version & 7) == 2)
424 esp->erev = fas100a; /* NCR53C9X */
425 else
426 esp->erev = espunknown;
427 } else
428 esp->erev = espunknown;
429 ESPLOG(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
430 esp->esp_id, erev2string[esp->erev - fas236],
431 family_code, (version & 7)));
432
433 esp->min_period = ((4 * esp->ccycle) / 1000);
434 } else {
435 esp->min_period = ((5 * esp->ccycle) / 1000);
436 }
437
438 /* Reload the configuration registers */
439 esp_write(eregs->esp_cfact, esp->cfact);
440 esp->prev_stp = 0;
441 esp_write(eregs->esp_stp, 0);
442 esp->prev_soff = 0;
443 esp_write(eregs->esp_soff, 0);
444 esp_write(eregs->esp_timeo, esp->neg_defp);
445 esp->max_period = (esp->max_period + 3)>>2;
446 esp->min_period = (esp->min_period + 3)>>2;
447
448 esp_write(eregs->esp_cfg1, esp->config1);
449 switch(esp->erev) {
450 case esp100:
451 /* nothing to do */
452 break;
453 case esp100a:
454 esp_write(eregs->esp_cfg2, esp->config2);
455 break;
456 case esp236:
457 /* Slow 236 */
458 esp_write(eregs->esp_cfg2, esp->config2);
459 esp->prev_cfg3 = esp->config3[0];
460 esp_write(eregs->esp_cfg3, esp->prev_cfg3);
461 break;
462 case fas366:
463 panic("esp: FAS366 support not present, please notify "
464 "jongk@cs.utwente.nl");
465 break;
466 case fas216:
467 case fas236:
468 case fsc:
469 /* Fast ESP variants */
470 esp_write(eregs->esp_cfg2, esp->config2);
471 for(i=0; i<8; i++)
472 esp->config3[i] |= ESP_CONFIG3_FCLK;
473 esp->prev_cfg3 = esp->config3[0];
474 esp_write(eregs->esp_cfg3, esp->prev_cfg3);
475 if(esp->diff)
476 esp->radelay = 0;
477 else
478 esp->radelay = 16;
479 /* Different timeout constant for these chips */
480 esp->neg_defp =
481 FSC_NEG_DEFP(esp->cfreq,
482 (esp->cfact == ESP_CCF_F0 ?
483 ESP_CCF_F7 + 1 : esp->cfact));
484 esp_write(eregs->esp_timeo, esp->neg_defp);
485 /* Enable Active Negotiation if possible */
486 if((esp->erev == fsc) && !esp->diff)
487 esp_write(eregs->esp_cfg4, ESP_CONFIG4_EAN);
488 break;
489 case fas100a:
490 /* Fast 100a */
491 esp_write(eregs->esp_cfg2, esp->config2);
492 for(i=0; i<8; i++)
493 esp->config3[i] |= ESP_CONFIG3_FCLOCK;
494 esp->prev_cfg3 = esp->config3[0];
495 esp_write(eregs->esp_cfg3, esp->prev_cfg3);
496 esp->radelay = 32;
497 break;
498 default:
499 panic("esp: what could it be... I wonder...");
500 break;
501 };
502
503 /* Eat any bitrot in the chip */
504 trash = esp_read(eregs->esp_intrpt);
505 udelay(100);
506}
507
508/* This places the ESP into a known state at boot time. */
509void esp_bootup_reset(struct NCR_ESP *esp, struct ESP_regs *eregs)
510{
511 volatile unchar trash;
512
513 /* Reset the DMA */
514 if(esp->dma_reset)
515 esp->dma_reset(esp);
516
517 /* Reset the ESP */
518 esp_reset_esp(esp, eregs);
519
520 /* Reset the SCSI bus, but tell ESP not to generate an irq */
521 esp_write(eregs->esp_cfg1, (esp_read(eregs->esp_cfg1) | ESP_CONFIG1_SRRDISAB));
522 esp_cmd(esp, eregs, ESP_CMD_RS);
523 udelay(400);
524 esp_write(eregs->esp_cfg1, esp->config1);
525
526 /* Eat any bitrot in the chip and we are done... */
527 trash = esp_read(eregs->esp_intrpt);
528}
529EXPORT_SYMBOL(esp_bootup_reset);
530
531/* Allocate structure and insert basic data such as SCSI chip frequency
532 * data and a pointer to the device
533 */
534struct NCR_ESP* esp_allocate(struct scsi_host_template *tpnt, void *esp_dev,
535 int hotplug)
536{
537 struct NCR_ESP *esp, *elink;
538 struct Scsi_Host *esp_host;
539
540 if (hotplug)
541 esp_host = scsi_host_alloc(tpnt, sizeof(struct NCR_ESP));
542 else
543 esp_host = scsi_register(tpnt, sizeof(struct NCR_ESP));
544 if(!esp_host)
545 panic("Cannot register ESP SCSI host");
546 esp = (struct NCR_ESP *) esp_host->hostdata;
547 if(!esp)
548 panic("No esp in hostdata");
549 esp->ehost = esp_host;
550 esp->edev = esp_dev;
551 esp->esp_id = nesps++;
552
553 /* Set bitshift value (only used on Amiga with multiple ESPs) */
554 esp->shift = 2;
555
556 /* Put into the chain of esp chips detected */
557 if(espchain) {
558 elink = espchain;
559 while(elink->next) elink = elink->next;
560 elink->next = esp;
561 } else {
562 espchain = esp;
563 }
564 esp->next = NULL;
565
566 return esp;
567}
568
569void esp_deallocate(struct NCR_ESP *esp)
570{
571 struct NCR_ESP *elink;
572
573 if(espchain == esp) {
574 espchain = NULL;
575 } else {
576 for(elink = espchain; elink && (elink->next != esp); elink = elink->next);
577 if(elink)
578 elink->next = esp->next;
579 }
580 nesps--;
581}
582
583/* Complete initialization of ESP structure and device
584 * Caller must have initialized appropriate parts of the ESP structure
585 * between the call to esp_allocate and this function.
586 */
587void esp_initialize(struct NCR_ESP *esp)
588{
589 struct ESP_regs *eregs = esp->eregs;
590 unsigned int fmhz;
591 unchar ccf;
592 int i;
593
594 /* Check out the clock properties of the chip. */
595
596 /* This is getting messy but it has to be done
597 * correctly or else you get weird behavior all
598 * over the place. We are trying to basically
599 * figure out three pieces of information.
600 *
601 * a) Clock Conversion Factor
602 *
603 * This is a representation of the input
604 * crystal clock frequency going into the
605 * ESP on this machine. Any operation whose
606 * timing is longer than 400ns depends on this
607 * value being correct. For example, you'll
608 * get blips for arbitration/selection during
609 * high load or with multiple targets if this
610 * is not set correctly.
611 *
612 * b) Selection Time-Out
613 *
614 * The ESP isn't very bright and will arbitrate
615 * for the bus and try to select a target
616 * forever if you let it. This value tells
617 * the ESP when it has taken too long to
618 * negotiate and that it should interrupt
619 * the CPU so we can see what happened.
620 * The value is computed as follows (from
621 * NCR/Symbios chip docs).
622 *
623 * (Time Out Period) * (Input Clock)
624 * STO = ----------------------------------
625 * (8192) * (Clock Conversion Factor)
626 *
627 * You usually want the time out period to be
628 * around 250ms, I think we'll set it a little
629 * bit higher to account for fully loaded SCSI
630 * bus's and slow devices that don't respond so
631 * quickly to selection attempts. (yeah, I know
632 * this is out of spec. but there is a lot of
633 * buggy pieces of firmware out there so bite me)
634 *
635 * c) Imperical constants for synchronous offset
636 * and transfer period register values
637 *
638 * This entails the smallest and largest sync
639 * period we could ever handle on this ESP.
640 */
641
642 fmhz = esp->cfreq;
643
644 if(fmhz <= (5000000))
645 ccf = 0;
646 else
647 ccf = (((5000000 - 1) + (fmhz))/(5000000));
648 if(!ccf || ccf > 8) {
649 /* If we can't find anything reasonable,
650 * just assume 20MHZ. This is the clock
651 * frequency of the older sun4c's where I've
652 * been unable to find the clock-frequency
653 * PROM property. All other machines provide
654 * useful values it seems.
655 */
656 ccf = ESP_CCF_F4;
657 fmhz = (20000000);
658 }
659 if(ccf==(ESP_CCF_F7+1))
660 esp->cfact = ESP_CCF_F0;
661 else if(ccf == ESP_CCF_NEVER)
662 esp->cfact = ESP_CCF_F2;
663 else
664 esp->cfact = ccf;
665 esp->cfreq = fmhz;
666 esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
667 esp->ctick = ESP_TICK(ccf, esp->ccycle);
668 esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
669 esp->sync_defp = SYNC_DEFP_SLOW;
670
671 printk("SCSI ID %d Clk %dMHz CCF=%d TOut %d ",
672 esp->scsi_id, (esp->cfreq / 1000000),
673 ccf, (int) esp->neg_defp);
674
675 /* Fill in ehost data */
676 esp->ehost->base = (unsigned long)eregs;
677 esp->ehost->this_id = esp->scsi_id;
678 esp->ehost->irq = esp->irq;
679
680 /* SCSI id mask */
681 esp->scsi_id_mask = (1 << esp->scsi_id);
682
683 /* Probe the revision of this esp */
684 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
685 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
686 esp_write(eregs->esp_cfg2, esp->config2);
687 if((esp_read(eregs->esp_cfg2) & ~(ESP_CONFIG2_MAGIC)) !=
688 (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
689 printk("NCR53C90(esp100)\n");
690 esp->erev = esp100;
691 } else {
692 esp->config2 = 0;
693 esp_write(eregs->esp_cfg2, 0);
694 esp_write(eregs->esp_cfg3, 5);
695 if(esp_read(eregs->esp_cfg3) != 5) {
696 printk("NCR53C90A(esp100a)\n");
697 esp->erev = esp100a;
698 } else {
699 int target;
700
701 for(target=0; target<8; target++)
702 esp->config3[target] = 0;
703 esp->prev_cfg3 = 0;
704 esp_write(eregs->esp_cfg3, 0);
705 if(ccf > ESP_CCF_F5) {
706 printk("NCR53C9XF(espfast)\n");
707 esp->erev = fast;
708 esp->sync_defp = SYNC_DEFP_FAST;
709 } else {
710 printk("NCR53C9x(esp236)\n");
711 esp->erev = esp236;
712 }
713 }
714 }
715
716 /* Initialize the command queues */
717 esp->current_SC = NULL;
718 esp->disconnected_SC = NULL;
719 esp->issue_SC = NULL;
720
721 /* Clear the state machines. */
722 esp->targets_present = 0;
723 esp->resetting_bus = 0;
724 esp->snip = 0;
725
726 init_waitqueue_head(&esp->reset_queue);
727
728 esp->fas_premature_intr_workaround = 0;
729 for(i = 0; i < 32; i++)
730 esp->espcmdlog[i] = 0;
731 esp->espcmdent = 0;
732 for(i = 0; i < 16; i++) {
733 esp->cur_msgout[i] = 0;
734 esp->cur_msgin[i] = 0;
735 }
736 esp->prevmsgout = esp->prevmsgin = 0;
737 esp->msgout_len = esp->msgin_len = 0;
738
739 /* Clear the one behind caches to hold unmatchable values. */
740 esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff;
741
742 /* Reset the thing before we try anything... */
743 esp_bootup_reset(esp, eregs);
744
745 esps_in_use++;
746}
747
748/* The info function will return whatever useful
749 * information the developer sees fit. If not provided, then
750 * the name field will be used instead.
751 */
752const char *esp_info(struct Scsi_Host *host)
753{
754 struct NCR_ESP *esp;
755
756 esp = (struct NCR_ESP *) host->hostdata;
757 switch(esp->erev) {
758 case esp100:
759 return "ESP100 (NCR53C90)";
760 case esp100a:
761 return "ESP100A (NCR53C90A)";
762 case esp236:
763 return "ESP236 (NCR53C9x)";
764 case fas216:
765 return "Emulex FAS216";
766 case fas236:
767 return "Emulex FAS236";
768 case fas366:
769 return "QLogic FAS366";
770 case fas100a:
771 return "FPESP100A";
772 case fsc:
773 return "Symbios Logic 53CF9x-2";
774 default:
775 panic("Bogon ESP revision");
776 };
777}
778EXPORT_SYMBOL(esp_info);
779
780/* From Wolfgang Stanglmeier's NCR scsi driver. */
781struct info_str
782{
783 char *buffer;
784 int length;
785 int offset;
786 int pos;
787};
788
789static void copy_mem_info(struct info_str *info, char *data, int len)
790{
791 if (info->pos + len > info->length)
792 len = info->length - info->pos;
793
794 if (info->pos + len < info->offset) {
795 info->pos += len;
796 return;
797 }
798 if (info->pos < info->offset) {
799 data += (info->offset - info->pos);
800 len -= (info->offset - info->pos);
801 }
802
803 if (len > 0) {
804 memcpy(info->buffer + info->pos, data, len);
805 info->pos += len;
806 }
807}
808
809static int copy_info(struct info_str *info, char *fmt, ...)
810{
811 va_list args;
812 char buf[81];
813 int len;
814
815 va_start(args, fmt);
816 len = vsprintf(buf, fmt, args);
817 va_end(args);
818
819 copy_mem_info(info, buf, len);
820 return len;
821}
822
823static int esp_host_info(struct NCR_ESP *esp, char *ptr, off_t offset, int len)
824{
825 struct scsi_device *sdev;
826 struct info_str info;
827 int i;
828
829 info.buffer = ptr;
830 info.length = len;
831 info.offset = offset;
832 info.pos = 0;
833
834 copy_info(&info, "ESP Host Adapter:\n");
835 copy_info(&info, "\tESP Model\t\t");
836 switch(esp->erev) {
837 case esp100:
838 copy_info(&info, "ESP100 (NCR53C90)\n");
839 break;
840 case esp100a:
841 copy_info(&info, "ESP100A (NCR53C90A)\n");
842 break;
843 case esp236:
844 copy_info(&info, "ESP236 (NCR53C9x)\n");
845 break;
846 case fas216:
847 copy_info(&info, "Emulex FAS216\n");
848 break;
849 case fas236:
850 copy_info(&info, "Emulex FAS236\n");
851 break;
852 case fas100a:
853 copy_info(&info, "FPESP100A\n");
854 break;
855 case fast:
856 copy_info(&info, "Generic FAST\n");
857 break;
858 case fas366:
859 copy_info(&info, "QLogic FAS366\n");
860 break;
861 case fsc:
862 copy_info(&info, "Symbios Logic 53C9x-2\n");
863 break;
864 case espunknown:
865 default:
866 copy_info(&info, "Unknown!\n");
867 break;
868 };
869 copy_info(&info, "\tLive Targets\t\t[ ");
870 for(i = 0; i < 15; i++) {
871 if(esp->targets_present & (1 << i))
872 copy_info(&info, "%d ", i);
873 }
874 copy_info(&info, "]\n\n");
875
876 /* Now describe the state of each existing target. */
877 copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\n");
878
879 shost_for_each_device(sdev, esp->ehost) {
880 struct esp_device *esp_dev = sdev->hostdata;
881 uint id = sdev->id;
882
883 if (!(esp->targets_present & (1 << id)))
884 continue;
885
886 copy_info(&info, "%d\t\t", id);
887 copy_info(&info, "%08lx\t", esp->config3[id]);
888 copy_info(&info, "[%02lx,%02lx]\t\t\t",
889 esp_dev->sync_max_offset,
890 esp_dev->sync_min_period);
891 copy_info(&info, "%s\n", esp_dev->disconnect ? "yes" : "no");
892 }
893
894 return info.pos > info.offset? info.pos - info.offset : 0;
895}
896
897/* ESP proc filesystem code. */
898int esp_proc_info(struct Scsi_Host *shost, char *buffer, char **start, off_t offset, int length,
899 int inout)
900{
901 struct NCR_ESP *esp = (struct NCR_ESP *)shost->hostdata;
902
903 if(inout)
904 return -EINVAL; /* not yet */
905 if(start)
906 *start = buffer;
907 return esp_host_info(esp, buffer, offset, length);
908}
909EXPORT_SYMBOL(esp_proc_info);
910
911static void esp_get_dmabufs(struct NCR_ESP *esp, Scsi_Cmnd *sp)
912{
913 if(sp->use_sg == 0) {
914 sp->SCp.this_residual = sp->request_bufflen;
915 sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
916 sp->SCp.buffers_residual = 0;
917 if (esp->dma_mmu_get_scsi_one)
918 esp->dma_mmu_get_scsi_one(esp, sp);
919 else
920 sp->SCp.ptr =
921 (char *) virt_to_phys(sp->request_buffer);
922 } else {
923 sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
924 sp->SCp.buffers_residual = sp->use_sg - 1;
925 sp->SCp.this_residual = sp->SCp.buffer->length;
926 if (esp->dma_mmu_get_scsi_sgl)
927 esp->dma_mmu_get_scsi_sgl(esp, sp);
928 else
929 sp->SCp.ptr =
930 (char *) virt_to_phys(sg_virt(sp->SCp.buffer));
931 }
932}
933
934static void esp_release_dmabufs(struct NCR_ESP *esp, Scsi_Cmnd *sp)
935{
936 if(sp->use_sg == 0) {
937 if (esp->dma_mmu_release_scsi_one)
938 esp->dma_mmu_release_scsi_one(esp, sp);
939 } else {
940 if (esp->dma_mmu_release_scsi_sgl)
941 esp->dma_mmu_release_scsi_sgl(esp, sp);
942 }
943}
944
945static void esp_restore_pointers(struct NCR_ESP *esp, Scsi_Cmnd *sp)
946{
947 struct esp_pointers *ep = &esp->data_pointers[scmd_id(sp)];
948
949 sp->SCp.ptr = ep->saved_ptr;
950 sp->SCp.buffer = ep->saved_buffer;
951 sp->SCp.this_residual = ep->saved_this_residual;
952 sp->SCp.buffers_residual = ep->saved_buffers_residual;
953}
954
955static void esp_save_pointers(struct NCR_ESP *esp, Scsi_Cmnd *sp)
956{
957 struct esp_pointers *ep = &esp->data_pointers[scmd_id(sp)];
958
959 ep->saved_ptr = sp->SCp.ptr;
960 ep->saved_buffer = sp->SCp.buffer;
961 ep->saved_this_residual = sp->SCp.this_residual;
962 ep->saved_buffers_residual = sp->SCp.buffers_residual;
963}
964
965/* Some rules:
966 *
967 * 1) Never ever panic while something is live on the bus.
968 * If there is to be any chance of syncing the disks this
969 * rule is to be obeyed.
970 *
971 * 2) Any target that causes a foul condition will no longer
972 * have synchronous transfers done to it, no questions
973 * asked.
974 *
975 * 3) Keep register accesses to a minimum. Think about some
976 * day when we have Xbus machines this is running on and
977 * the ESP chip is on the other end of the machine on a
978 * different board from the cpu where this is running.
979 */
980
981/* Fire off a command. We assume the bus is free and that the only
982 * case where we could see an interrupt is where we have disconnected
983 * commands active and they are trying to reselect us.
984 */
985static inline void esp_check_cmd(struct NCR_ESP *esp, Scsi_Cmnd *sp)
986{
987 switch(sp->cmd_len) {
988 case 6:
989 case 10:
990 case 12:
991 esp->esp_slowcmd = 0;
992 break;
993
994 default:
995 esp->esp_slowcmd = 1;
996 esp->esp_scmdleft = sp->cmd_len;
997 esp->esp_scmdp = &sp->cmnd[0];
998 break;
999 };
1000}
1001
1002static inline void build_sync_nego_msg(struct NCR_ESP *esp, int period, int offset)
1003{
1004 esp->cur_msgout[0] = EXTENDED_MESSAGE;
1005 esp->cur_msgout[1] = 3;
1006 esp->cur_msgout[2] = EXTENDED_SDTR;
1007 esp->cur_msgout[3] = period;
1008 esp->cur_msgout[4] = offset;
1009 esp->msgout_len = 5;
1010}
1011
1012static void esp_exec_cmd(struct NCR_ESP *esp)
1013{
1014 struct ESP_regs *eregs = esp->eregs;
1015 struct esp_device *esp_dev;
1016 Scsi_Cmnd *SCptr;
1017 struct scsi_device *SDptr;
1018 volatile unchar *cmdp = esp->esp_command;
1019 unsigned char the_esp_command;
1020 int lun, target;
1021 int i;
1022
1023 /* Hold off if we have disconnected commands and
1024 * an IRQ is showing...
1025 */
1026 if(esp->disconnected_SC && esp->dma_irq_p(esp))
1027 return;
1028
1029 /* Grab first member of the issue queue. */
1030 SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);
1031
1032 /* Safe to panic here because current_SC is null. */
1033 if(!SCptr)
1034 panic("esp: esp_exec_cmd and issue queue is NULL");
1035
1036 SDptr = SCptr->device;
1037 esp_dev = SDptr->hostdata;
1038 lun = SCptr->device->lun;
1039 target = SCptr->device->id;
1040
1041 esp->snip = 0;
1042 esp->msgout_len = 0;
1043
1044 /* Send it out whole, or piece by piece? The ESP
1045 * only knows how to automatically send out 6, 10,
1046 * and 12 byte commands. I used to think that the
1047 * Linux SCSI code would never throw anything other
1048 * than that to us, but then again there is the
1049 * SCSI generic driver which can send us anything.
1050 */
1051 esp_check_cmd(esp, SCptr);
1052
1053 /* If arbitration/selection is successful, the ESP will leave
1054 * ATN asserted, causing the target to go into message out
1055 * phase. The ESP will feed the target the identify and then
1056 * the target can only legally go to one of command,
1057 * datain/out, status, or message in phase, or stay in message
1058 * out phase (should we be trying to send a sync negotiation
1059 * message after the identify). It is not allowed to drop
1060 * BSY, but some buggy targets do and we check for this
1061 * condition in the selection complete code. Most of the time
1062 * we'll make the command bytes available to the ESP and it
1063 * will not interrupt us until it finishes command phase, we
1064 * cannot do this for command sizes the ESP does not
1065 * understand and in this case we'll get interrupted right
1066 * when the target goes into command phase.
1067 *
1068 * It is absolutely _illegal_ in the presence of SCSI-2 devices
1069 * to use the ESP select w/o ATN command. When SCSI-2 devices are
1070 * present on the bus we _must_ always go straight to message out
1071 * phase with an identify message for the target. Being that
1072 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
1073 * selections should not confuse SCSI-1 we hope.
1074 */
1075
1076 if(esp_dev->sync) {
1077 /* this targets sync is known */
1078#ifdef CONFIG_SCSI_MAC_ESP
1079do_sync_known:
1080#endif
1081 if(esp_dev->disconnect)
1082 *cmdp++ = IDENTIFY(1, lun);
1083 else
1084 *cmdp++ = IDENTIFY(0, lun);
1085
1086 if(esp->esp_slowcmd) {
1087 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1088 esp_advance_phase(SCptr, in_slct_stop);
1089 } else {
1090 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1091 esp_advance_phase(SCptr, in_slct_norm);
1092 }
1093 } else if(!(esp->targets_present & (1<<target)) || !(esp_dev->disconnect)) {
1094 /* After the bootup SCSI code sends both the
1095 * TEST_UNIT_READY and INQUIRY commands we want
1096 * to at least attempt allowing the device to
1097 * disconnect.
1098 */
1099 ESPMISC(("esp: Selecting device for first time. target=%d "
1100 "lun=%d\n", target, SCptr->device->lun));
1101 if(!SDptr->borken && !esp_dev->disconnect)
1102 esp_dev->disconnect = 1;
1103
1104 *cmdp++ = IDENTIFY(0, lun);
1105 esp->prevmsgout = NOP;
1106 esp_advance_phase(SCptr, in_slct_norm);
1107 the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1108
1109 /* Take no chances... */
1110 esp_dev->sync_max_offset = 0;
1111 esp_dev->sync_min_period = 0;
1112 } else {
1113 int toshiba_cdrom_hwbug_wkaround = 0;
1114
1115#ifdef CONFIG_SCSI_MAC_ESP
1116 /* Never allow synchronous transfers (disconnect OK) on
1117 * Macintosh. Well, maybe later when we figured out how to
1118 * do DMA on the machines that support it ...
1119 */
1120 esp_dev->disconnect = 1;
1121 esp_dev->sync_max_offset = 0;
1122 esp_dev->sync_min_period = 0;
1123 esp_dev->sync = 1;
1124 esp->snip = 0;
1125 goto do_sync_known;
1126#endif
1127 /* We've talked to this guy before,
1128 * but never negotiated. Let's try
1129 * sync negotiation.
1130 */
1131 if(!SDptr->borken) {
1132 if((SDptr->type == TYPE_ROM) &&
1133 (!strncmp(SDptr->vendor, "TOSHIBA", 7))) {
1134 /* Nice try sucker... */
1135 ESPMISC(("esp%d: Disabling sync for buggy "
1136 "Toshiba CDROM.\n", esp->esp_id));
1137 toshiba_cdrom_hwbug_wkaround = 1;
1138 build_sync_nego_msg(esp, 0, 0);
1139 } else {
1140 build_sync_nego_msg(esp, esp->sync_defp, 15);
1141 }
1142 } else {
1143 build_sync_nego_msg(esp, 0, 0);
1144 }
1145 esp_dev->sync = 1;
1146 esp->snip = 1;
1147
1148 /* A fix for broken SCSI1 targets, when they disconnect
1149 * they lock up the bus and confuse ESP. So disallow
1150 * disconnects for SCSI1 targets for now until we
1151 * find a better fix.
1152 *
1153 * Addendum: This is funny, I figured out what was going
1154 * on. The blotzed SCSI1 target would disconnect,
1155 * one of the other SCSI2 targets or both would be
1156 * disconnected as well. The SCSI1 target would
1157 * stay disconnected long enough that we start
1158 * up a command on one of the SCSI2 targets. As
1159 * the ESP is arbitrating for the bus the SCSI1
1160 * target begins to arbitrate as well to reselect
1161 * the ESP. The SCSI1 target refuses to drop it's
1162 * ID bit on the data bus even though the ESP is
1163 * at ID 7 and is the obvious winner for any
1164 * arbitration. The ESP is a poor sport and refuses
1165 * to lose arbitration, it will continue indefinitely
1166 * trying to arbitrate for the bus and can only be
1167 * stopped via a chip reset or SCSI bus reset.
1168 * Therefore _no_ disconnects for SCSI1 targets
1169 * thank you very much. ;-)
1170 */
1171 if(((SDptr->scsi_level < 3) && (SDptr->type != TYPE_TAPE)) ||
1172 toshiba_cdrom_hwbug_wkaround || SDptr->borken) {
1173 ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
1174 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
1175 esp_dev->disconnect = 0;
1176 *cmdp++ = IDENTIFY(0, lun);
1177 } else {
1178 *cmdp++ = IDENTIFY(1, lun);
1179 }
1180
1181 /* ESP fifo is only so big...
1182 * Make this look like a slow command.
1183 */
1184 esp->esp_slowcmd = 1;
1185 esp->esp_scmdleft = SCptr->cmd_len;
1186 esp->esp_scmdp = &SCptr->cmnd[0];
1187
1188 the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1189 esp_advance_phase(SCptr, in_slct_msg);
1190 }
1191
1192 if(!esp->esp_slowcmd)
1193 for(i = 0; i < SCptr->cmd_len; i++)
1194 *cmdp++ = SCptr->cmnd[i];
1195
1196 esp_write(eregs->esp_busid, (target & 7));
1197 if (esp->prev_soff != esp_dev->sync_max_offset ||
1198 esp->prev_stp != esp_dev->sync_min_period ||
1199 (esp->erev > esp100a &&
1200 esp->prev_cfg3 != esp->config3[target])) {
1201 esp->prev_soff = esp_dev->sync_max_offset;
1202 esp_write(eregs->esp_soff, esp->prev_soff);
1203 esp->prev_stp = esp_dev->sync_min_period;
1204 esp_write(eregs->esp_stp, esp->prev_stp);
1205 if(esp->erev > esp100a) {
1206 esp->prev_cfg3 = esp->config3[target];
1207 esp_write(eregs->esp_cfg3, esp->prev_cfg3);
1208 }
1209 }
1210 i = (cmdp - esp->esp_command);
1211
1212 /* Set up the DMA and ESP counters */
1213 if(esp->do_pio_cmds){
1214 int j = 0;
1215
1216 /*
1217 * XXX MSch:
1218 *
1219 * It seems this is required, at least to clean up
1220 * after failed commands when using PIO mode ...
1221 */
1222 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
1223
1224 for(;j<i;j++)
1225 esp_write(eregs->esp_fdata, esp->esp_command[j]);
1226 the_esp_command &= ~ESP_CMD_DMA;
1227
1228 /* Tell ESP to "go". */
1229 esp_cmd(esp, eregs, the_esp_command);
1230 } else {
1231 /* Set up the ESP counters */
1232 esp_write(eregs->esp_tclow, i);
1233 esp_write(eregs->esp_tcmed, 0);
1234 esp->dma_init_write(esp, esp->esp_command_dvma, i);
1235
1236 /* Tell ESP to "go". */
1237 esp_cmd(esp, eregs, the_esp_command);
1238 }
1239}
1240
1241/* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
1242int esp_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
1243{
1244 struct NCR_ESP *esp;
1245
1246 /* Set up func ptr and initial driver cmd-phase. */
1247 SCpnt->scsi_done = done;
1248 SCpnt->SCp.phase = not_issued;
1249
1250 esp = (struct NCR_ESP *) SCpnt->device->host->hostdata;
1251
1252 if(esp->dma_led_on)
1253 esp->dma_led_on(esp);
1254
1255 /* We use the scratch area. */
1256 ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->device->id, SCpnt->lun));
1257 ESPDISC(("N<%02x,%02x>", SCpnt->device->id, SCpnt->lun));
1258
1259 esp_get_dmabufs(esp, SCpnt);
1260 esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */
1261
1262 SCpnt->SCp.Status = CHECK_CONDITION;
1263 SCpnt->SCp.Message = 0xff;
1264 SCpnt->SCp.sent_command = 0;
1265
1266 /* Place into our queue. */
1267 if(SCpnt->cmnd[0] == REQUEST_SENSE) {
1268 ESPQUEUE(("RQSENSE\n"));
1269 prepend_SC(&esp->issue_SC, SCpnt);
1270 } else {
1271 ESPQUEUE(("\n"));
1272 append_SC(&esp->issue_SC, SCpnt);
1273 }
1274
1275 /* Run it now if we can. */
1276 if(!esp->current_SC && !esp->resetting_bus)
1277 esp_exec_cmd(esp);
1278
1279 return 0;
1280}
1281
1282/* Dump driver state. */
1283static void esp_dump_cmd(Scsi_Cmnd *SCptr)
1284{
1285 ESPLOG(("[tgt<%02x> lun<%02x> "
1286 "pphase<%s> cphase<%s>]",
1287 SCptr->device->id, SCptr->device->lun,
1288 phase_string(SCptr->SCp.sent_command),
1289 phase_string(SCptr->SCp.phase)));
1290}
1291
1292static void esp_dump_state(struct NCR_ESP *esp,
1293 struct ESP_regs *eregs)
1294{
1295 Scsi_Cmnd *SCptr = esp->current_SC;
1296#ifdef DEBUG_ESP_CMDS
1297 int i;
1298#endif
1299
1300 ESPLOG(("esp%d: dumping state\n", esp->esp_id));
1301
1302 /* Print DMA status */
1303 esp->dma_dump_state(esp);
1304
1305 ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1306 esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
1307 ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1308 esp->esp_id, esp_read(eregs->esp_status), esp_read(eregs->esp_sstep),
1309 esp_read(eregs->esp_intrpt)));
1310#ifdef DEBUG_ESP_CMDS
1311 printk("esp%d: last ESP cmds [", esp->esp_id);
1312 i = (esp->espcmdent - 1) & 31;
1313 printk("<");
1314 esp_print_cmd(esp->espcmdlog[i]);
1315 printk(">");
1316 i = (i - 1) & 31;
1317 printk("<");
1318 esp_print_cmd(esp->espcmdlog[i]);
1319 printk(">");
1320 i = (i - 1) & 31;
1321 printk("<");
1322 esp_print_cmd(esp->espcmdlog[i]);
1323 printk(">");
1324 i = (i - 1) & 31;
1325 printk("<");
1326 esp_print_cmd(esp->espcmdlog[i]);
1327 printk(">");
1328 printk("]\n");
1329#endif /* (DEBUG_ESP_CMDS) */
1330
1331 if(SCptr) {
1332 ESPLOG(("esp%d: current command ", esp->esp_id));
1333 esp_dump_cmd(SCptr);
1334 }
1335 ESPLOG(("\n"));
1336 SCptr = esp->disconnected_SC;
1337 ESPLOG(("esp%d: disconnected ", esp->esp_id));
1338 while(SCptr) {
1339 esp_dump_cmd(SCptr);
1340 SCptr = (Scsi_Cmnd *) SCptr->host_scribble;
1341 }
1342 ESPLOG(("\n"));
1343}
1344
1345/* Abort a command. The host_lock is acquired by caller. */
1346int esp_abort(Scsi_Cmnd *SCptr)
1347{
1348 struct NCR_ESP *esp = (struct NCR_ESP *) SCptr->device->host->hostdata;
1349 struct ESP_regs *eregs = esp->eregs;
1350 int don;
1351
1352 ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
1353 esp_dump_state(esp, eregs);
1354
1355 /* Wheee, if this is the current command on the bus, the
1356 * best we can do is assert ATN and wait for msgout phase.
1357 * This should even fix a hung SCSI bus when we lose state
1358 * in the driver and timeout because the eventual phase change
1359 * will cause the ESP to (eventually) give an interrupt.
1360 */
1361 if(esp->current_SC == SCptr) {
1362 esp->cur_msgout[0] = ABORT;
1363 esp->msgout_len = 1;
1364 esp->msgout_ctr = 0;
1365 esp_cmd(esp, eregs, ESP_CMD_SATN);
1366 return SUCCESS;
1367 }
1368
1369 /* If it is still in the issue queue then we can safely
1370 * call the completion routine and report abort success.
1371 */
1372 don = esp->dma_ports_p(esp);
1373 if(don) {
1374 esp->dma_ints_off(esp);
1375 synchronize_irq(esp->irq);
1376 }
1377 if(esp->issue_SC) {
1378 Scsi_Cmnd **prev, *this;
1379 for(prev = (&esp->issue_SC), this = esp->issue_SC;
1380 this;
1381 prev = (Scsi_Cmnd **) &(this->host_scribble),
1382 this = (Scsi_Cmnd *) this->host_scribble) {
1383 if(this == SCptr) {
1384 *prev = (Scsi_Cmnd *) this->host_scribble;
1385 this->host_scribble = NULL;
1386 esp_release_dmabufs(esp, this);
1387 this->result = DID_ABORT << 16;
1388 this->scsi_done(this);
1389 if(don)
1390 esp->dma_ints_on(esp);
1391 return SUCCESS;
1392 }
1393 }
1394 }
1395
1396 /* Yuck, the command to abort is disconnected, it is not
1397 * worth trying to abort it now if something else is live
1398 * on the bus at this time. So, we let the SCSI code wait
1399 * a little bit and try again later.
1400 */
1401 if(esp->current_SC) {
1402 if(don)
1403 esp->dma_ints_on(esp);
1404 return FAILED;
1405 }
1406
1407 /* It's disconnected, we have to reconnect to re-establish
1408 * the nexus and tell the device to abort. However, we really
1409 * cannot 'reconnect' per se. Don't try to be fancy, just
1410 * indicate failure, which causes our caller to reset the whole
1411 * bus.
1412 */
1413
1414 if(don)
1415 esp->dma_ints_on(esp);
1416 return FAILED;
1417}
1418
1419/* We've sent ESP_CMD_RS to the ESP, the interrupt had just
1420 * arrived indicating the end of the SCSI bus reset. Our job
1421 * is to clean out the command queues and begin re-execution
1422 * of SCSI commands once more.
1423 */
1424static int esp_finish_reset(struct NCR_ESP *esp,
1425 struct ESP_regs *eregs)
1426{
1427 Scsi_Cmnd *sp = esp->current_SC;
1428
1429 /* Clean up currently executing command, if any. */
1430 if (sp != NULL) {
1431 esp_release_dmabufs(esp, sp);
1432 sp->result = (DID_RESET << 16);
1433 sp->scsi_done(sp);
1434 esp->current_SC = NULL;
1435 }
1436
1437 /* Clean up disconnected queue, they have been invalidated
1438 * by the bus reset.
1439 */
1440 if (esp->disconnected_SC) {
1441 while((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) {
1442 esp_release_dmabufs(esp, sp);
1443 sp->result = (DID_RESET << 16);
1444 sp->scsi_done(sp);
1445 }
1446 }
1447
1448 /* SCSI bus reset is complete. */
1449 esp->resetting_bus = 0;
1450 wake_up(&esp->reset_queue);
1451
1452 /* Ok, now it is safe to get commands going once more. */
1453 if(esp->issue_SC)
1454 esp_exec_cmd(esp);
1455
1456 return do_intr_end;
1457}
1458
1459static int esp_do_resetbus(struct NCR_ESP *esp,
1460 struct ESP_regs *eregs)
1461{
1462 ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
1463 esp->resetting_bus = 1;
1464 esp_cmd(esp, eregs, ESP_CMD_RS);
1465
1466 return do_intr_end;
1467}
1468
1469/* Reset ESP chip, reset hanging bus, then kill active and
1470 * disconnected commands for targets without soft reset.
1471 *
1472 * The host_lock is acquired by caller.
1473 */
1474int esp_reset(Scsi_Cmnd *SCptr)
1475{
1476 struct NCR_ESP *esp = (struct NCR_ESP *) SCptr->device->host->hostdata;
1477
1478 spin_lock_irq(esp->ehost->host_lock);
1479 (void) esp_do_resetbus(esp, esp->eregs);
1480 spin_unlock_irq(esp->ehost->host_lock);
1481
1482 wait_event(esp->reset_queue, (esp->resetting_bus == 0));
1483
1484 return SUCCESS;
1485}
1486
1487/* Internal ESP done function. */
1488static void esp_done(struct NCR_ESP *esp, int error)
1489{
1490 Scsi_Cmnd *done_SC;
1491
1492 if(esp->current_SC) {
1493 done_SC = esp->current_SC;
1494 esp->current_SC = NULL;
1495 esp_release_dmabufs(esp, done_SC);
1496 done_SC->result = error;
1497 done_SC->scsi_done(done_SC);
1498
1499 /* Bus is free, issue any commands in the queue. */
1500 if(esp->issue_SC && !esp->current_SC)
1501 esp_exec_cmd(esp);
1502 } else {
1503 /* Panic is safe as current_SC is null so we may still
1504 * be able to accept more commands to sync disk buffers.
1505 */
1506 ESPLOG(("panicing\n"));
1507 panic("esp: done() called with NULL esp->current_SC");
1508 }
1509}
1510
1511/* Wheee, ESP interrupt engine. */
1512
1513/* Forward declarations. */
1514static int esp_do_phase_determine(struct NCR_ESP *esp,
1515 struct ESP_regs *eregs);
1516static int esp_do_data_finale(struct NCR_ESP *esp, struct ESP_regs *eregs);
1517static int esp_select_complete(struct NCR_ESP *esp, struct ESP_regs *eregs);
1518static int esp_do_status(struct NCR_ESP *esp, struct ESP_regs *eregs);
1519static int esp_do_msgin(struct NCR_ESP *esp, struct ESP_regs *eregs);
1520static int esp_do_msgindone(struct NCR_ESP *esp, struct ESP_regs *eregs);
1521static int esp_do_msgout(struct NCR_ESP *esp, struct ESP_regs *eregs);
1522static int esp_do_cmdbegin(struct NCR_ESP *esp, struct ESP_regs *eregs);
1523
1524#define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
1525#define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
1526
1527/* We try to avoid some interrupts by jumping ahead and see if the ESP
1528 * has gotten far enough yet. Hence the following.
1529 */
1530static inline int skipahead1(struct NCR_ESP *esp, struct ESP_regs *eregs,
1531 Scsi_Cmnd *scp, int prev_phase, int new_phase)
1532{
1533 if(scp->SCp.sent_command != prev_phase)
1534 return 0;
1535
1536 if(esp->dma_irq_p(esp)) {
1537 /* Yes, we are able to save an interrupt. */
1538 esp->sreg = (esp_read(eregs->esp_status) & ~(ESP_STAT_INTR));
1539 esp->ireg = esp_read(eregs->esp_intrpt);
1540 if(!(esp->ireg & ESP_INTR_SR))
1541 return 0;
1542 else
1543 return do_reset_complete;
1544 }
1545 /* Ho hum, target is taking forever... */
1546 scp->SCp.sent_command = new_phase; /* so we don't recurse... */
1547 return do_intr_end;
1548}
1549
1550static inline int skipahead2(struct NCR_ESP *esp,
1551 struct ESP_regs *eregs,
1552 Scsi_Cmnd *scp, int prev_phase1, int prev_phase2,
1553 int new_phase)
1554{
1555 if(scp->SCp.sent_command != prev_phase1 &&
1556 scp->SCp.sent_command != prev_phase2)
1557 return 0;
1558 if(esp->dma_irq_p(esp)) {
1559 /* Yes, we are able to save an interrupt. */
1560 esp->sreg = (esp_read(eregs->esp_status) & ~(ESP_STAT_INTR));
1561 esp->ireg = esp_read(eregs->esp_intrpt);
1562 if(!(esp->ireg & ESP_INTR_SR))
1563 return 0;
1564 else
1565 return do_reset_complete;
1566 }
1567 /* Ho hum, target is taking forever... */
1568 scp->SCp.sent_command = new_phase; /* so we don't recurse... */
1569 return do_intr_end;
1570}
1571
1572/* Misc. esp helper macros. */
1573#define esp_setcount(__eregs, __cnt) \
1574 esp_write((__eregs)->esp_tclow, ((__cnt) & 0xff)); \
1575 esp_write((__eregs)->esp_tcmed, (((__cnt) >> 8) & 0xff))
1576
1577#define esp_getcount(__eregs) \
1578 ((esp_read((__eregs)->esp_tclow)&0xff) | \
1579 ((esp_read((__eregs)->esp_tcmed)&0xff) << 8))
1580
1581#define fcount(__esp, __eregs) \
1582 (esp_read((__eregs)->esp_fflags) & ESP_FF_FBYTES)
1583
1584#define fnzero(__esp, __eregs) \
1585 (esp_read((__eregs)->esp_fflags) & ESP_FF_ONOTZERO)
1586
1587/* XXX speculative nops unnecessary when continuing amidst a data phase
1588 * XXX even on esp100!!! another case of flooding the bus with I/O reg
1589 * XXX writes...
1590 */
1591#define esp_maybe_nop(__esp, __eregs) \
1592 if((__esp)->erev == esp100) \
1593 esp_cmd((__esp), (__eregs), ESP_CMD_NULL)
1594
1595#define sreg_to_dataphase(__sreg) \
1596 ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
1597
1598/* The ESP100 when in synchronous data phase, can mistake a long final
1599 * REQ pulse from the target as an extra byte, it places whatever is on
1600 * the data lines into the fifo. For now, we will assume when this
1601 * happens that the target is a bit quirky and we don't want to
1602 * be talking synchronously to it anyways. Regardless, we need to
1603 * tell the ESP to eat the extraneous byte so that we can proceed
1604 * to the next phase.
1605 */
1606static inline int esp100_sync_hwbug(struct NCR_ESP *esp, struct ESP_regs *eregs,
1607 Scsi_Cmnd *sp, int fifocnt)
1608{
1609 /* Do not touch this piece of code. */
1610 if((!(esp->erev == esp100)) ||
1611 (!(sreg_datainp((esp->sreg = esp_read(eregs->esp_status))) && !fifocnt) &&
1612 !(sreg_dataoutp(esp->sreg) && !fnzero(esp, eregs)))) {
1613 if(sp->SCp.phase == in_dataout)
1614 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
1615 return 0;
1616 } else {
1617 /* Async mode for this guy. */
1618 build_sync_nego_msg(esp, 0, 0);
1619
1620 /* Ack the bogus byte, but set ATN first. */
1621 esp_cmd(esp, eregs, ESP_CMD_SATN);
1622 esp_cmd(esp, eregs, ESP_CMD_MOK);
1623 return 1;
1624 }
1625}
1626
1627/* This closes the window during a selection with a reselect pending, because
1628 * we use DMA for the selection process the FIFO should hold the correct
1629 * contents if we get reselected during this process. So we just need to
1630 * ack the possible illegal cmd interrupt pending on the esp100.
1631 */
1632static inline int esp100_reconnect_hwbug(struct NCR_ESP *esp,
1633 struct ESP_regs *eregs)
1634{
1635 volatile unchar junk;
1636
1637 if(esp->erev != esp100)
1638 return 0;
1639 junk = esp_read(eregs->esp_intrpt);
1640
1641 if(junk & ESP_INTR_SR)
1642 return 1;
1643 return 0;
1644}
1645
1646/* This verifies the BUSID bits during a reselection so that we know which
1647 * target is talking to us.
1648 */
1649static inline int reconnect_target(struct NCR_ESP *esp, struct ESP_regs *eregs)
1650{
1651 int it, me = esp->scsi_id_mask, targ = 0;
1652
1653 if(2 != fcount(esp, eregs))
1654 return -1;
1655 it = esp_read(eregs->esp_fdata);
1656 if(!(it & me))
1657 return -1;
1658 it &= ~me;
1659 if(it & (it - 1))
1660 return -1;
1661 while(!(it & 1))
1662 targ++, it >>= 1;
1663 return targ;
1664}
1665
1666/* This verifies the identify from the target so that we know which lun is
1667 * being reconnected.
1668 */
1669static inline int reconnect_lun(struct NCR_ESP *esp, struct ESP_regs *eregs)
1670{
1671 int lun;
1672
1673 if((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
1674 return -1;
1675 lun = esp_read(eregs->esp_fdata);
1676
1677 /* Yes, you read this correctly. We report lun of zero
1678 * if we see parity error. ESP reports parity error for
1679 * the lun byte, and this is the only way to hope to recover
1680 * because the target is connected.
1681 */
1682 if(esp->sreg & ESP_STAT_PERR)
1683 return 0;
1684
1685 /* Check for illegal bits being set in the lun. */
1686 if((lun & 0x40) || !(lun & 0x80))
1687 return -1;
1688
1689 return lun & 7;
1690}
1691
1692/* This puts the driver in a state where it can revitalize a command that
1693 * is being continued due to reselection.
1694 */
1695static inline void esp_connect(struct NCR_ESP *esp, struct ESP_regs *eregs,
1696 Scsi_Cmnd *sp)
1697{
1698 struct scsi_device *dp = sp->device;
1699 struct esp_device *esp_dev = dp->hostdata;
1700
1701 if(esp->prev_soff != esp_dev->sync_max_offset ||
1702 esp->prev_stp != esp_dev->sync_min_period ||
1703 (esp->erev > esp100a &&
1704 esp->prev_cfg3 != esp->config3[scmd_id(sp)])) {
1705 esp->prev_soff = esp_dev->sync_max_offset;
1706 esp_write(eregs->esp_soff, esp->prev_soff);
1707 esp->prev_stp = esp_dev->sync_min_period;
1708 esp_write(eregs->esp_stp, esp->prev_stp);
1709 if(esp->erev > esp100a) {
1710 esp->prev_cfg3 = esp->config3[scmd_id(sp)];
1711 esp_write(eregs->esp_cfg3, esp->prev_cfg3);
1712 }
1713 }
1714 esp->current_SC = sp;
1715}
1716
1717/* This will place the current working command back into the issue queue
1718 * if we are to receive a reselection amidst a selection attempt.
1719 */
1720static inline void esp_reconnect(struct NCR_ESP *esp, Scsi_Cmnd *sp)
1721{
1722 if(!esp->disconnected_SC)
1723 ESPLOG(("esp%d: Weird, being reselected but disconnected "
1724 "command queue is empty.\n", esp->esp_id));
1725 esp->snip = 0;
1726 esp->current_SC = NULL;
1727 sp->SCp.phase = not_issued;
1728 append_SC(&esp->issue_SC, sp);
1729}
1730
1731/* Begin message in phase. */
1732static int esp_do_msgin(struct NCR_ESP *esp, struct ESP_regs *eregs)
1733{
1734 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
1735 esp_maybe_nop(esp, eregs);
1736 esp_cmd(esp, eregs, ESP_CMD_TI);
1737 esp->msgin_len = 1;
1738 esp->msgin_ctr = 0;
1739 esp_advance_phase(esp->current_SC, in_msgindone);
1740 return do_work_bus;
1741}
1742
1743static inline void advance_sg(struct NCR_ESP *esp, Scsi_Cmnd *sp)
1744{
1745 ++sp->SCp.buffer;
1746 --sp->SCp.buffers_residual;
1747 sp->SCp.this_residual = sp->SCp.buffer->length;
1748 if (esp->dma_advance_sg)
1749 esp->dma_advance_sg (sp);
1750 else
1751 sp->SCp.ptr = (char *) virt_to_phys(sg_virt(sp->SCp.buffer));
1752
1753}
1754
1755/* Please note that the way I've coded these routines is that I _always_
1756 * check for a disconnect during any and all information transfer
1757 * phases. The SCSI standard states that the target _can_ cause a BUS
1758 * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note
1759 * that during information transfer phases the target controls every
1760 * change in phase, the only thing the initiator can do is "ask" for
1761 * a message out phase by driving ATN true. The target can, and sometimes
1762 * will, completely ignore this request so we cannot assume anything when
1763 * we try to force a message out phase to abort/reset a target. Most of
1764 * the time the target will eventually be nice and go to message out, so
1765 * we may have to hold on to our state about what we want to tell the target
1766 * for some period of time.
1767 */
1768
1769/* I think I have things working here correctly. Even partial transfers
1770 * within a buffer or sub-buffer should not upset us at all no matter
1771 * how bad the target and/or ESP fucks things up.
1772 */
1773static int esp_do_data(struct NCR_ESP *esp, struct ESP_regs *eregs)
1774{
1775 Scsi_Cmnd *SCptr = esp->current_SC;
1776 int thisphase, hmuch;
1777
1778 ESPDATA(("esp_do_data: "));
1779 esp_maybe_nop(esp, eregs);
1780 thisphase = sreg_to_dataphase(esp->sreg);
1781 esp_advance_phase(SCptr, thisphase);
1782 ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
1783 hmuch = esp->dma_can_transfer(esp, SCptr);
1784
1785 /*
1786 * XXX MSch: cater for PIO transfer here; PIO used if hmuch == 0
1787 */
1788 if (hmuch) { /* DMA */
1789 /*
1790 * DMA
1791 */
1792 ESPDATA(("hmuch<%d> ", hmuch));
1793 esp->current_transfer_size = hmuch;
1794 esp_setcount(eregs, (esp->fas_premature_intr_workaround ?
1795 (hmuch + 0x40) : hmuch));
1796 esp->dma_setup(esp, (__u32)((unsigned long)SCptr->SCp.ptr),
1797 hmuch, (thisphase == in_datain));
1798 ESPDATA(("DMA|TI --> do_intr_end\n"));
1799 esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
1800 return do_intr_end;
1801 /*
1802 * end DMA
1803 */
1804 } else {
1805 /*
1806 * PIO
1807 */
1808 int oldphase, i = 0; /* or where we left off last time ?? esp->current_data ?? */
1809 int fifocnt = 0;
1810 unsigned char *p = phys_to_virt((unsigned long)SCptr->SCp.ptr);
1811
1812 oldphase = esp_read(eregs->esp_status) & ESP_STAT_PMASK;
1813
1814 /*
1815 * polled transfer; ugly, can we make this happen in a DRQ
1816 * interrupt handler ??
1817 * requires keeping track of state information in host or
1818 * command struct!
1819 * Problem: I've never seen a DRQ happen on Mac, not even
1820 * with ESP_CMD_DMA ...
1821 */
1822
1823 /* figure out how much needs to be transferred */
1824 hmuch = SCptr->SCp.this_residual;
1825 ESPDATA(("hmuch<%d> pio ", hmuch));
1826 esp->current_transfer_size = hmuch;
1827
1828 /* tell the ESP ... */
1829 esp_setcount(eregs, hmuch);
1830
1831 /* loop */
1832 while (hmuch) {
1833 int j, fifo_stuck = 0, newphase;
1834 unsigned long timeout;
1835#if 0
1836 unsigned long flags;
1837#endif
1838#if 0
1839 if ( i % 10 )
1840 ESPDATA(("\r"));
1841 else
1842 ESPDATA(( /*"\n"*/ "\r"));
1843#endif
1844#if 0
1845 local_irq_save(flags);
1846#endif
1847 if(thisphase == in_datain) {
1848 /* 'go' ... */
1849 esp_cmd(esp, eregs, ESP_CMD_TI);
1850
1851 /* wait for data */
1852 timeout = 1000000;
1853 while (!((esp->sreg=esp_read(eregs->esp_status)) & ESP_STAT_INTR) && --timeout)
1854 udelay(2);
1855 if (timeout == 0)
1856 printk("DRQ datain timeout! \n");
1857
1858 newphase = esp->sreg & ESP_STAT_PMASK;
1859
1860 /* see how much we got ... */
1861 fifocnt = (esp_read(eregs->esp_fflags) & ESP_FF_FBYTES);
1862
1863 if (!fifocnt)
1864 fifo_stuck++;
1865 else
1866 fifo_stuck = 0;
1867
1868 ESPDATA(("\rgot %d st %x ph %x", fifocnt, esp->sreg, newphase));
1869
1870 /* read fifo */
1871 for(j=0;j<fifocnt;j++)
1872 p[i++] = esp_read(eregs->esp_fdata);
1873
1874 ESPDATA(("(%d) ", i));
1875
1876 /* how many to go ?? */
1877 hmuch -= fifocnt;
1878
1879 /* break if status phase !! */
1880 if(newphase == ESP_STATP) {
1881 /* clear int. */
1882 esp->ireg = esp_read(eregs->esp_intrpt);
1883 break;
1884 }
1885 } else {
1886#define MAX_FIFO 8
1887 /* how much will fit ? */
1888 int this_count = MAX_FIFO - fifocnt;
1889 if (this_count > hmuch)
1890 this_count = hmuch;
1891
1892 /* fill fifo */
1893 for(j=0;j<this_count;j++)
1894 esp_write(eregs->esp_fdata, p[i++]);
1895
1896 /* how many left if this goes out ?? */
1897 hmuch -= this_count;
1898
1899 /* 'go' ... */
1900 esp_cmd(esp, eregs, ESP_CMD_TI);
1901
1902 /* wait for 'got it' */
1903 timeout = 1000000;
1904 while (!((esp->sreg=esp_read(eregs->esp_status)) & ESP_STAT_INTR) && --timeout)
1905 udelay(2);
1906 if (timeout == 0)
1907 printk("DRQ dataout timeout! \n");
1908
1909 newphase = esp->sreg & ESP_STAT_PMASK;
1910
1911 /* need to check how much was sent ?? */
1912 fifocnt = (esp_read(eregs->esp_fflags) & ESP_FF_FBYTES);
1913
1914 ESPDATA(("\rsent %d st %x ph %x", this_count - fifocnt, esp->sreg, newphase));
1915
1916 ESPDATA(("(%d) ", i));
1917
1918 /* break if status phase !! */
1919 if(newphase == ESP_STATP) {
1920 /* clear int. */
1921 esp->ireg = esp_read(eregs->esp_intrpt);
1922 break;
1923 }
1924
1925 }
1926
1927 /* clear int. */
1928 esp->ireg = esp_read(eregs->esp_intrpt);
1929
1930 ESPDATA(("ir %x ... ", esp->ireg));
1931
1932 if (hmuch == 0)
1933 ESPDATA(("done! \n"));
1934
1935#if 0
1936 local_irq_restore(flags);
1937#endif
1938
1939 /* check new bus phase */
1940 if (newphase != oldphase && i < esp->current_transfer_size) {
1941 /* something happened; disconnect ?? */
1942 ESPDATA(("phase change, dropped out with %d done ... ", i));
1943 break;
1944 }
1945
1946 /* check int. status */
1947 if (esp->ireg & ESP_INTR_DC) {
1948 /* disconnect */
1949 ESPDATA(("disconnect; %d transferred ... ", i));
1950 break;
1951 } else if (esp->ireg & ESP_INTR_FDONE) {
1952 /* function done */
1953 ESPDATA(("function done; %d transferred ... ", i));
1954 break;
1955 }
1956
1957 /* XXX fixme: bail out on stall */
1958 if (fifo_stuck > 10) {
1959 /* we're stuck */
1960 ESPDATA(("fifo stall; %d transferred ... ", i));
1961 break;
1962 }
1963 }
1964
1965 ESPDATA(("\n"));
1966 /* check successful completion ?? */
1967
1968 if (thisphase == in_dataout)
1969 hmuch += fifocnt; /* stuck?? adjust data pointer ...*/
1970
1971 /* tell do_data_finale how much was transferred */
1972 esp->current_transfer_size -= hmuch;
1973
1974 /* still not completely sure on this one ... */
1975 return /*do_intr_end*/ do_work_bus /*do_phase_determine*/ ;
1976
1977 /*
1978 * end PIO
1979 */
1980 }
1981 return do_intr_end;
1982}
1983
1984/* See how successful the data transfer was. */
1985static int esp_do_data_finale(struct NCR_ESP *esp,
1986 struct ESP_regs *eregs)
1987{
1988 Scsi_Cmnd *SCptr = esp->current_SC;
1989 struct esp_device *esp_dev = SCptr->device->hostdata;
1990 int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;
1991
1992 if(esp->dma_led_off)
1993 esp->dma_led_off(esp);
1994
1995 ESPDATA(("esp_do_data_finale: "));
1996
1997 if(SCptr->SCp.phase == in_datain) {
1998 if(esp->sreg & ESP_STAT_PERR) {
1999 /* Yuck, parity error. The ESP asserts ATN
2000 * so that we can go to message out phase
2001 * immediately and inform the target that
2002 * something bad happened.
2003 */
2004 ESPLOG(("esp%d: data bad parity detected.\n",
2005 esp->esp_id));
2006 esp->cur_msgout[0] = INITIATOR_ERROR;
2007 esp->msgout_len = 1;
2008 }
2009 if(esp->dma_drain)
2010 esp->dma_drain(esp);
2011 }
2012 if(esp->dma_invalidate)
2013 esp->dma_invalidate(esp);
2014
2015 /* This could happen for the above parity error case. */
2016 if(!(esp->ireg == ESP_INTR_BSERV)) {
2017 /* Please go to msgout phase, please please please... */
2018 ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
2019 esp->esp_id));
2020 return esp_do_phase_determine(esp, eregs);
2021 }
2022
2023 /* Check for partial transfers and other horrible events. */
2024 fifocnt = (esp_read(eregs->esp_fflags) & ESP_FF_FBYTES);
2025 ecount = esp_getcount(eregs);
2026 if(esp->fas_premature_intr_workaround)
2027 ecount -= 0x40;
2028 bytes_sent = esp->current_transfer_size;
2029
2030 ESPDATA(("trans_sz=%d, ", bytes_sent));
2031 if(!(esp->sreg & ESP_STAT_TCNT))
2032 bytes_sent -= ecount;
2033 if(SCptr->SCp.phase == in_dataout)
2034 bytes_sent -= fifocnt;
2035
2036 ESPDATA(("bytes_sent=%d (ecount=%d, fifocnt=%d), ", bytes_sent,
2037 ecount, fifocnt));
2038
2039 /* If we were in synchronous mode, check for peculiarities. */
2040 if(esp_dev->sync_max_offset)
2041 bogus_data = esp100_sync_hwbug(esp, eregs, SCptr, fifocnt);
2042 else
2043 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
2044
2045 /* Until we are sure of what has happened, we are certainly
2046 * in the dark.
2047 */
2048 esp_advance_phase(SCptr, in_the_dark);
2049
2050 /* Check for premature interrupt condition. Can happen on FAS2x6
2051 * chips. QLogic recommends a workaround by overprogramming the
2052 * transfer counters, but this makes doing scatter-gather impossible.
2053 * Until there is a way to disable scatter-gather for a single target,
2054 * and not only for the entire host adapter as it is now, the workaround
2055 * is way to expensive performance wise.
2056 * Instead, it turns out that when this happens the target has disconnected
2057 * already but it doesn't show in the interrupt register. Compensate for
2058 * that here to try and avoid a SCSI bus reset.
2059 */
2060 if(!esp->fas_premature_intr_workaround && (fifocnt == 1) &&
2061 sreg_dataoutp(esp->sreg)) {
2062 ESPLOG(("esp%d: Premature interrupt, enabling workaround\n",
2063 esp->esp_id));
2064#if 0
2065 /* Disable scatter-gather operations, they are not possible
2066 * when using this workaround.
2067 */
2068 esp->ehost->sg_tablesize = 0;
2069 esp->ehost->use_clustering = ENABLE_CLUSTERING;
2070 esp->fas_premature_intr_workaround = 1;
2071 bytes_sent = 0;
2072 if(SCptr->use_sg) {
2073 ESPLOG(("esp%d: Aborting scatter-gather operation\n",
2074 esp->esp_id));
2075 esp->cur_msgout[0] = ABORT;
2076 esp->msgout_len = 1;
2077 esp->msgout_ctr = 0;
2078 esp_cmd(esp, eregs, ESP_CMD_SATN);
2079 esp_setcount(eregs, 0xffff);
2080 esp_cmd(esp, eregs, ESP_CMD_NULL);
2081 esp_cmd(esp, eregs, ESP_CMD_TPAD | ESP_CMD_DMA);
2082 return do_intr_end;
2083 }
2084#else
2085 /* Just set the disconnected bit. That's what appears to
2086 * happen anyway. The state machine will pick it up when
2087 * we return.
2088 */
2089 esp->ireg |= ESP_INTR_DC;
2090#endif
2091 }
2092
2093 if(bytes_sent < 0) {
2094 /* I've seen this happen due to lost state in this
2095 * driver. No idea why it happened, but allowing
2096 * this value to be negative caused things to
2097 * lock up. This allows greater chance of recovery.
2098 * In fact every time I've seen this, it has been
2099 * a driver bug without question.
2100 */
2101 ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
2102 ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
2103 esp->esp_id,
2104 esp->current_transfer_size, fifocnt, ecount));
2105 ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
2106 esp->esp_id,
2107 SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
2108 ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id,
2109 SCptr->device->id));
2110 SCptr->device->borken = 1;
2111 esp_dev->sync = 0;
2112 bytes_sent = 0;
2113 }
2114
2115 /* Update the state of our transfer. */
2116 SCptr->SCp.ptr += bytes_sent;
2117 SCptr->SCp.this_residual -= bytes_sent;
2118 if(SCptr->SCp.this_residual < 0) {
2119 /* shit */
2120 ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id));
2121 SCptr->SCp.this_residual = 0;
2122 }
2123
2124 /* Maybe continue. */
2125 if(!bogus_data) {
2126 ESPDATA(("!bogus_data, "));
2127 /* NO MATTER WHAT, we advance the scatterlist,
2128 * if the target should decide to disconnect
2129 * in between scatter chunks (which is common)
2130 * we could die horribly! I used to have the sg
2131 * advance occur only if we are going back into
2132 * (or are staying in) a data phase, you can
2133 * imagine the hell I went through trying to
2134 * figure this out.
2135 */
2136 if(!SCptr->SCp.this_residual && SCptr->SCp.buffers_residual)
2137 advance_sg(esp, SCptr);
2138#ifdef DEBUG_ESP_DATA
2139 if(sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
2140 ESPDATA(("to more data\n"));
2141 } else {
2142 ESPDATA(("to new phase\n"));
2143 }
2144#endif
2145 return esp_do_phase_determine(esp, eregs);
2146 }
2147 /* Bogus data, just wait for next interrupt. */
2148 ESPLOG(("esp%d: bogus_data during end of data phase\n",
2149 esp->esp_id));
2150 return do_intr_end;
2151}
2152
2153/* We received a non-good status return at the end of
2154 * running a SCSI command. This is used to decide if
2155 * we should clear our synchronous transfer state for
2156 * such a device when that happens.
2157 *
2158 * The idea is that when spinning up a disk or rewinding
2159 * a tape, we don't want to go into a loop re-negotiating
2160 * synchronous capabilities over and over.
2161 */
2162static int esp_should_clear_sync(Scsi_Cmnd *sp)
2163{
2164 unchar cmd = sp->cmnd[0];
2165
2166 /* These cases are for spinning up a disk and
2167 * waiting for that spinup to complete.
2168 */
2169 if(cmd == START_STOP)
2170 return 0;
2171
2172 if(cmd == TEST_UNIT_READY)
2173 return 0;
2174
2175 /* One more special case for SCSI tape drives,
2176 * this is what is used to probe the device for
2177 * completion of a rewind or tape load operation.
2178 */
2179 if(sp->device->type == TYPE_TAPE && cmd == MODE_SENSE)
2180 return 0;
2181
2182 return 1;
2183}
2184
2185/* Either a command is completing or a target is dropping off the bus
2186 * to continue the command in the background so we can do other work.
2187 */
2188static int esp_do_freebus(struct NCR_ESP *esp, struct ESP_regs *eregs)
2189{
2190 Scsi_Cmnd *SCptr = esp->current_SC;
2191 int rval;
2192
2193 rval = skipahead2(esp, eregs, SCptr, in_status, in_msgindone, in_freeing);
2194 if(rval)
2195 return rval;
2196
2197 if(esp->ireg != ESP_INTR_DC) {
2198 ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
2199 return do_reset_bus; /* target will not drop BSY... */
2200 }
2201 esp->msgout_len = 0;
2202 esp->prevmsgout = NOP;
2203 if(esp->prevmsgin == COMMAND_COMPLETE) {
2204 struct esp_device *esp_dev = SCptr->device->hostdata;
2205 /* Normal end of nexus. */
2206 if(esp->disconnected_SC)
2207 esp_cmd(esp, eregs, ESP_CMD_ESEL);
2208
2209 if(SCptr->SCp.Status != GOOD &&
2210 SCptr->SCp.Status != CONDITION_GOOD &&
2211 ((1<<scmd_id(SCptr)) & esp->targets_present) &&
2212 esp_dev->sync && esp_dev->sync_max_offset) {
2213 /* SCSI standard says that the synchronous capabilities
2214 * should be renegotiated at this point. Most likely
2215 * we are about to request sense from this target
2216 * in which case we want to avoid using sync
2217 * transfers until we are sure of the current target
2218 * state.
2219 */
2220 ESPMISC(("esp: Status <%d> for target %d lun %d\n",
2221 SCptr->SCp.Status, SCptr->device->id, SCptr->device->lun));
2222
2223 /* But don't do this when spinning up a disk at
2224 * boot time while we poll for completion as it
2225 * fills up the console with messages. Also, tapes
2226 * can report not ready many times right after
2227 * loading up a tape.
2228 */
2229 if(esp_should_clear_sync(SCptr) != 0)
2230 esp_dev->sync = 0;
2231 }
2232 ESPDISC(("F<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
2233 esp_done(esp, ((SCptr->SCp.Status & 0xff) |
2234 ((SCptr->SCp.Message & 0xff)<<8) |
2235 (DID_OK << 16)));
2236 } else if(esp->prevmsgin == DISCONNECT) {
2237 /* Normal disconnect. */
2238 esp_cmd(esp, eregs, ESP_CMD_ESEL);
2239 ESPDISC(("D<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
2240 append_SC(&esp->disconnected_SC, SCptr);
2241 esp->current_SC = NULL;
2242 if(esp->issue_SC)
2243 esp_exec_cmd(esp);
2244 } else {
2245 /* Driver bug, we do not expect a disconnect here
2246 * and should not have advanced the state engine
2247 * to in_freeing.
2248 */
2249 ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
2250 esp->esp_id));
2251 return do_reset_bus;
2252 }
2253 return do_intr_end;
2254}
2255
2256/* When a reselect occurs, and we cannot find the command to
2257 * reconnect to in our queues, we do this.
2258 */
2259static int esp_bad_reconnect(struct NCR_ESP *esp)
2260{
2261 Scsi_Cmnd *sp;
2262
2263 ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
2264 esp->esp_id));
2265 ESPLOG(("QUEUE DUMP\n"));
2266 sp = esp->issue_SC;
2267 ESPLOG(("esp%d: issue_SC[", esp->esp_id));
2268 while(sp) {
2269 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
2270 sp = (Scsi_Cmnd *) sp->host_scribble;
2271 }
2272 ESPLOG(("]\n"));
2273 sp = esp->current_SC;
2274 ESPLOG(("esp%d: current_SC[", esp->esp_id));
2275 while(sp) {
2276 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
2277 sp = (Scsi_Cmnd *) sp->host_scribble;
2278 }
2279 ESPLOG(("]\n"));
2280 sp = esp->disconnected_SC;
2281 ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
2282 while(sp) {
2283 ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
2284 sp = (Scsi_Cmnd *) sp->host_scribble;
2285 }
2286 ESPLOG(("]\n"));
2287 return do_reset_bus;
2288}
2289
2290/* Do the needy when a target tries to reconnect to us. */
2291static int esp_do_reconnect(struct NCR_ESP *esp,
2292 struct ESP_regs *eregs)
2293{
2294 int lun, target;
2295 Scsi_Cmnd *SCptr;
2296
2297 /* Check for all bogus conditions first. */
2298 target = reconnect_target(esp, eregs);
2299 if(target < 0) {
2300 ESPDISC(("bad bus bits\n"));
2301 return do_reset_bus;
2302 }
2303 lun = reconnect_lun(esp, eregs);
2304 if(lun < 0) {
2305 ESPDISC(("target=%2x, bad identify msg\n", target));
2306 return do_reset_bus;
2307 }
2308
2309 /* Things look ok... */
2310 ESPDISC(("R<%02x,%02x>", target, lun));
2311
2312 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
2313 if(esp100_reconnect_hwbug(esp, eregs))
2314 return do_reset_bus;
2315 esp_cmd(esp, eregs, ESP_CMD_NULL);
2316
2317 SCptr = remove_SC(&esp->disconnected_SC, (unchar) target, (unchar) lun);
2318 if(!SCptr)
2319 return esp_bad_reconnect(esp);
2320
2321 esp_connect(esp, eregs, SCptr);
2322 esp_cmd(esp, eregs, ESP_CMD_MOK);
2323
2324 /* Reconnect implies a restore pointers operation. */
2325 esp_restore_pointers(esp, SCptr);
2326
2327 esp->snip = 0;
2328 esp_advance_phase(SCptr, in_the_dark);
2329 return do_intr_end;
2330}
2331
2332/* End of NEXUS (hopefully), pick up status + message byte then leave if
2333 * all goes well.
2334 */
2335static int esp_do_status(struct NCR_ESP *esp, struct ESP_regs *eregs)
2336{
2337 Scsi_Cmnd *SCptr = esp->current_SC;
2338 int intr, rval;
2339
2340 rval = skipahead1(esp, eregs, SCptr, in_the_dark, in_status);
2341 if(rval)
2342 return rval;
2343
2344 intr = esp->ireg;
2345 ESPSTAT(("esp_do_status: "));
2346 if(intr != ESP_INTR_DC) {
2347 int message_out = 0; /* for parity problems */
2348
2349 /* Ack the message. */
2350 ESPSTAT(("ack msg, "));
2351 esp_cmd(esp, eregs, ESP_CMD_MOK);
2352
2353 if(esp->dma_poll)
2354 esp->dma_poll(esp, (unsigned char *) esp->esp_command);
2355
2356 ESPSTAT(("got something, "));
2357 /* ESP chimes in with one of
2358 *
2359 * 1) function done interrupt:
2360 * both status and message in bytes
2361 * are available
2362 *
2363 * 2) bus service interrupt:
2364 * only status byte was acquired
2365 *
2366 * 3) Anything else:
2367 * can't happen, but we test for it
2368 * anyways
2369 *
2370 * ALSO: If bad parity was detected on either
2371 * the status _or_ the message byte then
2372 * the ESP has asserted ATN on the bus
2373 * and we must therefore wait for the
2374 * next phase change.
2375 */
2376 if(intr & ESP_INTR_FDONE) {
2377 /* We got it all, hallejulia. */
2378 ESPSTAT(("got both, "));
2379 SCptr->SCp.Status = esp->esp_command[0];
2380 SCptr->SCp.Message = esp->esp_command[1];
2381 esp->prevmsgin = SCptr->SCp.Message;
2382 esp->cur_msgin[0] = SCptr->SCp.Message;
2383 if(esp->sreg & ESP_STAT_PERR) {
2384 /* There was bad parity for the
2385 * message byte, the status byte
2386 * was ok.
2387 */
2388 message_out = MSG_PARITY_ERROR;
2389 }
2390 } else if(intr == ESP_INTR_BSERV) {
2391 /* Only got status byte. */
2392 ESPLOG(("esp%d: got status only, ", esp->esp_id));
2393 if(!(esp->sreg & ESP_STAT_PERR)) {
2394 SCptr->SCp.Status = esp->esp_command[0];
2395 SCptr->SCp.Message = 0xff;
2396 } else {
2397 /* The status byte had bad parity.
2398 * we leave the scsi_pointer Status
2399 * field alone as we set it to a default
2400 * of CHECK_CONDITION in esp_queue.
2401 */
2402 message_out = INITIATOR_ERROR;
2403 }
2404 } else {
2405 /* This shouldn't happen ever. */
2406 ESPSTAT(("got bolixed\n"));
2407 esp_advance_phase(SCptr, in_the_dark);
2408 return esp_do_phase_determine(esp, eregs);
2409 }
2410
2411 if(!message_out) {
2412 ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
2413 SCptr->SCp.Message));
2414 if(SCptr->SCp.Message == COMMAND_COMPLETE) {
2415 ESPSTAT(("and was COMMAND_COMPLETE\n"));
2416 esp_advance_phase(SCptr, in_freeing);
2417 return esp_do_freebus(esp, eregs);
2418 } else {
2419 ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
2420 esp->esp_id));
2421 esp->msgin_len = esp->msgin_ctr = 1;
2422 esp_advance_phase(SCptr, in_msgindone);
2423 return esp_do_msgindone(esp, eregs);
2424 }
2425 } else {
2426 /* With luck we'll be able to let the target
2427 * know that bad parity happened, it will know
2428 * which byte caused the problems and send it
2429 * again. For the case where the status byte
2430 * receives bad parity, I do not believe most
2431 * targets recover very well. We'll see.
2432 */
2433 ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
2434 esp->esp_id, message_out));
2435 esp->cur_msgout[0] = message_out;
2436 esp->msgout_len = esp->msgout_ctr = 1;
2437 esp_advance_phase(SCptr, in_the_dark);
2438 return esp_do_phase_determine(esp, eregs);
2439 }
2440 } else {
2441 /* If we disconnect now, all hell breaks loose. */
2442 ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
2443 esp_advance_phase(SCptr, in_the_dark);
2444 return esp_do_phase_determine(esp, eregs);
2445 }
2446}
2447
2448static int esp_enter_status(struct NCR_ESP *esp,
2449 struct ESP_regs *eregs)
2450{
2451 unchar thecmd = ESP_CMD_ICCSEQ;
2452
2453 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
2454
2455 if(esp->do_pio_cmds) {
2456 esp_advance_phase(esp->current_SC, in_status);
2457 esp_cmd(esp, eregs, thecmd);
2458 while(!(esp_read(esp->eregs->esp_status) & ESP_STAT_INTR));
2459 esp->esp_command[0] = esp_read(eregs->esp_fdata);
2460 while(!(esp_read(esp->eregs->esp_status) & ESP_STAT_INTR));
2461 esp->esp_command[1] = esp_read(eregs->esp_fdata);
2462 } else {
2463 esp->esp_command[0] = esp->esp_command[1] = 0xff;
2464 esp_write(eregs->esp_tclow, 2);
2465 esp_write(eregs->esp_tcmed, 0);
2466 esp->dma_init_read(esp, esp->esp_command_dvma, 2);
2467 thecmd |= ESP_CMD_DMA;
2468 esp_cmd(esp, eregs, thecmd);
2469 esp_advance_phase(esp->current_SC, in_status);
2470 }
2471
2472 return esp_do_status(esp, eregs);
2473}
2474
2475static int esp_disconnect_amidst_phases(struct NCR_ESP *esp,
2476 struct ESP_regs *eregs)
2477{
2478 Scsi_Cmnd *sp = esp->current_SC;
2479 struct esp_device *esp_dev = sp->device->hostdata;
2480
2481 /* This means real problems if we see this
2482 * here. Unless we were actually trying
2483 * to force the device to abort/reset.
2484 */
2485 ESPLOG(("esp%d: Disconnect amidst phases, ", esp->esp_id));
2486 ESPLOG(("pphase<%s> cphase<%s>, ",
2487 phase_string(sp->SCp.phase),
2488 phase_string(sp->SCp.sent_command)));
2489
2490 if(esp->disconnected_SC)
2491 esp_cmd(esp, eregs, ESP_CMD_ESEL);
2492
2493 switch(esp->cur_msgout[0]) {
2494 default:
2495 /* We didn't expect this to happen at all. */
2496 ESPLOG(("device is bolixed\n"));
2497 esp_advance_phase(sp, in_tgterror);
2498 esp_done(esp, (DID_ERROR << 16));
2499 break;
2500
2501 case BUS_DEVICE_RESET:
2502 ESPLOG(("device reset successful\n"));
2503 esp_dev->sync_max_offset = 0;
2504 esp_dev->sync_min_period = 0;
2505 esp_dev->sync = 0;
2506 esp_advance_phase(sp, in_resetdev);
2507 esp_done(esp, (DID_RESET << 16));
2508 break;
2509
2510 case ABORT:
2511 ESPLOG(("device abort successful\n"));
2512 esp_advance_phase(sp, in_abortone);
2513 esp_done(esp, (DID_ABORT << 16));
2514 break;
2515
2516 };
2517 return do_intr_end;
2518}
2519
2520static int esp_enter_msgout(struct NCR_ESP *esp,
2521 struct ESP_regs *eregs)
2522{
2523 esp_advance_phase(esp->current_SC, in_msgout);
2524 return esp_do_msgout(esp, eregs);
2525}
2526
2527static int esp_enter_msgin(struct NCR_ESP *esp,
2528 struct ESP_regs *eregs)
2529{
2530 esp_advance_phase(esp->current_SC, in_msgin);
2531 return esp_do_msgin(esp, eregs);
2532}
2533
2534static int esp_enter_cmd(struct NCR_ESP *esp,
2535 struct ESP_regs *eregs)
2536{
2537 esp_advance_phase(esp->current_SC, in_cmdbegin);
2538 return esp_do_cmdbegin(esp, eregs);
2539}
2540
2541static int esp_enter_badphase(struct NCR_ESP *esp,
2542 struct ESP_regs *eregs)
2543{
2544 ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
2545 esp->sreg & ESP_STAT_PMASK));
2546 return do_reset_bus;
2547}
2548
2549typedef int (*espfunc_t)(struct NCR_ESP *,
2550 struct ESP_regs *);
2551
2552static espfunc_t phase_vector[] = {
2553 esp_do_data, /* ESP_DOP */
2554 esp_do_data, /* ESP_DIP */
2555 esp_enter_cmd, /* ESP_CMDP */
2556 esp_enter_status, /* ESP_STATP */
2557 esp_enter_badphase, /* ESP_STAT_PMSG */
2558 esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */
2559 esp_enter_msgout, /* ESP_MOP */
2560 esp_enter_msgin, /* ESP_MIP */
2561};
2562
2563/* The target has control of the bus and we have to see where it has
2564 * taken us.
2565 */
2566static int esp_do_phase_determine(struct NCR_ESP *esp,
2567 struct ESP_regs *eregs)
2568{
2569 if ((esp->ireg & ESP_INTR_DC) != 0)
2570 return esp_disconnect_amidst_phases(esp, eregs);
2571 return phase_vector[esp->sreg & ESP_STAT_PMASK](esp, eregs);
2572}
2573
2574/* First interrupt after exec'ing a cmd comes here. */
2575static int esp_select_complete(struct NCR_ESP *esp, struct ESP_regs *eregs)
2576{
2577 Scsi_Cmnd *SCptr = esp->current_SC;
2578 struct esp_device *esp_dev = SCptr->device->hostdata;
2579 int cmd_bytes_sent, fcnt;
2580
2581 fcnt = (esp_read(eregs->esp_fflags) & ESP_FF_FBYTES);
2582 cmd_bytes_sent = esp->dma_bytes_sent(esp, fcnt);
2583 if(esp->dma_invalidate)
2584 esp->dma_invalidate(esp);
2585
2586 /* Let's check to see if a reselect happened
2587 * while we we're trying to select. This must
2588 * be checked first.
2589 */
2590 if(esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
2591 esp_reconnect(esp, SCptr);
2592 return esp_do_reconnect(esp, eregs);
2593 }
2594
2595 /* Looks like things worked, we should see a bus service &
2596 * a function complete interrupt at this point. Note we
2597 * are doing a direct comparison because we don't want to
2598 * be fooled into thinking selection was successful if
2599 * ESP_INTR_DC is set, see below.
2600 */
2601 if(esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
2602 /* target speaks... */
2603 esp->targets_present |= (1<<scmd_id(SCptr));
2604
2605 /* What if the target ignores the sdtr? */
2606 if(esp->snip)
2607 esp_dev->sync = 1;
2608
2609 /* See how far, if at all, we got in getting
2610 * the information out to the target.
2611 */
2612 switch(esp->seqreg) {
2613 default:
2614
2615 case ESP_STEP_ASEL:
2616 /* Arbitration won, target selected, but
2617 * we are in some phase which is not command
2618 * phase nor is it message out phase.
2619 *
2620 * XXX We've confused the target, obviously.
2621 * XXX So clear it's state, but we also end
2622 * XXX up clearing everyone elses. That isn't
2623 * XXX so nice. I'd like to just reset this
2624 * XXX target, but if I cannot even get it's
2625 * XXX attention and finish selection to talk
2626 * XXX to it, there is not much more I can do.
2627 * XXX If we have a loaded bus we're going to
2628 * XXX spend the next second or so renegotiating
2629 * XXX for synchronous transfers.
2630 */
2631 ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
2632 esp->esp_id, SCptr->device->id));
2633
2634 case ESP_STEP_SID:
2635 /* Arbitration won, target selected, went
2636 * to message out phase, sent one message
2637 * byte, then we stopped. ATN is asserted
2638 * on the SCSI bus and the target is still
2639 * there hanging on. This is a legal
2640 * sequence step if we gave the ESP a select
2641 * and stop command.
2642 *
2643 * XXX See above, I could set the borken flag
2644 * XXX in the device struct and retry the
2645 * XXX command. But would that help for
2646 * XXX tagged capable targets?
2647 */
2648
2649 case ESP_STEP_NCMD:
2650 /* Arbitration won, target selected, maybe
2651 * sent the one message byte in message out
2652 * phase, but we did not go to command phase
2653 * in the end. Actually, we could have sent
2654 * only some of the message bytes if we tried
2655 * to send out the entire identify and tag
2656 * message using ESP_CMD_SA3.
2657 */
2658 cmd_bytes_sent = 0;
2659 break;
2660
2661 case ESP_STEP_PPC:
2662 /* No, not the powerPC pinhead. Arbitration
2663 * won, all message bytes sent if we went to
2664 * message out phase, went to command phase
2665 * but only part of the command was sent.
2666 *
2667 * XXX I've seen this, but usually in conjunction
2668 * XXX with a gross error which appears to have
2669 * XXX occurred between the time I told the
2670 * XXX ESP to arbitrate and when I got the
2671 * XXX interrupt. Could I have misloaded the
2672 * XXX command bytes into the fifo? Actually,
2673 * XXX I most likely missed a phase, and therefore
2674 * XXX went into never never land and didn't even
2675 * XXX know it. That was the old driver though.
2676 * XXX What is even more peculiar is that the ESP
2677 * XXX showed the proper function complete and
2678 * XXX bus service bits in the interrupt register.
2679 */
2680
2681 case ESP_STEP_FINI4:
2682 case ESP_STEP_FINI5:
2683 case ESP_STEP_FINI6:
2684 case ESP_STEP_FINI7:
2685 /* Account for the identify message */
2686 if(SCptr->SCp.phase == in_slct_norm)
2687 cmd_bytes_sent -= 1;
2688 };
2689 esp_cmd(esp, eregs, ESP_CMD_NULL);
2690
2691 /* Be careful, we could really get fucked during synchronous
2692 * data transfers if we try to flush the fifo now.
2693 */
2694 if(!fcnt && /* Fifo is empty and... */
2695 /* either we are not doing synchronous transfers or... */
2696 (!esp_dev->sync_max_offset ||
2697 /* We are not going into data in phase. */
2698 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
2699 esp_cmd(esp, eregs, ESP_CMD_FLUSH); /* flush is safe */
2700
2701 /* See how far we got if this is not a slow command. */
2702 if(!esp->esp_slowcmd) {
2703 if(cmd_bytes_sent < 0)
2704 cmd_bytes_sent = 0;
2705 if(cmd_bytes_sent != SCptr->cmd_len) {
2706 /* Crapola, mark it as a slowcmd
2707 * so that we have some chance of
2708 * keeping the command alive with
2709 * good luck.
2710 *
2711 * XXX Actually, if we didn't send it all
2712 * XXX this means either we didn't set things
2713 * XXX up properly (driver bug) or the target
2714 * XXX or the ESP detected parity on one of
2715 * XXX the command bytes. This makes much
2716 * XXX more sense, and therefore this code
2717 * XXX should be changed to send out a
2718 * XXX parity error message or if the status
2719 * XXX register shows no parity error then
2720 * XXX just expect the target to bring the
2721 * XXX bus into message in phase so that it
2722 * XXX can send us the parity error message.
2723 * XXX SCSI sucks...
2724 */
2725 esp->esp_slowcmd = 1;
2726 esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
2727 esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
2728 }
2729 }
2730
2731 /* Now figure out where we went. */
2732 esp_advance_phase(SCptr, in_the_dark);
2733 return esp_do_phase_determine(esp, eregs);
2734 }
2735
2736 /* Did the target even make it? */
2737 if(esp->ireg == ESP_INTR_DC) {
2738 /* wheee... nobody there or they didn't like
2739 * what we told it to do, clean up.
2740 */
2741
2742 /* If anyone is off the bus, but working on
2743 * a command in the background for us, tell
2744 * the ESP to listen for them.
2745 */
2746 if(esp->disconnected_SC)
2747 esp_cmd(esp, eregs, ESP_CMD_ESEL);
2748
2749 if(((1<<SCptr->device->id) & esp->targets_present) &&
2750 esp->seqreg && esp->cur_msgout[0] == EXTENDED_MESSAGE &&
2751 (SCptr->SCp.phase == in_slct_msg ||
2752 SCptr->SCp.phase == in_slct_stop)) {
2753 /* shit */
2754 esp->snip = 0;
2755 ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
2756 "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
2757 esp_dev->sync_max_offset = 0;
2758 esp_dev->sync_min_period = 0;
2759 esp_dev->sync = 1; /* so we don't negotiate again */
2760
2761 /* Run the command again, this time though we
2762 * won't try to negotiate for synchronous transfers.
2763 *
2764 * XXX I'd like to do something like send an
2765 * XXX INITIATOR_ERROR or ABORT message to the
2766 * XXX target to tell it, "Sorry I confused you,
2767 * XXX please come back and I will be nicer next
2768 * XXX time". But that requires having the target
2769 * XXX on the bus, and it has dropped BSY on us.
2770 */
2771 esp->current_SC = NULL;
2772 esp_advance_phase(SCptr, not_issued);
2773 prepend_SC(&esp->issue_SC, SCptr);
2774 esp_exec_cmd(esp);
2775 return do_intr_end;
2776 }
2777
2778 /* Ok, this is normal, this is what we see during boot
2779 * or whenever when we are scanning the bus for targets.
2780 * But first make sure that is really what is happening.
2781 */
2782 if(((1<<SCptr->device->id) & esp->targets_present)) {
2783 ESPLOG(("esp%d: Warning, live target %d not responding to "
2784 "selection.\n", esp->esp_id, SCptr->device->id));
2785
2786 /* This _CAN_ happen. The SCSI standard states that
2787 * the target is to _not_ respond to selection if
2788 * _it_ detects bad parity on the bus for any reason.
2789 * Therefore, we assume that if we've talked successfully
2790 * to this target before, bad parity is the problem.
2791 */
2792 esp_done(esp, (DID_PARITY << 16));
2793 } else {
2794 /* Else, there really isn't anyone there. */
2795 ESPMISC(("esp: selection failure, maybe nobody there?\n"));
2796 ESPMISC(("esp: target %d lun %d\n",
2797 SCptr->device->id, SCptr->device->lun));
2798 esp_done(esp, (DID_BAD_TARGET << 16));
2799 }
2800 return do_intr_end;
2801 }
2802
2803
2804 ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
2805 printk("esp%d: Currently -- ", esp->esp_id);
2806 esp_print_ireg(esp->ireg);
2807 printk(" ");
2808 esp_print_statreg(esp->sreg);
2809 printk(" ");
2810 esp_print_seqreg(esp->seqreg);
2811 printk("\n");
2812 printk("esp%d: New -- ", esp->esp_id);
2813 esp->sreg = esp_read(eregs->esp_status);
2814 esp->seqreg = esp_read(eregs->esp_sstep);
2815 esp->ireg = esp_read(eregs->esp_intrpt);
2816 esp_print_ireg(esp->ireg);
2817 printk(" ");
2818 esp_print_statreg(esp->sreg);
2819 printk(" ");
2820 esp_print_seqreg(esp->seqreg);
2821 printk("\n");
2822 ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
2823 return do_reset_bus; /* ugh... */
2824}
2825
2826/* Continue reading bytes for msgin phase. */
2827static int esp_do_msgincont(struct NCR_ESP *esp, struct ESP_regs *eregs)
2828{
2829 if(esp->ireg & ESP_INTR_BSERV) {
2830 /* in the right phase too? */
2831 if((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
2832 /* phew... */
2833 esp_cmd(esp, eregs, ESP_CMD_TI);
2834 esp_advance_phase(esp->current_SC, in_msgindone);
2835 return do_intr_end;
2836 }
2837
2838 /* We changed phase but ESP shows bus service,
2839 * in this case it is most likely that we, the
2840 * hacker who has been up for 20hrs straight
2841 * staring at the screen, drowned in coffee
2842 * smelling like retched cigarette ashes
2843 * have miscoded something..... so, try to
2844 * recover as best we can.
2845 */
2846 ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id));
2847 }
2848 esp_advance_phase(esp->current_SC, in_the_dark);
2849 return do_phase_determine;
2850}
2851
2852static int check_singlebyte_msg(struct NCR_ESP *esp,
2853 struct ESP_regs *eregs)
2854{
2855 esp->prevmsgin = esp->cur_msgin[0];
2856 if(esp->cur_msgin[0] & 0x80) {
2857 /* wheee... */
2858 ESPLOG(("esp%d: target sends identify amidst phases\n",
2859 esp->esp_id));
2860 esp_advance_phase(esp->current_SC, in_the_dark);
2861 return 0;
2862 } else if(((esp->cur_msgin[0] & 0xf0) == 0x20) ||
2863 (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
2864 esp->msgin_len = 2;
2865 esp_advance_phase(esp->current_SC, in_msgincont);
2866 return 0;
2867 }
2868 esp_advance_phase(esp->current_SC, in_the_dark);
2869 switch(esp->cur_msgin[0]) {
2870 default:
2871 /* We don't want to hear about it. */
2872 ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
2873 esp->cur_msgin[0]));
2874 return MESSAGE_REJECT;
2875
2876 case NOP:
2877 ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
2878 esp->current_SC->device->id));
2879 return 0;
2880
2881 case RESTORE_POINTERS:
2882 /* In this case we might also have to backup the
2883 * "slow command" pointer. It is rare to get such
2884 * a save/restore pointer sequence so early in the
2885 * bus transition sequences, but cover it.
2886 */
2887 if(esp->esp_slowcmd) {
2888 esp->esp_scmdleft = esp->current_SC->cmd_len;
2889 esp->esp_scmdp = &esp->current_SC->cmnd[0];
2890 }
2891 esp_restore_pointers(esp, esp->current_SC);
2892 return 0;
2893
2894 case SAVE_POINTERS:
2895 esp_save_pointers(esp, esp->current_SC);
2896 return 0;
2897
2898 case COMMAND_COMPLETE:
2899 case DISCONNECT:
2900 /* Freeing the bus, let it go. */
2901 esp->current_SC->SCp.phase = in_freeing;
2902 return 0;
2903
2904 case MESSAGE_REJECT:
2905 ESPMISC(("msg reject, "));
2906 if(esp->prevmsgout == EXTENDED_MESSAGE) {
2907 struct esp_device *esp_dev = esp->current_SC->device->hostdata;
2908
2909 /* Doesn't look like this target can
2910 * do synchronous or WIDE transfers.
2911 */
2912 ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
2913 esp_dev->sync = 1;
2914 esp_dev->wide = 1;
2915 esp_dev->sync_min_period = 0;
2916 esp_dev->sync_max_offset = 0;
2917 return 0;
2918 } else {
2919 ESPMISC(("not sync nego, sending ABORT\n"));
2920 return ABORT;
2921 }
2922 };
2923}
2924
2925/* Target negotiates for synchronous transfers before we do, this
2926 * is legal although very strange. What is even funnier is that
2927 * the SCSI2 standard specifically recommends against targets doing
2928 * this because so many initiators cannot cope with this occurring.
2929 */
2930static int target_with_ants_in_pants(struct NCR_ESP *esp,
2931 Scsi_Cmnd *SCptr,
2932 struct esp_device *esp_dev)
2933{
2934 if(esp_dev->sync || SCptr->device->borken) {
2935 /* sorry, no can do */
2936 ESPSDTR(("forcing to async, "));
2937 build_sync_nego_msg(esp, 0, 0);
2938 esp_dev->sync = 1;
2939 esp->snip = 1;
2940 ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
2941 esp_advance_phase(SCptr, in_the_dark);
2942 return EXTENDED_MESSAGE;
2943 }
2944
2945 /* Ok, we'll check them out... */
2946 return 0;
2947}
2948
2949static void sync_report(struct NCR_ESP *esp)
2950{
2951 int msg3, msg4;
2952 char *type;
2953
2954 msg3 = esp->cur_msgin[3];
2955 msg4 = esp->cur_msgin[4];
2956 if(msg4) {
2957 int hz = 1000000000 / (msg3 * 4);
2958 int integer = hz / 1000000;
2959 int fraction = (hz - (integer * 1000000)) / 10000;
2960 if((msg3 * 4) < 200) {
2961 type = "FAST";
2962 } else {
2963 type = "synchronous";
2964 }
2965
2966 /* Do not transform this back into one big printk
2967 * again, it triggers a bug in our sparc64-gcc272
2968 * sibling call optimization. -DaveM
2969 */
2970 ESPLOG((KERN_INFO "esp%d: target %d ",
2971 esp->esp_id, esp->current_SC->device->id));
2972 ESPLOG(("[period %dns offset %d %d.%02dMHz ",
2973 (int) msg3 * 4, (int) msg4,
2974 integer, fraction));
2975 ESPLOG(("%s SCSI%s]\n", type,
2976 (((msg3 * 4) < 200) ? "-II" : "")));
2977 } else {
2978 ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n",
2979 esp->esp_id, esp->current_SC->device->id));
2980 }
2981}
2982
2983static int check_multibyte_msg(struct NCR_ESP *esp,
2984 struct ESP_regs *eregs)
2985{
2986 Scsi_Cmnd *SCptr = esp->current_SC;
2987 struct esp_device *esp_dev = SCptr->device->hostdata;
2988 unchar regval = 0;
2989 int message_out = 0;
2990
2991 ESPSDTR(("chk multibyte msg: "));
2992 if(esp->cur_msgin[2] == EXTENDED_SDTR) {
2993 int period = esp->cur_msgin[3];
2994 int offset = esp->cur_msgin[4];
2995
2996 ESPSDTR(("is sync nego response, "));
2997 if(!esp->snip) {
2998 int rval;
2999
3000 /* Target negotiates first! */
3001 ESPSDTR(("target jumps the gun, "));
3002 message_out = EXTENDED_MESSAGE; /* we must respond */
3003 rval = target_with_ants_in_pants(esp, SCptr, esp_dev);
3004 if(rval)
3005 return rval;
3006 }
3007
3008 ESPSDTR(("examining sdtr, "));
3009
3010 /* Offset cannot be larger than ESP fifo size. */
3011 if(offset > 15) {
3012 ESPSDTR(("offset too big %2x, ", offset));
3013 offset = 15;
3014 ESPSDTR(("sending back new offset\n"));
3015 build_sync_nego_msg(esp, period, offset);
3016 return EXTENDED_MESSAGE;
3017 }
3018
3019 if(offset && period > esp->max_period) {
3020 /* Yeee, async for this slow device. */
3021 ESPSDTR(("period too long %2x, ", period));
3022 build_sync_nego_msg(esp, 0, 0);
3023 ESPSDTR(("hoping for msgout\n"));
3024 esp_advance_phase(esp->current_SC, in_the_dark);
3025 return EXTENDED_MESSAGE;
3026 } else if (offset && period < esp->min_period) {
3027 ESPSDTR(("period too short %2x, ", period));
3028 period = esp->min_period;
3029 if(esp->erev > esp236)
3030 regval = 4;
3031 else
3032 regval = 5;
3033 } else if(offset) {
3034 int tmp;
3035
3036 ESPSDTR(("period is ok, "));
3037 tmp = esp->ccycle / 1000;
3038 regval = (((period << 2) + tmp - 1) / tmp);
3039 if(regval && (esp->erev > esp236)) {
3040 if(period >= 50)
3041 regval--;
3042 }
3043 }
3044
3045 if(offset) {
3046 unchar bit;
3047
3048 esp_dev->sync_min_period = (regval & 0x1f);
3049 esp_dev->sync_max_offset = (offset | esp->radelay);
3050 if(esp->erev > esp236) {
3051 if(esp->erev == fas100a)
3052 bit = ESP_CONFIG3_FAST;
3053 else
3054 bit = ESP_CONFIG3_FSCSI;
3055 if(period < 50)
3056 esp->config3[SCptr->device->id] |= bit;
3057 else
3058 esp->config3[SCptr->device->id] &= ~bit;
3059 esp->prev_cfg3 = esp->config3[SCptr->device->id];
3060 esp_write(eregs->esp_cfg3, esp->prev_cfg3);
3061 }
3062 esp->prev_soff = esp_dev->sync_min_period;
3063 esp_write(eregs->esp_soff, esp->prev_soff);
3064 esp->prev_stp = esp_dev->sync_max_offset;
3065 esp_write(eregs->esp_stp, esp->prev_stp);
3066
3067 ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
3068 esp_dev->sync_max_offset,
3069 esp_dev->sync_min_period,
3070 esp->config3[scmd_id(SCptr)]));
3071
3072 esp->snip = 0;
3073 } else if(esp_dev->sync_max_offset) {
3074 unchar bit;
3075
3076 /* back to async mode */
3077 ESPSDTR(("unaccaptable sync nego, forcing async\n"));
3078 esp_dev->sync_max_offset = 0;
3079 esp_dev->sync_min_period = 0;
3080 esp->prev_soff = 0;
3081 esp_write(eregs->esp_soff, 0);
3082 esp->prev_stp = 0;
3083 esp_write(eregs->esp_stp, 0);
3084 if(esp->erev > esp236) {
3085 if(esp->erev == fas100a)
3086 bit = ESP_CONFIG3_FAST;
3087 else
3088 bit = ESP_CONFIG3_FSCSI;
3089 esp->config3[SCptr->device->id] &= ~bit;
3090 esp->prev_cfg3 = esp->config3[SCptr->device->id];
3091 esp_write(eregs->esp_cfg3, esp->prev_cfg3);
3092 }
3093 }
3094
3095 sync_report(esp);
3096
3097 ESPSDTR(("chk multibyte msg: sync is known, "));
3098 esp_dev->sync = 1;
3099
3100 if(message_out) {
3101 ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
3102 esp->esp_id));
3103 build_sync_nego_msg(esp, period, offset);
3104 esp_advance_phase(SCptr, in_the_dark);
3105 return EXTENDED_MESSAGE;
3106 }
3107
3108 ESPSDTR(("returning zero\n"));
3109 esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
3110 return 0;
3111 } else if(esp->cur_msgin[2] == EXTENDED_WDTR) {
3112 ESPLOG(("esp%d: AIEEE wide msg received\n", esp->esp_id));
3113 message_out = MESSAGE_REJECT;
3114 } else if(esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
3115 ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
3116 message_out = MESSAGE_REJECT;
3117 }
3118 esp_advance_phase(SCptr, in_the_dark);
3119 return message_out;
3120}
3121
3122static int esp_do_msgindone(struct NCR_ESP *esp, struct ESP_regs *eregs)
3123{
3124 Scsi_Cmnd *SCptr = esp->current_SC;
3125 int message_out = 0, it = 0, rval;
3126
3127 rval = skipahead1(esp, eregs, SCptr, in_msgin, in_msgindone);
3128 if(rval)
3129 return rval;
3130 if(SCptr->SCp.sent_command != in_status) {
3131 if(!(esp->ireg & ESP_INTR_DC)) {
3132 if(esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
3133 message_out = MSG_PARITY_ERROR;
3134 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
3135 } else if((it = (esp_read(eregs->esp_fflags) & ESP_FF_FBYTES))!=1) {
3136 /* We certainly dropped the ball somewhere. */
3137 message_out = INITIATOR_ERROR;
3138 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
3139 } else if(!esp->msgin_len) {
3140 it = esp_read(eregs->esp_fdata);
3141 esp_advance_phase(SCptr, in_msgincont);
3142 } else {
3143 /* it is ok and we want it */
3144 it = esp->cur_msgin[esp->msgin_ctr] =
3145 esp_read(eregs->esp_fdata);
3146 esp->msgin_ctr++;
3147 }
3148 } else {
3149 esp_advance_phase(SCptr, in_the_dark);
3150 return do_work_bus;
3151 }
3152 } else {
3153 it = esp->cur_msgin[0];
3154 }
3155 if(!message_out && esp->msgin_len) {
3156 if(esp->msgin_ctr < esp->msgin_len) {
3157 esp_advance_phase(SCptr, in_msgincont);
3158 } else if(esp->msgin_len == 1) {
3159 message_out = check_singlebyte_msg(esp, eregs);
3160 } else if(esp->msgin_len == 2) {
3161 if(esp->cur_msgin[0] == EXTENDED_MESSAGE) {
3162 if((it+2) >= 15) {
3163 message_out = MESSAGE_REJECT;
3164 } else {
3165 esp->msgin_len = (it + 2);
3166 esp_advance_phase(SCptr, in_msgincont);
3167 }
3168 } else {
3169 message_out = MESSAGE_REJECT; /* foo on you */
3170 }
3171 } else {
3172 message_out = check_multibyte_msg(esp, eregs);
3173 }
3174 }
3175 if(message_out < 0) {
3176 return -message_out;
3177 } else if(message_out) {
3178 if(((message_out != 1) &&
3179 ((message_out < 0x20) || (message_out & 0x80))))
3180 esp->msgout_len = 1;
3181 esp->cur_msgout[0] = message_out;
3182 esp_cmd(esp, eregs, ESP_CMD_SATN);
3183 esp_advance_phase(SCptr, in_the_dark);
3184 esp->msgin_len = 0;
3185 }
3186 esp->sreg = esp_read(eregs->esp_status);
3187 esp->sreg &= ~(ESP_STAT_INTR);
3188 if((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
3189 esp_cmd(esp, eregs, ESP_CMD_MOK);
3190 if((SCptr->SCp.sent_command == in_msgindone) &&
3191 (SCptr->SCp.phase == in_freeing))
3192 return esp_do_freebus(esp, eregs);
3193 return do_intr_end;
3194}
3195
3196static int esp_do_cmdbegin(struct NCR_ESP *esp, struct ESP_regs *eregs)
3197{
3198 unsigned char tmp;
3199 Scsi_Cmnd *SCptr = esp->current_SC;
3200
3201 esp_advance_phase(SCptr, in_cmdend);
3202 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
3203 tmp = *esp->esp_scmdp++;
3204 esp->esp_scmdleft--;
3205 esp_write(eregs->esp_fdata, tmp);
3206 esp_cmd(esp, eregs, ESP_CMD_TI);
3207 return do_intr_end;
3208}
3209
3210static int esp_do_cmddone(struct NCR_ESP *esp, struct ESP_regs *eregs)
3211{
3212 esp_cmd(esp, eregs, ESP_CMD_NULL);
3213 if(esp->ireg & ESP_INTR_BSERV) {
3214 esp_advance_phase(esp->current_SC, in_the_dark);
3215 return esp_do_phase_determine(esp, eregs);
3216 }
3217 ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
3218 esp->esp_id));
3219 return do_reset_bus;
3220}
3221
3222static int esp_do_msgout(struct NCR_ESP *esp, struct ESP_regs *eregs)
3223{
3224 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
3225 switch(esp->msgout_len) {
3226 case 1:
3227 esp_write(eregs->esp_fdata, esp->cur_msgout[0]);
3228 esp_cmd(esp, eregs, ESP_CMD_TI);
3229 break;
3230
3231 case 2:
3232 if(esp->do_pio_cmds){
3233 esp_write(eregs->esp_fdata, esp->cur_msgout[0]);
3234 esp_write(eregs->esp_fdata, esp->cur_msgout[1]);
3235 esp_cmd(esp, eregs, ESP_CMD_TI);
3236 } else {
3237 esp->esp_command[0] = esp->cur_msgout[0];
3238 esp->esp_command[1] = esp->cur_msgout[1];
3239 esp->dma_setup(esp, esp->esp_command_dvma, 2, 0);
3240 esp_setcount(eregs, 2);
3241 esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
3242 }
3243 break;
3244
3245 case 4:
3246 esp->snip = 1;
3247 if(esp->do_pio_cmds){
3248 esp_write(eregs->esp_fdata, esp->cur_msgout[0]);
3249 esp_write(eregs->esp_fdata, esp->cur_msgout[1]);
3250 esp_write(eregs->esp_fdata, esp->cur_msgout[2]);
3251 esp_write(eregs->esp_fdata, esp->cur_msgout[3]);
3252 esp_cmd(esp, eregs, ESP_CMD_TI);
3253 } else {
3254 esp->esp_command[0] = esp->cur_msgout[0];
3255 esp->esp_command[1] = esp->cur_msgout[1];
3256 esp->esp_command[2] = esp->cur_msgout[2];
3257 esp->esp_command[3] = esp->cur_msgout[3];
3258 esp->dma_setup(esp, esp->esp_command_dvma, 4, 0);
3259 esp_setcount(eregs, 4);
3260 esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
3261 }
3262 break;
3263
3264 case 5:
3265 esp->snip = 1;
3266 if(esp->do_pio_cmds){
3267 esp_write(eregs->esp_fdata, esp->cur_msgout[0]);
3268 esp_write(eregs->esp_fdata, esp->cur_msgout[1]);
3269 esp_write(eregs->esp_fdata, esp->cur_msgout[2]);
3270 esp_write(eregs->esp_fdata, esp->cur_msgout[3]);
3271 esp_write(eregs->esp_fdata, esp->cur_msgout[4]);
3272 esp_cmd(esp, eregs, ESP_CMD_TI);
3273 } else {
3274 esp->esp_command[0] = esp->cur_msgout[0];
3275 esp->esp_command[1] = esp->cur_msgout[1];
3276 esp->esp_command[2] = esp->cur_msgout[2];
3277 esp->esp_command[3] = esp->cur_msgout[3];
3278 esp->esp_command[4] = esp->cur_msgout[4];
3279 esp->dma_setup(esp, esp->esp_command_dvma, 5, 0);
3280 esp_setcount(eregs, 5);
3281 esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
3282 }
3283 break;
3284
3285 default:
3286 /* whoops */
3287 ESPMISC(("bogus msgout sending NOP\n"));
3288 esp->cur_msgout[0] = NOP;
3289 esp_write(eregs->esp_fdata, esp->cur_msgout[0]);
3290 esp->msgout_len = 1;
3291 esp_cmd(esp, eregs, ESP_CMD_TI);
3292 break;
3293 }
3294 esp_advance_phase(esp->current_SC, in_msgoutdone);
3295 return do_intr_end;
3296}
3297
3298static int esp_do_msgoutdone(struct NCR_ESP *esp,
3299 struct ESP_regs *eregs)
3300{
3301 if((esp->msgout_len > 1) && esp->dma_barrier)
3302 esp->dma_barrier(esp);
3303
3304 if(!(esp->ireg & ESP_INTR_DC)) {
3305 esp_cmd(esp, eregs, ESP_CMD_NULL);
3306 switch(esp->sreg & ESP_STAT_PMASK) {
3307 case ESP_MOP:
3308 /* whoops, parity error */
3309 ESPLOG(("esp%d: still in msgout, parity error assumed\n",
3310 esp->esp_id));
3311 if(esp->msgout_len > 1)
3312 esp_cmd(esp, eregs, ESP_CMD_SATN);
3313 esp_advance_phase(esp->current_SC, in_msgout);
3314 return do_work_bus;
3315
3316 case ESP_DIP:
3317 break;
3318
3319 default:
3320 if(!fcount(esp, eregs) &&
3321 !(((struct esp_device *)esp->current_SC->device->hostdata)->sync_max_offset))
3322 esp_cmd(esp, eregs, ESP_CMD_FLUSH);
3323 break;
3324
3325 };
3326 }
3327
3328 /* If we sent out a synchronous negotiation message, update
3329 * our state.
3330 */
3331 if(esp->cur_msgout[2] == EXTENDED_MESSAGE &&
3332 esp->cur_msgout[4] == EXTENDED_SDTR) {
3333 esp->snip = 1; /* anal retentiveness... */
3334 }
3335
3336 esp->prevmsgout = esp->cur_msgout[0];
3337 esp->msgout_len = 0;
3338 esp_advance_phase(esp->current_SC, in_the_dark);
3339 return esp_do_phase_determine(esp, eregs);
3340}
3341
3342static int esp_bus_unexpected(struct NCR_ESP *esp, struct ESP_regs *eregs)
3343{
3344 ESPLOG(("esp%d: command in weird state %2x\n",
3345 esp->esp_id, esp->current_SC->SCp.phase));
3346 return do_reset_bus;
3347}
3348
3349static espfunc_t bus_vector[] = {
3350 esp_do_data_finale,
3351 esp_do_data_finale,
3352 esp_bus_unexpected,
3353 esp_do_msgin,
3354 esp_do_msgincont,
3355 esp_do_msgindone,
3356 esp_do_msgout,
3357 esp_do_msgoutdone,
3358 esp_do_cmdbegin,
3359 esp_do_cmddone,
3360 esp_do_status,
3361 esp_do_freebus,
3362 esp_do_phase_determine,
3363 esp_bus_unexpected,
3364 esp_bus_unexpected,
3365 esp_bus_unexpected,
3366};
3367
3368/* This is the second tier in our dual-level SCSI state machine. */
3369static int esp_work_bus(struct NCR_ESP *esp, struct ESP_regs *eregs)
3370{
3371 Scsi_Cmnd *SCptr = esp->current_SC;
3372 unsigned int phase;
3373
3374 ESPBUS(("esp_work_bus: "));
3375 if(!SCptr) {
3376 ESPBUS(("reconnect\n"));
3377 return esp_do_reconnect(esp, eregs);
3378 }
3379 phase = SCptr->SCp.phase;
3380 if ((phase & 0xf0) == in_phases_mask)
3381 return bus_vector[(phase & 0x0f)](esp, eregs);
3382 else if((phase & 0xf0) == in_slct_mask)
3383 return esp_select_complete(esp, eregs);
3384 else
3385 return esp_bus_unexpected(esp, eregs);
3386}
3387
3388static espfunc_t isvc_vector[] = {
3389 NULL,
3390 esp_do_phase_determine,
3391 esp_do_resetbus,
3392 esp_finish_reset,
3393 esp_work_bus
3394};
3395
3396/* Main interrupt handler for an esp adapter. */
3397void esp_handle(struct NCR_ESP *esp)
3398{
3399 struct ESP_regs *eregs;
3400 Scsi_Cmnd *SCptr;
3401 int what_next = do_intr_end;
3402 eregs = esp->eregs;
3403 SCptr = esp->current_SC;
3404
3405 if(esp->dma_irq_entry)
3406 esp->dma_irq_entry(esp);
3407
3408 /* Check for errors. */
3409 esp->sreg = esp_read(eregs->esp_status);
3410 esp->sreg &= (~ESP_STAT_INTR);
3411 esp->seqreg = (esp_read(eregs->esp_sstep) & ESP_STEP_VBITS);
3412 esp->ireg = esp_read(eregs->esp_intrpt); /* Unlatch intr and stat regs */
3413 ESPIRQ(("handle_irq: [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
3414 esp->sreg, esp->seqreg, esp->ireg));
3415 if(esp->sreg & (ESP_STAT_SPAM)) {
3416 /* Gross error, could be due to one of:
3417 *
3418 * - top of fifo overwritten, could be because
3419 * we tried to do a synchronous transfer with
3420 * an offset greater than ESP fifo size
3421 *
3422 * - top of command register overwritten
3423 *
3424 * - DMA setup to go in one direction, SCSI
3425 * bus points in the other, whoops
3426 *
3427 * - weird phase change during asynchronous
3428 * data phase while we are initiator
3429 */
3430 ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg));
3431
3432 /* If a command is live on the bus we cannot safely
3433 * reset the bus, so we'll just let the pieces fall
3434 * where they may. Here we are hoping that the
3435 * target will be able to cleanly go away soon
3436 * so we can safely reset things.
3437 */
3438 if(!SCptr) {
3439 ESPLOG(("esp%d: No current cmd during gross error, "
3440 "resetting bus\n", esp->esp_id));
3441 what_next = do_reset_bus;
3442 goto state_machine;
3443 }
3444 }
3445
3446 /* No current cmd is only valid at this point when there are
3447 * commands off the bus or we are trying a reset.
3448 */
3449 if(!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) {
3450 /* Panic is safe, since current_SC is null. */
3451 ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id));
3452 panic("esp_handle: current_SC == penguin within interrupt!");
3453 }
3454
3455 if(esp->ireg & (ESP_INTR_IC)) {
3456 /* Illegal command fed to ESP. Outside of obvious
3457 * software bugs that could cause this, there is
3458 * a condition with ESP100 where we can confuse the
3459 * ESP into an erroneous illegal command interrupt
3460 * because it does not scrape the FIFO properly
3461 * for reselection. See esp100_reconnect_hwbug()
3462 * to see how we try very hard to avoid this.
3463 */
3464 ESPLOG(("esp%d: invalid command\n", esp->esp_id));
3465
3466 esp_dump_state(esp, eregs);
3467
3468 if(SCptr) {
3469 /* Devices with very buggy firmware can drop BSY
3470 * during a scatter list interrupt when using sync
3471 * mode transfers. We continue the transfer as
3472 * expected, the target drops the bus, the ESP
3473 * gets confused, and we get a illegal command
3474 * interrupt because the bus is in the disconnected
3475 * state now and ESP_CMD_TI is only allowed when
3476 * a nexus is alive on the bus.
3477 */
3478 ESPLOG(("esp%d: Forcing async and disabling disconnect for "
3479 "target %d\n", esp->esp_id, SCptr->device->id));
3480 SCptr->device->borken = 1; /* foo on you */
3481 }
3482
3483 what_next = do_reset_bus;
3484 } else if(!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) {
3485 int phase;
3486
3487 if(SCptr) {
3488 phase = SCptr->SCp.phase;
3489 if(phase & in_phases_mask) {
3490 what_next = esp_work_bus(esp, eregs);
3491 } else if(phase & in_slct_mask) {
3492 what_next = esp_select_complete(esp, eregs);
3493 } else {
3494 ESPLOG(("esp%d: interrupt for no good reason...\n",
3495 esp->esp_id));
3496 what_next = do_intr_end;
3497 }
3498 } else {
3499 ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
3500 esp->esp_id));
3501 what_next = do_reset_bus;
3502 }
3503 } else if(esp->ireg & ESP_INTR_SR) {
3504 ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id));
3505 what_next = do_reset_complete;
3506 } else if(esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) {
3507 ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
3508 esp->esp_id));
3509 what_next = do_reset_bus;
3510 } else if(esp->ireg & ESP_INTR_RSEL) {
3511 if(!SCptr) {
3512 /* This is ok. */
3513 what_next = esp_do_reconnect(esp, eregs);
3514 } else if(SCptr->SCp.phase & in_slct_mask) {
3515 /* Only selection code knows how to clean
3516 * up properly.
3517 */
3518 ESPDISC(("Reselected during selection attempt\n"));
3519 what_next = esp_select_complete(esp, eregs);
3520 } else {
3521 ESPLOG(("esp%d: Reselected while bus is busy\n",
3522 esp->esp_id));
3523 what_next = do_reset_bus;
3524 }
3525 }
3526
3527 /* This is tier-one in our dual level SCSI state machine. */
3528state_machine:
3529 while(what_next != do_intr_end) {
3530 if (what_next >= do_phase_determine &&
3531 what_next < do_intr_end)
3532 what_next = isvc_vector[what_next](esp, eregs);
3533 else {
3534 /* state is completely lost ;-( */
3535 ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
3536 esp->esp_id));
3537 what_next = do_reset_bus;
3538 }
3539 }
3540 if(esp->dma_irq_exit)
3541 esp->dma_irq_exit(esp);
3542}
3543EXPORT_SYMBOL(esp_handle);
3544
3545#ifndef CONFIG_SMP
3546irqreturn_t esp_intr(int irq, void *dev_id)
3547{
3548 struct NCR_ESP *esp;
3549 unsigned long flags;
3550 int again;
3551 struct Scsi_Host *dev = dev_id;
3552
3553 /* Handle all ESP interrupts showing at this IRQ level. */
3554 spin_lock_irqsave(dev->host_lock, flags);
3555repeat:
3556 again = 0;
3557 for_each_esp(esp) {
3558#ifndef __mips__
3559 if(((esp)->irq & 0xff) == irq) {
3560#endif
3561 if(esp->dma_irq_p(esp)) {
3562 again = 1;
3563
3564 esp->dma_ints_off(esp);
3565
3566 ESPIRQ(("I%d(", esp->esp_id));
3567 esp_handle(esp);
3568 ESPIRQ((")"));
3569
3570 esp->dma_ints_on(esp);
3571 }
3572#ifndef __mips__
3573 }
3574#endif
3575 }
3576 if(again)
3577 goto repeat;
3578 spin_unlock_irqrestore(dev->host_lock, flags);
3579 return IRQ_HANDLED;
3580}
3581#else
3582/* For SMP we only service one ESP on the list list at our IRQ level! */
3583irqreturn_t esp_intr(int irq, void *dev_id)
3584{
3585 struct NCR_ESP *esp;
3586 unsigned long flags;
3587 struct Scsi_Host *dev = dev_id;
3588
3589 /* Handle all ESP interrupts showing at this IRQ level. */
3590 spin_lock_irqsave(dev->host_lock, flags);
3591 for_each_esp(esp) {
3592 if(((esp)->irq & 0xf) == irq) {
3593 if(esp->dma_irq_p(esp)) {
3594 esp->dma_ints_off(esp);
3595
3596 ESPIRQ(("I[%d:%d](",
3597 smp_processor_id(), esp->esp_id));
3598 esp_handle(esp);
3599 ESPIRQ((")"));
3600
3601 esp->dma_ints_on(esp);
3602 goto out;
3603 }
3604 }
3605 }
3606out:
3607 spin_unlock_irqrestore(dev->host_lock, flags);
3608 return IRQ_HANDLED;
3609}
3610#endif
3611
3612int esp_slave_alloc(struct scsi_device *SDptr)
3613{
3614 struct esp_device *esp_dev =
3615 kzalloc(sizeof(struct esp_device), GFP_ATOMIC);
3616
3617 if (!esp_dev)
3618 return -ENOMEM;
3619 SDptr->hostdata = esp_dev;
3620 return 0;
3621}
3622
3623void esp_slave_destroy(struct scsi_device *SDptr)
3624{
3625 struct NCR_ESP *esp = (struct NCR_ESP *) SDptr->host->hostdata;
3626
3627 esp->targets_present &= ~(1 << sdev_id(SDptr));
3628 kfree(SDptr->hostdata);
3629 SDptr->hostdata = NULL;
3630}
3631
3632#ifdef MODULE
3633int init_module(void) { return 0; }
3634void cleanup_module(void) {}
3635void esp_release(void)
3636{
3637 esps_in_use--;
3638 esps_running = esps_in_use;
3639}
3640EXPORT_SYMBOL(esp_release);
3641#endif
3642
3643EXPORT_SYMBOL(esp_abort);
3644EXPORT_SYMBOL(esp_allocate);
3645EXPORT_SYMBOL(esp_deallocate);
3646EXPORT_SYMBOL(esp_initialize);
3647EXPORT_SYMBOL(esp_intr);
3648EXPORT_SYMBOL(esp_queue);
3649EXPORT_SYMBOL(esp_reset);
3650EXPORT_SYMBOL(esp_slave_alloc);
3651EXPORT_SYMBOL(esp_slave_destroy);
3652EXPORT_SYMBOL(esps_in_use);
3653
3654MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/NCR53C9x.h b/drivers/scsi/NCR53C9x.h
deleted file mode 100644
index 00a0ba040dba..000000000000
--- a/drivers/scsi/NCR53C9x.h
+++ /dev/null
@@ -1,668 +0,0 @@
1/* NCR53C9x.c: Defines and structures for the NCR53C9x generic driver.
2 *
3 * Originally esp.h: Defines and structures for the Sparc ESP
4 * (Enhanced SCSI Processor) driver under Linux.
5 *
6 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
7 *
8 * Generalization by Jesper Skov (jskov@cygnus.co.uk)
9 *
10 * More generalization (for i386 stuff) by Tymm Twillman (tymm@computer.org)
11 */
12
13#ifndef NCR53C9X_H
14#define NCR53C9X_H
15
16#include <linux/interrupt.h>
17
18/* djweis for mac driver */
19#if defined(CONFIG_MAC)
20#define PAD_SIZE 15
21#else
22#define PAD_SIZE 3
23#endif
24
25/* Handle multiple hostadapters on Amiga
26 * generally PAD_SIZE = 3
27 * but there is one exception: Oktagon (PAD_SIZE = 1) */
28#if defined(CONFIG_OKTAGON_SCSI) || defined(CONFIG_OKTAGON_SCSI_MODULE)
29#undef PAD_SIZE
30#if defined(CONFIG_BLZ1230_SCSI) || defined(CONFIG_BLZ1230_SCSI_MODULE) || \
31 defined(CONFIG_BLZ2060_SCSI) || defined(CONFIG_BLZ2060_SCSI_MODULE) || \
32 defined(CONFIG_CYBERSTORM_SCSI) || defined(CONFIG_CYBERSTORM_SCSI_MODULE) || \
33 defined(CONFIG_CYBERSTORMII_SCSI) || defined(CONFIG_CYBERSTORMII_SCSI_MODULE) || \
34 defined(CONFIG_FASTLANE_SCSI) || defined(CONFIG_FASTLANE_SCSI_MODULE)
35#define MULTIPLE_PAD_SIZES
36#else
37#define PAD_SIZE 1
38#endif
39#endif
40
41/* Macros for debugging messages */
42
43#define DEBUG_ESP
44/* #define DEBUG_ESP_DATA */
45/* #define DEBUG_ESP_QUEUE */
46/* #define DEBUG_ESP_DISCONNECT */
47/* #define DEBUG_ESP_STATUS */
48/* #define DEBUG_ESP_PHASES */
49/* #define DEBUG_ESP_WORKBUS */
50/* #define DEBUG_STATE_MACHINE */
51/* #define DEBUG_ESP_CMDS */
52/* #define DEBUG_ESP_IRQS */
53/* #define DEBUG_SDTR */
54/* #define DEBUG_ESP_SG */
55
56/* Use the following to sprinkle debugging messages in a way which
57 * suits you if combinations of the above become too verbose when
58 * trying to track down a specific problem.
59 */
60/* #define DEBUG_ESP_MISC */
61
62#if defined(DEBUG_ESP)
63#define ESPLOG(foo) printk foo
64#else
65#define ESPLOG(foo)
66#endif /* (DEBUG_ESP) */
67
68#if defined(DEBUG_ESP_DATA)
69#define ESPDATA(foo) printk foo
70#else
71#define ESPDATA(foo)
72#endif
73
74#if defined(DEBUG_ESP_QUEUE)
75#define ESPQUEUE(foo) printk foo
76#else
77#define ESPQUEUE(foo)
78#endif
79
80#if defined(DEBUG_ESP_DISCONNECT)
81#define ESPDISC(foo) printk foo
82#else
83#define ESPDISC(foo)
84#endif
85
86#if defined(DEBUG_ESP_STATUS)
87#define ESPSTAT(foo) printk foo
88#else
89#define ESPSTAT(foo)
90#endif
91
92#if defined(DEBUG_ESP_PHASES)
93#define ESPPHASE(foo) printk foo
94#else
95#define ESPPHASE(foo)
96#endif
97
98#if defined(DEBUG_ESP_WORKBUS)
99#define ESPBUS(foo) printk foo
100#else
101#define ESPBUS(foo)
102#endif
103
104#if defined(DEBUG_ESP_IRQS)
105#define ESPIRQ(foo) printk foo
106#else
107#define ESPIRQ(foo)
108#endif
109
110#if defined(DEBUG_SDTR)
111#define ESPSDTR(foo) printk foo
112#else
113#define ESPSDTR(foo)
114#endif
115
116#if defined(DEBUG_ESP_MISC)
117#define ESPMISC(foo) printk foo
118#else
119#define ESPMISC(foo)
120#endif
121
122/*
123 * padding for register structure
124 */
125#ifdef CONFIG_JAZZ_ESP
126#define EREGS_PAD(n)
127#else
128#ifndef MULTIPLE_PAD_SIZES
129#define EREGS_PAD(n) unchar n[PAD_SIZE];
130#endif
131#endif
132
133/* The ESP SCSI controllers have their register sets in three
134 * "classes":
135 *
136 * 1) Registers which are both read and write.
137 * 2) Registers which are read only.
138 * 3) Registers which are write only.
139 *
140 * Yet, they all live within the same IO space.
141 */
142
143#if !defined(__i386__) && !defined(__x86_64__)
144
145#ifndef MULTIPLE_PAD_SIZES
146
147#ifdef CONFIG_CPU_HAS_WB
148#include <asm/wbflush.h>
149#define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
150#else
151#define esp_write(__reg, __val) ((__reg) = (__val))
152#endif
153#define esp_read(__reg) (__reg)
154
155struct ESP_regs {
156 /* Access Description Offset */
157 volatile unchar esp_tclow; /* rw Low bits of the transfer count 0x00 */
158 EREGS_PAD(tlpad1);
159 volatile unchar esp_tcmed; /* rw Mid bits of the transfer count 0x04 */
160 EREGS_PAD(fdpad);
161 volatile unchar esp_fdata; /* rw FIFO data bits 0x08 */
162 EREGS_PAD(cbpad);
163 volatile unchar esp_cmnd; /* rw SCSI command bits 0x0c */
164 EREGS_PAD(stpad);
165 volatile unchar esp_status; /* ro ESP status register 0x10 */
166#define esp_busid esp_status /* wo Bus ID for select/reselect 0x10 */
167 EREGS_PAD(irqpd);
168 volatile unchar esp_intrpt; /* ro Kind of interrupt 0x14 */
169#define esp_timeo esp_intrpt /* wo Timeout value for select/resel 0x14 */
170 EREGS_PAD(sspad);
171 volatile unchar esp_sstep; /* ro Sequence step register 0x18 */
172#define esp_stp esp_sstep /* wo Transfer period per sync 0x18 */
173 EREGS_PAD(ffpad);
174 volatile unchar esp_fflags; /* ro Bits of current FIFO info 0x1c */
175#define esp_soff esp_fflags /* wo Sync offset 0x1c */
176 EREGS_PAD(cf1pd);
177 volatile unchar esp_cfg1; /* rw First configuration register 0x20 */
178 EREGS_PAD(cfpad);
179 volatile unchar esp_cfact; /* wo Clock conversion factor 0x24 */
180 EREGS_PAD(ctpad);
181 volatile unchar esp_ctest; /* wo Chip test register 0x28 */
182 EREGS_PAD(cf2pd);
183 volatile unchar esp_cfg2; /* rw Second configuration register 0x2c */
184 EREGS_PAD(cf3pd);
185
186 /* The following is only found on the 53C9X series SCSI chips */
187 volatile unchar esp_cfg3; /* rw Third configuration register 0x30 */
188 EREGS_PAD(cf4pd);
189 volatile unchar esp_cfg4; /* rw Fourth configuration register 0x34 */
190 EREGS_PAD(thpd);
191 /* The following is found on all chips except the NCR53C90 (ESP100) */
192 volatile unchar esp_tchi; /* rw High bits of transfer count 0x38 */
193#define esp_uid esp_tchi /* ro Unique ID code 0x38 */
194 EREGS_PAD(fgpad);
195 volatile unchar esp_fgrnd; /* rw Data base for fifo 0x3c */
196};
197
198#else /* MULTIPLE_PAD_SIZES */
199
200#define esp_write(__reg, __val) (*(__reg) = (__val))
201#define esp_read(__reg) (*(__reg))
202
203struct ESP_regs {
204 unsigned char io_addr[64]; /* dummy */
205 /* Access Description Offset */
206#define esp_tclow io_addr /* rw Low bits of the transfer count 0x00 */
207#define esp_tcmed io_addr + (1<<(esp->shift)) /* rw Mid bits of the transfer count 0x04 */
208#define esp_fdata io_addr + (2<<(esp->shift)) /* rw FIFO data bits 0x08 */
209#define esp_cmnd io_addr + (3<<(esp->shift)) /* rw SCSI command bits 0x0c */
210#define esp_status io_addr + (4<<(esp->shift)) /* ro ESP status register 0x10 */
211#define esp_busid esp_status /* wo Bus ID for select/reselect 0x10 */
212#define esp_intrpt io_addr + (5<<(esp->shift)) /* ro Kind of interrupt 0x14 */
213#define esp_timeo esp_intrpt /* wo Timeout value for select/resel 0x14 */
214#define esp_sstep io_addr + (6<<(esp->shift)) /* ro Sequence step register 0x18 */
215#define esp_stp esp_sstep /* wo Transfer period per sync 0x18 */
216#define esp_fflags io_addr + (7<<(esp->shift)) /* ro Bits of current FIFO info 0x1c */
217#define esp_soff esp_fflags /* wo Sync offset 0x1c */
218#define esp_cfg1 io_addr + (8<<(esp->shift)) /* rw First configuration register 0x20 */
219#define esp_cfact io_addr + (9<<(esp->shift)) /* wo Clock conversion factor 0x24 */
220#define esp_ctest io_addr + (10<<(esp->shift)) /* wo Chip test register 0x28 */
221#define esp_cfg2 io_addr + (11<<(esp->shift)) /* rw Second configuration register 0x2c */
222
223 /* The following is only found on the 53C9X series SCSI chips */
224#define esp_cfg3 io_addr + (12<<(esp->shift)) /* rw Third configuration register 0x30 */
225#define esp_cfg4 io_addr + (13<<(esp->shift)) /* rw Fourth configuration register 0x34 */
226
227 /* The following is found on all chips except the NCR53C90 (ESP100) */
228#define esp_tchi io_addr + (14<<(esp->shift)) /* rw High bits of transfer count 0x38 */
229#define esp_uid esp_tchi /* ro Unique ID code 0x38 */
230#define esp_fgrnd io_addr + (15<<(esp->shift)) /* rw Data base for fifo 0x3c */
231};
232
233#endif
234
235#else /* !defined(__i386__) && !defined(__x86_64__) */
236
237#define esp_write(__reg, __val) outb((__val), (__reg))
238#define esp_read(__reg) inb((__reg))
239
240struct ESP_regs {
241 unsigned int io_addr;
242 /* Access Description Offset */
243#define esp_tclow io_addr /* rw Low bits of the transfer count 0x00 */
244#define esp_tcmed io_addr + 1 /* rw Mid bits of the transfer count 0x04 */
245#define esp_fdata io_addr + 2 /* rw FIFO data bits 0x08 */
246#define esp_cmnd io_addr + 3 /* rw SCSI command bits 0x0c */
247#define esp_status io_addr + 4 /* ro ESP status register 0x10 */
248#define esp_busid esp_status /* wo Bus ID for select/reselect 0x10 */
249#define esp_intrpt io_addr + 5 /* ro Kind of interrupt 0x14 */
250#define esp_timeo esp_intrpt /* wo Timeout value for select/resel 0x14 */
251#define esp_sstep io_addr + 6 /* ro Sequence step register 0x18 */
252#define esp_stp esp_sstep /* wo Transfer period per sync 0x18 */
253#define esp_fflags io_addr + 7 /* ro Bits of current FIFO info 0x1c */
254#define esp_soff esp_fflags /* wo Sync offset 0x1c */
255#define esp_cfg1 io_addr + 8 /* rw First configuration register 0x20 */
256#define esp_cfact io_addr + 9 /* wo Clock conversion factor 0x24 */
257#define esp_ctest io_addr + 10 /* wo Chip test register 0x28 */
258#define esp_cfg2 io_addr + 11 /* rw Second configuration register 0x2c */
259
260 /* The following is only found on the 53C9X series SCSI chips */
261#define esp_cfg3 io_addr + 12 /* rw Third configuration register 0x30 */
262#define esp_cfg4 io_addr + 13 /* rw Fourth configuration register 0x34 */
263
264 /* The following is found on all chips except the NCR53C90 (ESP100) */
265#define esp_tchi io_addr + 14 /* rw High bits of transfer count 0x38 */
266#define esp_uid esp_tchi /* ro Unique ID code 0x38 */
267#define esp_fgrnd io_addr + 15 /* rw Data base for fifo 0x3c */
268};
269
270#endif /* !defined(__i386__) && !defined(__x86_64__) */
271
272/* Various revisions of the ESP board. */
273enum esp_rev {
274 esp100 = 0x00, /* NCR53C90 - very broken */
275 esp100a = 0x01, /* NCR53C90A */
276 esp236 = 0x02,
277 fas236 = 0x03,
278 fas100a = 0x04,
279 fast = 0x05,
280 fas366 = 0x06,
281 fas216 = 0x07,
282 fsc = 0x08, /* SYM53C94-2 */
283 espunknown = 0x09
284};
285
286/* We allocate one of these for each scsi device and attach it to
287 * SDptr->hostdata for use in the driver
288 */
289struct esp_device {
290 unsigned char sync_min_period;
291 unsigned char sync_max_offset;
292 unsigned sync:1;
293 unsigned wide:1;
294 unsigned disconnect:1;
295};
296
297/* We get one of these for each ESP probed. */
298struct NCR_ESP {
299 struct NCR_ESP *next; /* Next ESP on probed or NULL */
300 struct ESP_regs *eregs; /* All esp registers */
301 int dma; /* Who I do transfers with. */
302 void *dregs; /* And his registers. */
303 struct Scsi_Host *ehost; /* Backpointer to SCSI Host */
304
305 void *edev; /* Pointer to controller base/SBus */
306 int esp_id; /* Unique per-ESP ID number */
307
308 /* ESP Configuration Registers */
309 unsigned char config1; /* Copy of the 1st config register */
310 unsigned char config2; /* Copy of the 2nd config register */
311 unsigned char config3[16]; /* Copy of the 3rd config register */
312
313 /* The current command we are sending to the ESP chip. This esp_command
314 * ptr needs to be mapped in DVMA area so we can send commands and read
315 * from the ESP fifo without burning precious CPU cycles. Programmed I/O
316 * sucks when we have the DVMA to do it for us. The ESP is stupid and will
317 * only send out 6, 10, and 12 byte SCSI commands, others we need to send
318 * one byte at a time. esp_slowcmd being set says that we are doing one
319 * of the command types ESP doesn't understand, esp_scmdp keeps track of
320 * which byte we are sending, esp_scmdleft says how many bytes to go.
321 */
322 volatile unchar *esp_command; /* Location of command (CPU view) */
323 __u32 esp_command_dvma; /* Location of command (DVMA view) */
324 unsigned char esp_clen; /* Length of this command */
325 unsigned char esp_slowcmd;
326 unsigned char *esp_scmdp;
327 unsigned char esp_scmdleft;
328
329 /* The following are used to determine the cause of an IRQ. Upon every
330 * IRQ entry we synchronize these with the hardware registers.
331 */
332 unchar ireg; /* Copy of ESP interrupt register */
333 unchar sreg; /* Same for ESP status register */
334 unchar seqreg; /* The ESP sequence register */
335
336 /* The following is set when a premature interrupt condition is detected
337 * in some FAS revisions.
338 */
339 unchar fas_premature_intr_workaround;
340
341 /* To save register writes to the ESP, which can be expensive, we
342 * keep track of the previous value that various registers had for
343 * the last target we connected to. If they are the same for the
344 * current target, we skip the register writes as they are not needed.
345 */
346 unchar prev_soff, prev_stp, prev_cfg3;
347
348 /* For each target we keep track of save/restore data
349 * pointer information. This needs to be updated majorly
350 * when we add support for tagged queueing. -DaveM
351 */
352 struct esp_pointers {
353 char *saved_ptr;
354 struct scatterlist *saved_buffer;
355 int saved_this_residual;
356 int saved_buffers_residual;
357 } data_pointers[16] /*XXX [MAX_TAGS_PER_TARGET]*/;
358
359 /* Clock periods, frequencies, synchronization, etc. */
360 unsigned int cfreq; /* Clock frequency in HZ */
361 unsigned int cfact; /* Clock conversion factor */
362 unsigned int ccycle; /* One ESP clock cycle */
363 unsigned int ctick; /* One ESP clock time */
364 unsigned int radelay; /* FAST chip req/ack delay */
365 unsigned int neg_defp; /* Default negotiation period */
366 unsigned int sync_defp; /* Default sync transfer period */
367 unsigned int max_period; /* longest our period can be */
368 unsigned int min_period; /* shortest period we can withstand */
369 /* For slow to medium speed input clock rates we shoot for 5mb/s,
370 * but for high input clock rates we try to do 10mb/s although I
371 * don't think a transfer can even run that fast with an ESP even
372 * with DMA2 scatter gather pipelining.
373 */
374#define SYNC_DEFP_SLOW 0x32 /* 5mb/s */
375#define SYNC_DEFP_FAST 0x19 /* 10mb/s */
376
377 unsigned int snip; /* Sync. negotiation in progress */
378 unsigned int wnip; /* WIDE negotiation in progress */
379 unsigned int targets_present; /* targets spoken to before */
380
381 int current_transfer_size; /* Set at beginning of data dma */
382
383 unchar espcmdlog[32]; /* Log of current esp cmds sent. */
384 unchar espcmdent; /* Current entry in esp cmd log. */
385
386 /* Misc. info about this ESP */
387 enum esp_rev erev; /* ESP revision */
388 int irq; /* IRQ for this ESP */
389 int scsi_id; /* Who am I as initiator? */
390 int scsi_id_mask; /* Bitmask of 'me'. */
391 int diff; /* Differential SCSI bus? */
392 int slot; /* Slot the adapter occupies */
393
394 /* Our command queues, only one cmd lives in the current_SC queue. */
395 Scsi_Cmnd *issue_SC; /* Commands to be issued */
396 Scsi_Cmnd *current_SC; /* Who is currently working the bus */
397 Scsi_Cmnd *disconnected_SC; /* Commands disconnected from the bus */
398
399 /* Message goo */
400 unchar cur_msgout[16];
401 unchar cur_msgin[16];
402 unchar prevmsgout, prevmsgin;
403 unchar msgout_len, msgin_len;
404 unchar msgout_ctr, msgin_ctr;
405
406 /* States that we cannot keep in the per cmd structure because they
407 * cannot be assosciated with any specific command.
408 */
409 unchar resetting_bus;
410 wait_queue_head_t reset_queue;
411
412 unchar do_pio_cmds; /* Do command transfer with pio */
413
414 /* How much bits do we have to shift the registers */
415 unsigned char shift;
416
417 /* Functions handling DMA
418 */
419 /* Required functions */
420 int (*dma_bytes_sent)(struct NCR_ESP *, int);
421 int (*dma_can_transfer)(struct NCR_ESP *, Scsi_Cmnd *);
422 void (*dma_dump_state)(struct NCR_ESP *);
423 void (*dma_init_read)(struct NCR_ESP *, __u32, int);
424 void (*dma_init_write)(struct NCR_ESP *, __u32, int);
425 void (*dma_ints_off)(struct NCR_ESP *);
426 void (*dma_ints_on)(struct NCR_ESP *);
427 int (*dma_irq_p)(struct NCR_ESP *);
428 int (*dma_ports_p)(struct NCR_ESP *);
429 void (*dma_setup)(struct NCR_ESP *, __u32, int, int);
430
431 /* Optional functions (i.e. may be initialized to 0) */
432 void (*dma_barrier)(struct NCR_ESP *);
433 void (*dma_drain)(struct NCR_ESP *);
434 void (*dma_invalidate)(struct NCR_ESP *);
435 void (*dma_irq_entry)(struct NCR_ESP *);
436 void (*dma_irq_exit)(struct NCR_ESP *);
437 void (*dma_led_off)(struct NCR_ESP *);
438 void (*dma_led_on)(struct NCR_ESP *);
439 void (*dma_poll)(struct NCR_ESP *, unsigned char *);
440 void (*dma_reset)(struct NCR_ESP *);
441
442 /* Optional virtual DMA functions */
443 void (*dma_mmu_get_scsi_one)(struct NCR_ESP *, Scsi_Cmnd *);
444 void (*dma_mmu_get_scsi_sgl)(struct NCR_ESP *, Scsi_Cmnd *);
445 void (*dma_mmu_release_scsi_one)(struct NCR_ESP *, Scsi_Cmnd *);
446 void (*dma_mmu_release_scsi_sgl)(struct NCR_ESP *, Scsi_Cmnd *);
447 void (*dma_advance_sg)(Scsi_Cmnd *);
448};
449
450/* Bitfield meanings for the above registers. */
451
452/* ESP config reg 1, read-write, found on all ESP chips */
453#define ESP_CONFIG1_ID 0x07 /* My BUS ID bits */
454#define ESP_CONFIG1_CHTEST 0x08 /* Enable ESP chip tests */
455#define ESP_CONFIG1_PENABLE 0x10 /* Enable parity checks */
456#define ESP_CONFIG1_PARTEST 0x20 /* Parity test mode enabled? */
457#define ESP_CONFIG1_SRRDISAB 0x40 /* Disable SCSI reset reports */
458#define ESP_CONFIG1_SLCABLE 0x80 /* Enable slow cable mode */
459
460/* ESP config reg 2, read-write, found only on esp100a+esp200+esp236+fsc chips */
461#define ESP_CONFIG2_DMAPARITY 0x01 /* enable DMA Parity (200,236,fsc) */
462#define ESP_CONFIG2_REGPARITY 0x02 /* enable reg Parity (200,236,fsc) */
463#define ESP_CONFIG2_BADPARITY 0x04 /* Bad parity target abort */
464#define ESP_CONFIG2_SCSI2ENAB 0x08 /* Enable SCSI-2 features (tmode only) */
465#define ESP_CONFIG2_HI 0x10 /* High Impedance DREQ ??? */
466#define ESP_CONFIG2_HMEFENAB 0x10 /* HME features enable */
467#define ESP_CONFIG2_BCM 0x20 /* Enable byte-ctrl (236,fsc) */
468#define ESP_CONFIG2_FENAB 0x40 /* Enable features (fas100,esp216,fsc) */
469#define ESP_CONFIG2_SPL 0x40 /* Enable status-phase latch (esp236) */
470#define ESP_CONFIG2_RFB 0x80 /* Reserve FIFO byte (fsc) */
471#define ESP_CONFIG2_MAGIC 0xe0 /* Invalid bits... */
472
473/* ESP config register 3 read-write, found only esp236+fas236+fas100a+fsc chips */
474#define ESP_CONFIG3_FCLOCK 0x01 /* FAST SCSI clock rate (esp100a/fas366) */
475#define ESP_CONFIG3_TEM 0x01 /* Enable thresh-8 mode (esp/fas236/fsc) */
476#define ESP_CONFIG3_FAST 0x02 /* Enable FAST SCSI (esp100a) */
477#define ESP_CONFIG3_ADMA 0x02 /* Enable alternate-dma (esp/fas236/fsc) */
478#define ESP_CONFIG3_TENB 0x04 /* group2 SCSI2 support (esp100a) */
479#define ESP_CONFIG3_SRB 0x04 /* Save residual byte (esp/fas236/fsc) */
480#define ESP_CONFIG3_TMS 0x08 /* Three-byte msg's ok (esp100a) */
481#define ESP_CONFIG3_FCLK 0x08 /* Fast SCSI clock rate (esp/fas236/fsc) */
482#define ESP_CONFIG3_IDMSG 0x10 /* ID message checking (esp100a) */
483#define ESP_CONFIG3_FSCSI 0x10 /* Enable FAST SCSI (esp/fas236/fsc) */
484#define ESP_CONFIG3_GTM 0x20 /* group2 SCSI2 support (esp/fas236/fsc) */
485#define ESP_CONFIG3_TBMS 0x40 /* Three-byte msg's ok (esp/fas236/fsc) */
486#define ESP_CONFIG3_IMS 0x80 /* ID msg chk'ng (esp/fas236/fsc) */
487
488/* ESP config register 4 read-write, found only on fsc chips */
489#define ESP_CONFIG4_BBTE 0x01 /* Back-to-Back transfer enable */
490#define ESP_CONFIG4_TEST 0x02 /* Transfer counter test mode */
491#define ESP_CONFIG4_EAN 0x04 /* Enable Active Negotiation */
492
493/* ESP command register read-write */
494/* Group 1 commands: These may be sent at any point in time to the ESP
495 * chip. None of them can generate interrupts 'cept
496 * the "SCSI bus reset" command if you have not disabled
497 * SCSI reset interrupts in the config1 ESP register.
498 */
499#define ESP_CMD_NULL 0x00 /* Null command, ie. a nop */
500#define ESP_CMD_FLUSH 0x01 /* FIFO Flush */
501#define ESP_CMD_RC 0x02 /* Chip reset */
502#define ESP_CMD_RS 0x03 /* SCSI bus reset */
503
504/* Group 2 commands: ESP must be an initiator and connected to a target
505 * for these commands to work.
506 */
507#define ESP_CMD_TI 0x10 /* Transfer Information */
508#define ESP_CMD_ICCSEQ 0x11 /* Initiator cmd complete sequence */
509#define ESP_CMD_MOK 0x12 /* Message okie-dokie */
510#define ESP_CMD_TPAD 0x18 /* Transfer Pad */
511#define ESP_CMD_SATN 0x1a /* Set ATN */
512#define ESP_CMD_RATN 0x1b /* De-assert ATN */
513
514/* Group 3 commands: ESP must be in the MSGOUT or MSGIN state and be connected
515 * to a target as the initiator for these commands to work.
516 */
517#define ESP_CMD_SMSG 0x20 /* Send message */
518#define ESP_CMD_SSTAT 0x21 /* Send status */
519#define ESP_CMD_SDATA 0x22 /* Send data */
520#define ESP_CMD_DSEQ 0x23 /* Discontinue Sequence */
521#define ESP_CMD_TSEQ 0x24 /* Terminate Sequence */
522#define ESP_CMD_TCCSEQ 0x25 /* Target cmd cmplt sequence */
523#define ESP_CMD_DCNCT 0x27 /* Disconnect */
524#define ESP_CMD_RMSG 0x28 /* Receive Message */
525#define ESP_CMD_RCMD 0x29 /* Receive Command */
526#define ESP_CMD_RDATA 0x2a /* Receive Data */
527#define ESP_CMD_RCSEQ 0x2b /* Receive cmd sequence */
528
529/* Group 4 commands: The ESP must be in the disconnected state and must
530 * not be connected to any targets as initiator for
531 * these commands to work.
532 */
533#define ESP_CMD_RSEL 0x40 /* Reselect */
534#define ESP_CMD_SEL 0x41 /* Select w/o ATN */
535#define ESP_CMD_SELA 0x42 /* Select w/ATN */
536#define ESP_CMD_SELAS 0x43 /* Select w/ATN & STOP */
537#define ESP_CMD_ESEL 0x44 /* Enable selection */
538#define ESP_CMD_DSEL 0x45 /* Disable selections */
539#define ESP_CMD_SA3 0x46 /* Select w/ATN3 */
540#define ESP_CMD_RSEL3 0x47 /* Reselect3 */
541
542/* This bit enables the ESP's DMA */
543#define ESP_CMD_DMA 0x80 /* Do DMA? */
544
545/* ESP status register read-only */
546#define ESP_STAT_PIO 0x01 /* IO phase bit */
547#define ESP_STAT_PCD 0x02 /* CD phase bit */
548#define ESP_STAT_PMSG 0x04 /* MSG phase bit */
549#define ESP_STAT_PMASK 0x07 /* Mask of phase bits */
550#define ESP_STAT_TDONE 0x08 /* Transfer Completed */
551#define ESP_STAT_TCNT 0x10 /* Transfer Counter Is Zero */
552#define ESP_STAT_PERR 0x20 /* Parity error */
553#define ESP_STAT_SPAM 0x40 /* Real bad error */
554/* This indicates the 'interrupt pending' condition, it is a reserved
555 * bit on old revs of the ESP (ESP100, ESP100A, FAS100A).
556 */
557#define ESP_STAT_INTR 0x80 /* Interrupt */
558
559/* The status register can be masked with ESP_STAT_PMASK and compared
560 * with the following values to determine the current phase the ESP
561 * (at least thinks it) is in. For our purposes we also add our own
562 * software 'done' bit for our phase management engine.
563 */
564#define ESP_DOP (0) /* Data Out */
565#define ESP_DIP (ESP_STAT_PIO) /* Data In */
566#define ESP_CMDP (ESP_STAT_PCD) /* Command */
567#define ESP_STATP (ESP_STAT_PCD|ESP_STAT_PIO) /* Status */
568#define ESP_MOP (ESP_STAT_PMSG|ESP_STAT_PCD) /* Message Out */
569#define ESP_MIP (ESP_STAT_PMSG|ESP_STAT_PCD|ESP_STAT_PIO) /* Message In */
570
571/* ESP interrupt register read-only */
572#define ESP_INTR_S 0x01 /* Select w/o ATN */
573#define ESP_INTR_SATN 0x02 /* Select w/ATN */
574#define ESP_INTR_RSEL 0x04 /* Reselected */
575#define ESP_INTR_FDONE 0x08 /* Function done */
576#define ESP_INTR_BSERV 0x10 /* Bus service */
577#define ESP_INTR_DC 0x20 /* Disconnect */
578#define ESP_INTR_IC 0x40 /* Illegal command given */
579#define ESP_INTR_SR 0x80 /* SCSI bus reset detected */
580
581/* Interrupt status macros */
582#define ESP_SRESET_IRQ(esp) ((esp)->intreg & (ESP_INTR_SR))
583#define ESP_ILLCMD_IRQ(esp) ((esp)->intreg & (ESP_INTR_IC))
584#define ESP_SELECT_WITH_ATN_IRQ(esp) ((esp)->intreg & (ESP_INTR_SATN))
585#define ESP_SELECT_WITHOUT_ATN_IRQ(esp) ((esp)->intreg & (ESP_INTR_S))
586#define ESP_SELECTION_IRQ(esp) ((ESP_SELECT_WITH_ATN_IRQ(esp)) || \
587 (ESP_SELECT_WITHOUT_ATN_IRQ(esp)))
588#define ESP_RESELECTION_IRQ(esp) ((esp)->intreg & (ESP_INTR_RSEL))
589
590/* ESP sequence step register read-only */
591#define ESP_STEP_VBITS 0x07 /* Valid bits */
592#define ESP_STEP_ASEL 0x00 /* Selection&Arbitrate cmplt */
593#define ESP_STEP_SID 0x01 /* One msg byte sent */
594#define ESP_STEP_NCMD 0x02 /* Was not in command phase */
595#define ESP_STEP_PPC 0x03 /* Early phase chg caused cmnd
596 * bytes to be lost
597 */
598#define ESP_STEP_FINI4 0x04 /* Command was sent ok */
599
600/* Ho hum, some ESP's set the step register to this as well... */
601#define ESP_STEP_FINI5 0x05
602#define ESP_STEP_FINI6 0x06
603#define ESP_STEP_FINI7 0x07
604#define ESP_STEP_SOM 0x08 /* Synchronous Offset Max */
605
606/* ESP chip-test register read-write */
607#define ESP_TEST_TARG 0x01 /* Target test mode */
608#define ESP_TEST_INI 0x02 /* Initiator test mode */
609#define ESP_TEST_TS 0x04 /* Tristate test mode */
610
611/* ESP unique ID register read-only, found on fas236+fas100a+fsc only */
612#define ESP_UID_F100A 0x00 /* FAS100A */
613#define ESP_UID_F236 0x02 /* FAS236 */
614#define ESP_UID_FSC 0xa2 /* NCR53CF9x-2 */
615#define ESP_UID_REV 0x07 /* ESP revision */
616#define ESP_UID_FAM 0xf8 /* ESP family */
617
618/* ESP fifo flags register read-only */
619/* Note that the following implies a 16 byte FIFO on the ESP. */
620#define ESP_FF_FBYTES 0x1f /* Num bytes in FIFO */
621#define ESP_FF_ONOTZERO 0x20 /* offset ctr not zero (esp100,fsc) */
622#define ESP_FF_SSTEP 0xe0 /* Sequence step */
623
624/* ESP clock conversion factor register write-only */
625#define ESP_CCF_F0 0x00 /* 35.01MHz - 40MHz */
626#define ESP_CCF_NEVER 0x01 /* Set it to this and die */
627#define ESP_CCF_F2 0x02 /* 10MHz */
628#define ESP_CCF_F3 0x03 /* 10.01MHz - 15MHz */
629#define ESP_CCF_F4 0x04 /* 15.01MHz - 20MHz */
630#define ESP_CCF_F5 0x05 /* 20.01MHz - 25MHz */
631#define ESP_CCF_F6 0x06 /* 25.01MHz - 30MHz */
632#define ESP_CCF_F7 0x07 /* 30.01MHz - 35MHz */
633
634#define ESP_BUS_TIMEOUT 275 /* In milli-seconds */
635#define ESP_TIMEO_CONST 8192
636#define FSC_TIMEO_CONST 7668
637#define ESP_NEG_DEFP(mhz, cfact) \
638 ((ESP_BUS_TIMEOUT * ((mhz) / 1000)) / (8192 * (cfact)))
639#define FSC_NEG_DEFP(mhz, cfact) \
640 ((ESP_BUS_TIMEOUT * ((mhz) / 1000)) / (7668 * (cfact)))
641#define ESP_MHZ_TO_CYCLE(mhertz) ((1000000000) / ((mhertz) / 1000))
642#define ESP_TICK(ccf, cycle) ((7682 * (ccf) * (cycle) / 1000))
643
644
645/* UGLY, UGLY, UGLY! */
646extern int nesps, esps_in_use, esps_running;
647
648/* For our interrupt engine. */
649#define for_each_esp(esp) \
650 for((esp) = espchain; (esp); (esp) = (esp)->next)
651
652
653/* External functions */
654extern void esp_bootup_reset(struct NCR_ESP *esp, struct ESP_regs *eregs);
655extern struct NCR_ESP *esp_allocate(struct scsi_host_template *, void *, int);
656extern void esp_deallocate(struct NCR_ESP *);
657extern void esp_release(void);
658extern void esp_initialize(struct NCR_ESP *);
659extern irqreturn_t esp_intr(int, void *);
660extern const char *esp_info(struct Scsi_Host *);
661extern int esp_queue(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
662extern int esp_abort(Scsi_Cmnd *);
663extern int esp_reset(Scsi_Cmnd *);
664extern int esp_proc_info(struct Scsi_Host *shost, char *buffer, char **start, off_t offset, int length,
665 int inout);
666extern int esp_slave_alloc(struct scsi_device *);
667extern void esp_slave_destroy(struct scsi_device *);
668#endif /* !(NCR53C9X_H) */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 11:06:06 -0500