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authorHannes Reinecke <hare@suse.de>2014-11-24 09:37:27 -0500
committerChristoph Hellwig <hch@lst.de>2014-11-24 10:13:16 -0500
commiteeea2f9c2f2ecc5f3217edcacc95817047b143c2 (patch)
tree30ae59b8af6754aca843d83a334f040459f1a031 /drivers/scsi
parent6df388f2d549d3a2a7ad58b632d2ecd25fc0ff3f (diff)
esp_scsi: correctly detect am53c974
The am53c974 returns the same ID as the FAS236, but implements things slightly differently. So detect the am53c974 by checking for ESP_CONFIG4 register. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/am53c974.c2
-rw-r--r--drivers/scsi/esp_scsi.c17
-rw-r--r--drivers/scsi/esp_scsi.h15
3 files changed, 33 insertions, 1 deletions
diff --git a/drivers/scsi/am53c974.c b/drivers/scsi/am53c974.c
index a42e8db057a4..6e88e38bd2a4 100644
--- a/drivers/scsi/am53c974.c
+++ b/drivers/scsi/am53c974.c
@@ -368,6 +368,8 @@ static void dc390_check_eeprom(struct esp *esp)
368 } 368 }
369 esp->scsi_id = EEbuf[DC390_EE_ADAPT_SCSI_ID]; 369 esp->scsi_id = EEbuf[DC390_EE_ADAPT_SCSI_ID];
370 esp->num_tags = 2 << EEbuf[DC390_EE_TAG_CMD_NUM]; 370 esp->num_tags = 2 << EEbuf[DC390_EE_TAG_CMD_NUM];
371 if (EEbuf[DC390_EE_MODE2] & DC390_EE_MODE2_ACTIVE_NEGATION)
372 esp->config4 |= ESP_CONFIG4_RADE | ESP_CONFIG4_RAE;
371} 373}
372 374
373static int pci_esp_probe_one(struct pci_dev *pdev, 375static int pci_esp_probe_one(struct pci_dev *pdev,
diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c
index 4366011cd400..3fb6a00934bc 100644
--- a/drivers/scsi/esp_scsi.c
+++ b/drivers/scsi/esp_scsi.c
@@ -268,6 +268,19 @@ static void esp_reset_esp(struct esp *esp)
268 } else { 268 } else {
269 esp->min_period = ((5 * esp->ccycle) / 1000); 269 esp->min_period = ((5 * esp->ccycle) / 1000);
270 } 270 }
271 if (esp->rev == FAS236) {
272 /*
273 * The AM53c974 chip returns the same ID as FAS236;
274 * try to configure glitch eater.
275 */
276 u8 config4 = ESP_CONFIG4_GE1;
277 esp_write8(config4, ESP_CFG4);
278 config4 = esp_read8(ESP_CFG4);
279 if (config4 & ESP_CONFIG4_GE1) {
280 esp->rev = PCSCSI;
281 esp_write8(esp->config4, ESP_CFG4);
282 }
283 }
271 esp->max_period = (esp->max_period + 3)>>2; 284 esp->max_period = (esp->max_period + 3)>>2;
272 esp->min_period = (esp->min_period + 3)>>2; 285 esp->min_period = (esp->min_period + 3)>>2;
273 286
@@ -293,7 +306,8 @@ static void esp_reset_esp(struct esp *esp)
293 /* fallthrough... */ 306 /* fallthrough... */
294 307
295 case FAS236: 308 case FAS236:
296 /* Fast 236 or HME */ 309 case PCSCSI:
310 /* Fast 236, AM53c974 or HME */
297 esp_write8(esp->config2, ESP_CFG2); 311 esp_write8(esp->config2, ESP_CFG2);
298 if (esp->rev == FASHME) { 312 if (esp->rev == FASHME) {
299 u8 cfg3 = esp->target[0].esp_config3; 313 u8 cfg3 = esp->target[0].esp_config3;
@@ -2364,6 +2378,7 @@ static const char *esp_chip_names[] = {
2364 "FAS100A", 2378 "FAS100A",
2365 "FAST", 2379 "FAST",
2366 "FASHME", 2380 "FASHME",
2381 "AM53C974",
2367}; 2382};
2368 2383
2369static struct scsi_transport_template *esp_transport_template; 2384static struct scsi_transport_template *esp_transport_template;
diff --git a/drivers/scsi/esp_scsi.h b/drivers/scsi/esp_scsi.h
index 5fa456cc5e8b..84dcbe4a6268 100644
--- a/drivers/scsi/esp_scsi.h
+++ b/drivers/scsi/esp_scsi.h
@@ -25,6 +25,7 @@
25#define ESP_CTEST 0x0aUL /* wo Chip test register 0x28 */ 25#define ESP_CTEST 0x0aUL /* wo Chip test register 0x28 */
26#define ESP_CFG2 0x0bUL /* rw Second cfg register 0x2c */ 26#define ESP_CFG2 0x0bUL /* rw Second cfg register 0x2c */
27#define ESP_CFG3 0x0cUL /* rw Third cfg register 0x30 */ 27#define ESP_CFG3 0x0cUL /* rw Third cfg register 0x30 */
28#define ESP_CFG4 0x0dUL /* rw Fourth cfg register 0x34 */
28#define ESP_TCHI 0x0eUL /* rw High bits transf count 0x38 */ 29#define ESP_TCHI 0x0eUL /* rw High bits transf count 0x38 */
29#define ESP_UID ESP_TCHI /* ro Unique ID code 0x38 */ 30#define ESP_UID ESP_TCHI /* ro Unique ID code 0x38 */
30#define FAS_RLO ESP_TCHI /* rw HME extended counter 0x38 */ 31#define FAS_RLO ESP_TCHI /* rw HME extended counter 0x38 */
@@ -76,6 +77,18 @@
76#define ESP_CONFIG3_IMS 0x80 /* ID msg chk'ng (esp/fas236) */ 77#define ESP_CONFIG3_IMS 0x80 /* ID msg chk'ng (esp/fas236) */
77#define ESP_CONFIG3_OBPUSH 0x80 /* Push odd-byte to dma (hme) */ 78#define ESP_CONFIG3_OBPUSH 0x80 /* Push odd-byte to dma (hme) */
78 79
80/* ESP config register 4 read-write, found only on am53c974 chips */
81#define ESP_CONFIG4_RADE 0x04 /* Active negation */
82#define ESP_CONFIG4_RAE 0x08 /* Active negation on REQ and ACK */
83#define ESP_CONFIG4_PWD 0x20 /* Reduced power feature */
84#define ESP_CONFIG4_GE0 0x40 /* Glitch eater bit 0 */
85#define ESP_CONFIG4_GE1 0x80 /* Glitch eater bit 1 */
86
87#define ESP_CONFIG_GE_12NS (0)
88#define ESP_CONFIG_GE_25NS (ESP_CONFIG_GE1)
89#define ESP_CONFIG_GE_35NS (ESP_CONFIG_GE0)
90#define ESP_CONFIG_GE_0NS (ESP_CONFIG_GE0 | ESP_CONFIG_GE1)
91
79/* ESP command register read-write */ 92/* ESP command register read-write */
80/* Group 1 commands: These may be sent at any point in time to the ESP 93/* Group 1 commands: These may be sent at any point in time to the ESP
81 * chip. None of them can generate interrupts 'cept 94 * chip. None of them can generate interrupts 'cept
@@ -254,6 +267,7 @@ enum esp_rev {
254 FAS100A = 0x04, 267 FAS100A = 0x04,
255 FAST = 0x05, 268 FAST = 0x05,
256 FASHME = 0x06, 269 FASHME = 0x06,
270 PCSCSI = 0x07, /* AM53c974 */
257}; 271};
258 272
259struct esp_cmd_entry { 273struct esp_cmd_entry {
@@ -466,6 +480,7 @@ struct esp {
466 u8 bursts; 480 u8 bursts;
467 u8 config1; 481 u8 config1;
468 u8 config2; 482 u8 config2;
483 u8 config4;
469 484
470 u8 scsi_id; 485 u8 scsi_id;
471 u32 scsi_id_mask; 486 u32 scsi_id_mask;