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authorGilbert Wu <Gilbert_Wu@adaptec.com>2007-10-22 18:19:11 -0400
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2008-01-11 19:22:30 -0500
commit1237c98db2aa94b42dbb9fb1df062b7d3733dc83 (patch)
tree01c6d82790815753c0e66e9c3e571862d0f226bf /drivers/scsi
parent285e9670d91cdeb6b6693729950339cb45410fdc (diff)
[SCSI] aic94xx: update BIOS image from user space.
1. Create a file "update_bios" in sysfs to allow user to update bios from user space. 2. The BIOS image file can be downloaded from web site "http://www.adaptec.com/en-US/downloads/bios_fw/bios_fw_ver?productId=SAS-48300&dn=Adaptec+Serial+Attached+SCSI+48300" and copy the BIOS image into /lib/firmware folder. 3. The aic994xx will accept "update bios_file" and "verify bios_file" commands to perform update and verify BIOS image . For example: Type "echo "update asc483c01.ufi" > /sys/devices/.../update_bios" to update BIOS image from /lib/firmware/as483c01.ufi file into HBA's flash memory. Type "echo "verify asc483c01.ufi" > /sys/devices/.../update_bios" to verify BIOS image between /lib/firmware/asc48c01.ufi file and HBA's flash memory. 4. Type "cat /sys/devices/.../update_bios" to view the status or result of updating BIOS. Signed-off-by: Gilbert Wu <gilbert_wu@adaptec.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/aic94xx/aic94xx_hwi.h3
-rw-r--r--drivers/scsi/aic94xx/aic94xx_init.c184
-rw-r--r--drivers/scsi/aic94xx/aic94xx_sds.c389
-rw-r--r--drivers/scsi/aic94xx/aic94xx_sds.h121
4 files changed, 697 insertions, 0 deletions
diff --git a/drivers/scsi/aic94xx/aic94xx_hwi.h b/drivers/scsi/aic94xx/aic94xx_hwi.h
index 491e5d8a98bc..150f6706d23f 100644
--- a/drivers/scsi/aic94xx/aic94xx_hwi.h
+++ b/drivers/scsi/aic94xx/aic94xx_hwi.h
@@ -72,6 +72,7 @@ struct flash_struct {
72 u8 manuf; 72 u8 manuf;
73 u8 dev_id; 73 u8 dev_id;
74 u8 sec_prot; 74 u8 sec_prot;
75 u8 method;
75 76
76 u32 dir_offs; 77 u32 dir_offs;
77}; 78};
@@ -216,6 +217,8 @@ struct asd_ha_struct {
216 struct dma_pool *scb_pool; 217 struct dma_pool *scb_pool;
217 218
218 struct asd_seq_data seq; /* sequencer related */ 219 struct asd_seq_data seq; /* sequencer related */
220 u32 bios_status;
221 const struct firmware *bios_image;
219}; 222};
220 223
221/* ---------- Common macros ---------- */ 224/* ---------- Common macros ---------- */
diff --git a/drivers/scsi/aic94xx/aic94xx_init.c b/drivers/scsi/aic94xx/aic94xx_init.c
index b70d6e7f96e9..de0667011e13 100644
--- a/drivers/scsi/aic94xx/aic94xx_init.c
+++ b/drivers/scsi/aic94xx/aic94xx_init.c
@@ -29,6 +29,7 @@
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/pci.h> 30#include <linux/pci.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/firmware.h>
32 33
33#include <scsi/scsi_host.h> 34#include <scsi/scsi_host.h>
34 35
@@ -36,6 +37,7 @@
36#include "aic94xx_reg.h" 37#include "aic94xx_reg.h"
37#include "aic94xx_hwi.h" 38#include "aic94xx_hwi.h"
38#include "aic94xx_seq.h" 39#include "aic94xx_seq.h"
40#include "aic94xx_sds.h"
39 41
40/* The format is "version.release.patchlevel" */ 42/* The format is "version.release.patchlevel" */
41#define ASD_DRIVER_VERSION "1.0.3" 43#define ASD_DRIVER_VERSION "1.0.3"
@@ -313,6 +315,181 @@ static ssize_t asd_show_dev_pcba_sn(struct device *dev,
313} 315}
314static DEVICE_ATTR(pcba_sn, S_IRUGO, asd_show_dev_pcba_sn, NULL); 316static DEVICE_ATTR(pcba_sn, S_IRUGO, asd_show_dev_pcba_sn, NULL);
315 317
318#define FLASH_CMD_NONE 0x00
319#define FLASH_CMD_UPDATE 0x01
320#define FLASH_CMD_VERIFY 0x02
321
322struct flash_command {
323 u8 command[8];
324 int code;
325};
326
327static struct flash_command flash_command_table[] =
328{
329 {"verify", FLASH_CMD_VERIFY},
330 {"update", FLASH_CMD_UPDATE},
331 {"", FLASH_CMD_NONE} /* Last entry should be NULL. */
332};
333
334struct error_bios {
335 char *reason;
336 int err_code;
337};
338
339static struct error_bios flash_error_table[] =
340{
341 {"Failed to open bios image file", FAIL_OPEN_BIOS_FILE},
342 {"PCI ID mismatch", FAIL_CHECK_PCI_ID},
343 {"Checksum mismatch", FAIL_CHECK_SUM},
344 {"Unknown Error", FAIL_UNKNOWN},
345 {"Failed to verify.", FAIL_VERIFY},
346 {"Failed to reset flash chip.", FAIL_RESET_FLASH},
347 {"Failed to find flash chip type.", FAIL_FIND_FLASH_ID},
348 {"Failed to erash flash chip.", FAIL_ERASE_FLASH},
349 {"Failed to program flash chip.", FAIL_WRITE_FLASH},
350 {"Flash in progress", FLASH_IN_PROGRESS},
351 {"Image file size Error", FAIL_FILE_SIZE},
352 {"Input parameter error", FAIL_PARAMETERS},
353 {"Out of memory", FAIL_OUT_MEMORY},
354 {"OK", 0} /* Last entry err_code = 0. */
355};
356
357static ssize_t asd_store_update_bios(struct device *dev,
358 struct device_attribute *attr,
359 const char *buf, size_t count)
360{
361 struct asd_ha_struct *asd_ha = dev_to_asd_ha(dev);
362 char *cmd_ptr, *filename_ptr;
363 struct bios_file_header header, *hdr_ptr;
364 int res, i;
365 u32 csum = 0;
366 int flash_command = FLASH_CMD_NONE;
367 int err = 0;
368
369 cmd_ptr = kzalloc(count*2, GFP_KERNEL);
370
371 if (!cmd_ptr) {
372 err = FAIL_OUT_MEMORY;
373 goto out;
374 }
375
376 filename_ptr = cmd_ptr + count;
377 res = sscanf(buf, "%s %s", cmd_ptr, filename_ptr);
378 if (res != 2) {
379 err = FAIL_PARAMETERS;
380 goto out1;
381 }
382
383 for (i = 0; flash_command_table[i].code != FLASH_CMD_NONE; i++) {
384 if (!memcmp(flash_command_table[i].command,
385 cmd_ptr, strlen(cmd_ptr))) {
386 flash_command = flash_command_table[i].code;
387 break;
388 }
389 }
390 if (flash_command == FLASH_CMD_NONE) {
391 err = FAIL_PARAMETERS;
392 goto out1;
393 }
394
395 if (asd_ha->bios_status == FLASH_IN_PROGRESS) {
396 err = FLASH_IN_PROGRESS;
397 goto out1;
398 }
399 err = request_firmware(&asd_ha->bios_image,
400 filename_ptr,
401 &asd_ha->pcidev->dev);
402 if (err) {
403 asd_printk("Failed to load bios image file %s, error %d\n",
404 filename_ptr, err);
405 err = FAIL_OPEN_BIOS_FILE;
406 goto out1;
407 }
408
409 hdr_ptr = (struct bios_file_header *)asd_ha->bios_image->data;
410
411 if ((hdr_ptr->contrl_id.vendor != asd_ha->pcidev->vendor ||
412 hdr_ptr->contrl_id.device != asd_ha->pcidev->device) &&
413 (hdr_ptr->contrl_id.sub_vendor != asd_ha->pcidev->vendor ||
414 hdr_ptr->contrl_id.sub_device != asd_ha->pcidev->device)) {
415
416 ASD_DPRINTK("The PCI vendor or device id does not match\n");
417 ASD_DPRINTK("vendor=%x dev=%x sub_vendor=%x sub_dev=%x"
418 " pci vendor=%x pci dev=%x\n",
419 hdr_ptr->contrl_id.vendor,
420 hdr_ptr->contrl_id.device,
421 hdr_ptr->contrl_id.sub_vendor,
422 hdr_ptr->contrl_id.sub_device,
423 asd_ha->pcidev->vendor,
424 asd_ha->pcidev->device);
425 err = FAIL_CHECK_PCI_ID;
426 goto out2;
427 }
428
429 if (hdr_ptr->filelen != asd_ha->bios_image->size) {
430 err = FAIL_FILE_SIZE;
431 goto out2;
432 }
433
434 /* calculate checksum */
435 for (i = 0; i < hdr_ptr->filelen; i++)
436 csum += asd_ha->bios_image->data[i];
437
438 if ((csum & 0x0000ffff) != hdr_ptr->checksum) {
439 ASD_DPRINTK("BIOS file checksum mismatch\n");
440 err = FAIL_CHECK_SUM;
441 goto out2;
442 }
443 if (flash_command == FLASH_CMD_UPDATE) {
444 asd_ha->bios_status = FLASH_IN_PROGRESS;
445 err = asd_write_flash_seg(asd_ha,
446 &asd_ha->bios_image->data[sizeof(*hdr_ptr)],
447 0, hdr_ptr->filelen-sizeof(*hdr_ptr));
448 if (!err)
449 err = asd_verify_flash_seg(asd_ha,
450 &asd_ha->bios_image->data[sizeof(*hdr_ptr)],
451 0, hdr_ptr->filelen-sizeof(*hdr_ptr));
452 } else {
453 asd_ha->bios_status = FLASH_IN_PROGRESS;
454 err = asd_verify_flash_seg(asd_ha,
455 &asd_ha->bios_image->data[sizeof(header)],
456 0, hdr_ptr->filelen-sizeof(header));
457 }
458
459out2:
460 release_firmware(asd_ha->bios_image);
461out1:
462 kfree(cmd_ptr);
463out:
464 asd_ha->bios_status = err;
465
466 if (!err)
467 return count;
468 else
469 return -err;
470}
471
472static ssize_t asd_show_update_bios(struct device *dev,
473 struct device_attribute *attr, char *buf)
474{
475 int i;
476 struct asd_ha_struct *asd_ha = dev_to_asd_ha(dev);
477
478 for (i = 0; flash_error_table[i].err_code != 0; i++) {
479 if (flash_error_table[i].err_code == asd_ha->bios_status)
480 break;
481 }
482 if (asd_ha->bios_status != FLASH_IN_PROGRESS)
483 asd_ha->bios_status = FLASH_OK;
484
485 return snprintf(buf, PAGE_SIZE, "status=%x %s\n",
486 flash_error_table[i].err_code,
487 flash_error_table[i].reason);
488}
489
490static DEVICE_ATTR(update_bios, S_IRUGO|S_IWUGO,
491 asd_show_update_bios, asd_store_update_bios);
492
316static int asd_create_dev_attrs(struct asd_ha_struct *asd_ha) 493static int asd_create_dev_attrs(struct asd_ha_struct *asd_ha)
317{ 494{
318 int err; 495 int err;
@@ -328,9 +505,14 @@ static int asd_create_dev_attrs(struct asd_ha_struct *asd_ha)
328 err = device_create_file(&asd_ha->pcidev->dev, &dev_attr_pcba_sn); 505 err = device_create_file(&asd_ha->pcidev->dev, &dev_attr_pcba_sn);
329 if (err) 506 if (err)
330 goto err_biosb; 507 goto err_biosb;
508 err = device_create_file(&asd_ha->pcidev->dev, &dev_attr_update_bios);
509 if (err)
510 goto err_update_bios;
331 511
332 return 0; 512 return 0;
333 513
514err_update_bios:
515 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_pcba_sn);
334err_biosb: 516err_biosb:
335 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_bios_build); 517 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_bios_build);
336err_rev: 518err_rev:
@@ -343,6 +525,7 @@ static void asd_remove_dev_attrs(struct asd_ha_struct *asd_ha)
343 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_revision); 525 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_revision);
344 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_bios_build); 526 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_bios_build);
345 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_pcba_sn); 527 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_pcba_sn);
528 device_remove_file(&asd_ha->pcidev->dev, &dev_attr_update_bios);
346} 529}
347 530
348/* The first entry, 0, is used for dynamic ids, the rest for devices 531/* The first entry, 0, is used for dynamic ids, the rest for devices
@@ -589,6 +772,7 @@ static int __devinit asd_pci_probe(struct pci_dev *dev,
589 asd_ha->sas_ha.dev = &asd_ha->pcidev->dev; 772 asd_ha->sas_ha.dev = &asd_ha->pcidev->dev;
590 asd_ha->sas_ha.lldd_ha = asd_ha; 773 asd_ha->sas_ha.lldd_ha = asd_ha;
591 774
775 asd_ha->bios_status = FLASH_OK;
592 asd_ha->name = asd_dev->name; 776 asd_ha->name = asd_dev->name;
593 asd_printk("found %s, device %s\n", asd_ha->name, pci_name(dev)); 777 asd_printk("found %s, device %s\n", asd_ha->name, pci_name(dev));
594 778
diff --git a/drivers/scsi/aic94xx/aic94xx_sds.c b/drivers/scsi/aic94xx/aic94xx_sds.c
index 06509bff71f7..2a4c933eb89c 100644
--- a/drivers/scsi/aic94xx/aic94xx_sds.c
+++ b/drivers/scsi/aic94xx/aic94xx_sds.c
@@ -30,6 +30,7 @@
30 30
31#include "aic94xx.h" 31#include "aic94xx.h"
32#include "aic94xx_reg.h" 32#include "aic94xx_reg.h"
33#include "aic94xx_sds.h"
33 34
34/* ---------- OCM stuff ---------- */ 35/* ---------- OCM stuff ---------- */
35 36
@@ -1083,3 +1084,391 @@ out:
1083 kfree(flash_dir); 1084 kfree(flash_dir);
1084 return err; 1085 return err;
1085} 1086}
1087
1088/**
1089 * asd_verify_flash_seg - verify data with flash memory
1090 * @asd_ha: pointer to the host adapter structure
1091 * @src: pointer to the source data to be verified
1092 * @dest_offset: offset from flash memory
1093 * @bytes_to_verify: total bytes to verify
1094 */
1095int asd_verify_flash_seg(struct asd_ha_struct *asd_ha,
1096 void *src, u32 dest_offset, u32 bytes_to_verify)
1097{
1098 u8 *src_buf;
1099 u8 flash_char;
1100 int err;
1101 u32 nv_offset, reg, i;
1102
1103 reg = asd_ha->hw_prof.flash.bar;
1104 src_buf = NULL;
1105
1106 err = FLASH_OK;
1107 nv_offset = dest_offset;
1108 src_buf = (u8 *)src;
1109 for (i = 0; i < bytes_to_verify; i++) {
1110 flash_char = asd_read_reg_byte(asd_ha, reg + nv_offset + i);
1111 if (flash_char != src_buf[i]) {
1112 err = FAIL_VERIFY;
1113 break;
1114 }
1115 }
1116 return err;
1117}
1118
1119/**
1120 * asd_write_flash_seg - write data into flash memory
1121 * @asd_ha: pointer to the host adapter structure
1122 * @src: pointer to the source data to be written
1123 * @dest_offset: offset from flash memory
1124 * @bytes_to_write: total bytes to write
1125 */
1126int asd_write_flash_seg(struct asd_ha_struct *asd_ha,
1127 void *src, u32 dest_offset, u32 bytes_to_write)
1128{
1129 u8 *src_buf;
1130 u32 nv_offset, reg, i;
1131 int err;
1132
1133 reg = asd_ha->hw_prof.flash.bar;
1134 src_buf = NULL;
1135
1136 err = asd_check_flash_type(asd_ha);
1137 if (err) {
1138 ASD_DPRINTK("couldn't find the type of flash. err=%d\n", err);
1139 return err;
1140 }
1141
1142 nv_offset = dest_offset;
1143 err = asd_erase_nv_sector(asd_ha, nv_offset, bytes_to_write);
1144 if (err) {
1145 ASD_DPRINTK("Erase failed at offset:0x%x\n",
1146 nv_offset);
1147 return err;
1148 }
1149
1150 err = asd_reset_flash(asd_ha);
1151 if (err) {
1152 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1153 return err;
1154 }
1155
1156 src_buf = (u8 *)src;
1157 for (i = 0; i < bytes_to_write; i++) {
1158 /* Setup program command sequence */
1159 switch (asd_ha->hw_prof.flash.method) {
1160 case FLASH_METHOD_A:
1161 {
1162 asd_write_reg_byte(asd_ha,
1163 (reg + 0xAAA), 0xAA);
1164 asd_write_reg_byte(asd_ha,
1165 (reg + 0x555), 0x55);
1166 asd_write_reg_byte(asd_ha,
1167 (reg + 0xAAA), 0xA0);
1168 asd_write_reg_byte(asd_ha,
1169 (reg + nv_offset + i),
1170 (*(src_buf + i)));
1171 break;
1172 }
1173 case FLASH_METHOD_B:
1174 {
1175 asd_write_reg_byte(asd_ha,
1176 (reg + 0x555), 0xAA);
1177 asd_write_reg_byte(asd_ha,
1178 (reg + 0x2AA), 0x55);
1179 asd_write_reg_byte(asd_ha,
1180 (reg + 0x555), 0xA0);
1181 asd_write_reg_byte(asd_ha,
1182 (reg + nv_offset + i),
1183 (*(src_buf + i)));
1184 break;
1185 }
1186 default:
1187 break;
1188 }
1189 if (asd_chk_write_status(asd_ha,
1190 (nv_offset + i), 0) != 0) {
1191 ASD_DPRINTK("aicx: Write failed at offset:0x%x\n",
1192 reg + nv_offset + i);
1193 return FAIL_WRITE_FLASH;
1194 }
1195 }
1196
1197 err = asd_reset_flash(asd_ha);
1198 if (err) {
1199 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1200 return err;
1201 }
1202 return 0;
1203}
1204
1205int asd_chk_write_status(struct asd_ha_struct *asd_ha,
1206 u32 sector_addr, u8 erase_flag)
1207{
1208 u32 reg;
1209 u32 loop_cnt;
1210 u8 nv_data1, nv_data2;
1211 u8 toggle_bit1;
1212
1213 /*
1214 * Read from DQ2 requires sector address
1215 * while it's dont care for DQ6
1216 */
1217 reg = asd_ha->hw_prof.flash.bar;
1218
1219 for (loop_cnt = 0; loop_cnt < 50000; loop_cnt++) {
1220 nv_data1 = asd_read_reg_byte(asd_ha, reg);
1221 nv_data2 = asd_read_reg_byte(asd_ha, reg);
1222
1223 toggle_bit1 = ((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6)
1224 ^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6));
1225
1226 if (toggle_bit1 == 0) {
1227 return 0;
1228 } else {
1229 if (nv_data2 & FLASH_STATUS_BIT_MASK_DQ5) {
1230 nv_data1 = asd_read_reg_byte(asd_ha,
1231 reg);
1232 nv_data2 = asd_read_reg_byte(asd_ha,
1233 reg);
1234 toggle_bit1 =
1235 ((nv_data1 & FLASH_STATUS_BIT_MASK_DQ6)
1236 ^ (nv_data2 & FLASH_STATUS_BIT_MASK_DQ6));
1237
1238 if (toggle_bit1 == 0)
1239 return 0;
1240 }
1241 }
1242
1243 /*
1244 * ERASE is a sector-by-sector operation and requires
1245 * more time to finish while WRITE is byte-byte-byte
1246 * operation and takes lesser time to finish.
1247 *
1248 * For some strange reason a reduced ERASE delay gives different
1249 * behaviour across different spirit boards. Hence we set
1250 * a optimum balance of 50mus for ERASE which works well
1251 * across all boards.
1252 */
1253 if (erase_flag) {
1254 udelay(FLASH_STATUS_ERASE_DELAY_COUNT);
1255 } else {
1256 udelay(FLASH_STATUS_WRITE_DELAY_COUNT);
1257 }
1258 }
1259 return -1;
1260}
1261
1262/**
1263 * asd_hwi_erase_nv_sector - Erase the flash memory sectors.
1264 * @asd_ha: pointer to the host adapter structure
1265 * @flash_addr: pointer to offset from flash memory
1266 * @size: total bytes to erase.
1267 */
1268int asd_erase_nv_sector(struct asd_ha_struct *asd_ha, u32 flash_addr, u32 size)
1269{
1270 u32 reg;
1271 u32 sector_addr;
1272
1273 reg = asd_ha->hw_prof.flash.bar;
1274
1275 /* sector staring address */
1276 sector_addr = flash_addr & FLASH_SECTOR_SIZE_MASK;
1277
1278 /*
1279 * Erasing an flash sector needs to be done in six consecutive
1280 * write cyles.
1281 */
1282 while (sector_addr < flash_addr+size) {
1283 switch (asd_ha->hw_prof.flash.method) {
1284 case FLASH_METHOD_A:
1285 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA);
1286 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55);
1287 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0x80);
1288 asd_write_reg_byte(asd_ha, (reg + 0xAAA), 0xAA);
1289 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x55);
1290 asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30);
1291 break;
1292 case FLASH_METHOD_B:
1293 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1294 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1295 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x80);
1296 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1297 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1298 asd_write_reg_byte(asd_ha, (reg + sector_addr), 0x30);
1299 break;
1300 default:
1301 break;
1302 }
1303
1304 if (asd_chk_write_status(asd_ha, sector_addr, 1) != 0)
1305 return FAIL_ERASE_FLASH;
1306
1307 sector_addr += FLASH_SECTOR_SIZE;
1308 }
1309
1310 return 0;
1311}
1312
1313int asd_check_flash_type(struct asd_ha_struct *asd_ha)
1314{
1315 u8 manuf_id;
1316 u8 dev_id;
1317 u8 sec_prot;
1318 u32 inc;
1319 u32 reg;
1320 int err;
1321
1322 /* get Flash memory base address */
1323 reg = asd_ha->hw_prof.flash.bar;
1324
1325 /* Determine flash info */
1326 err = asd_reset_flash(asd_ha);
1327 if (err) {
1328 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1329 return err;
1330 }
1331
1332 asd_ha->hw_prof.flash.method = FLASH_METHOD_UNKNOWN;
1333 asd_ha->hw_prof.flash.manuf = FLASH_MANUF_ID_UNKNOWN;
1334 asd_ha->hw_prof.flash.dev_id = FLASH_DEV_ID_UNKNOWN;
1335
1336 /* Get flash info. This would most likely be AMD Am29LV family flash.
1337 * First try the sequence for word mode. It is the same as for
1338 * 008B (byte mode only), 160B (word mode) and 800D (word mode).
1339 */
1340 inc = asd_ha->hw_prof.flash.wide ? 2 : 1;
1341 asd_write_reg_byte(asd_ha, reg + 0xAAA, 0xAA);
1342 asd_write_reg_byte(asd_ha, reg + 0x555, 0x55);
1343 asd_write_reg_byte(asd_ha, reg + 0xAAA, 0x90);
1344 manuf_id = asd_read_reg_byte(asd_ha, reg);
1345 dev_id = asd_read_reg_byte(asd_ha, reg + inc);
1346 sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc);
1347 /* Get out of autoselect mode. */
1348 err = asd_reset_flash(asd_ha);
1349 if (err) {
1350 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1351 return err;
1352 }
1353 ASD_DPRINTK("Flash MethodA manuf_id(0x%x) dev_id(0x%x) "
1354 "sec_prot(0x%x)\n", manuf_id, dev_id, sec_prot);
1355 err = asd_reset_flash(asd_ha);
1356 if (err != 0)
1357 return err;
1358
1359 switch (manuf_id) {
1360 case FLASH_MANUF_ID_AMD:
1361 switch (sec_prot) {
1362 case FLASH_DEV_ID_AM29LV800DT:
1363 case FLASH_DEV_ID_AM29LV640MT:
1364 case FLASH_DEV_ID_AM29F800B:
1365 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1366 break;
1367 default:
1368 break;
1369 }
1370 break;
1371 case FLASH_MANUF_ID_ST:
1372 switch (sec_prot) {
1373 case FLASH_DEV_ID_STM29W800DT:
1374 case FLASH_DEV_ID_STM29LV640:
1375 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1376 break;
1377 default:
1378 break;
1379 }
1380 break;
1381 case FLASH_MANUF_ID_FUJITSU:
1382 switch (sec_prot) {
1383 case FLASH_DEV_ID_MBM29LV800TE:
1384 case FLASH_DEV_ID_MBM29DL800TA:
1385 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1386 break;
1387 }
1388 break;
1389 case FLASH_MANUF_ID_MACRONIX:
1390 switch (sec_prot) {
1391 case FLASH_DEV_ID_MX29LV800BT:
1392 asd_ha->hw_prof.flash.method = FLASH_METHOD_A;
1393 break;
1394 }
1395 break;
1396 }
1397
1398 if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN) {
1399 err = asd_reset_flash(asd_ha);
1400 if (err) {
1401 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1402 return err;
1403 }
1404
1405 /* Issue Unlock sequence for AM29LV008BT */
1406 asd_write_reg_byte(asd_ha, (reg + 0x555), 0xAA);
1407 asd_write_reg_byte(asd_ha, (reg + 0x2AA), 0x55);
1408 asd_write_reg_byte(asd_ha, (reg + 0x555), 0x90);
1409 manuf_id = asd_read_reg_byte(asd_ha, reg);
1410 dev_id = asd_read_reg_byte(asd_ha, reg + inc);
1411 sec_prot = asd_read_reg_byte(asd_ha, reg + inc + inc);
1412
1413 ASD_DPRINTK("Flash MethodB manuf_id(0x%x) dev_id(0x%x) sec_prot"
1414 "(0x%x)\n", manuf_id, dev_id, sec_prot);
1415
1416 err = asd_reset_flash(asd_ha);
1417 if (err != 0) {
1418 ASD_DPRINTK("couldn't reset flash. err=%d\n", err);
1419 return err;
1420 }
1421
1422 switch (manuf_id) {
1423 case FLASH_MANUF_ID_AMD:
1424 switch (dev_id) {
1425 case FLASH_DEV_ID_AM29LV008BT:
1426 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1427 break;
1428 default:
1429 break;
1430 }
1431 break;
1432 case FLASH_MANUF_ID_ST:
1433 switch (dev_id) {
1434 case FLASH_DEV_ID_STM29008:
1435 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1436 break;
1437 default:
1438 break;
1439 }
1440 break;
1441 case FLASH_MANUF_ID_FUJITSU:
1442 switch (dev_id) {
1443 case FLASH_DEV_ID_MBM29LV008TA:
1444 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1445 break;
1446 }
1447 break;
1448 case FLASH_MANUF_ID_INTEL:
1449 switch (dev_id) {
1450 case FLASH_DEV_ID_I28LV00TAT:
1451 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1452 break;
1453 }
1454 break;
1455 case FLASH_MANUF_ID_MACRONIX:
1456 switch (dev_id) {
1457 case FLASH_DEV_ID_I28LV00TAT:
1458 asd_ha->hw_prof.flash.method = FLASH_METHOD_B;
1459 break;
1460 }
1461 break;
1462 default:
1463 return FAIL_FIND_FLASH_ID;
1464 }
1465 }
1466
1467 if (asd_ha->hw_prof.flash.method == FLASH_METHOD_UNKNOWN)
1468 return FAIL_FIND_FLASH_ID;
1469
1470 asd_ha->hw_prof.flash.manuf = manuf_id;
1471 asd_ha->hw_prof.flash.dev_id = dev_id;
1472 asd_ha->hw_prof.flash.sec_prot = sec_prot;
1473 return 0;
1474}
diff --git a/drivers/scsi/aic94xx/aic94xx_sds.h b/drivers/scsi/aic94xx/aic94xx_sds.h
new file mode 100644
index 000000000000..bb9795a04dc3
--- /dev/null
+++ b/drivers/scsi/aic94xx/aic94xx_sds.h
@@ -0,0 +1,121 @@
1/*
2 * Aic94xx SAS/SATA driver hardware interface header file.
3 *
4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
5 * Copyright (C) 2005 Gilbert Wu <gilbert_wu@adaptec.com>
6 *
7 * This file is licensed under GPLv2.
8 *
9 * This file is part of the aic94xx driver.
10 *
11 * The aic94xx driver is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; version 2 of the
14 * License.
15 *
16 * The aic94xx driver is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with the aic94xx driver; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 *
25 */
26#ifndef _AIC94XX_SDS_H_
27#define _AIC94XX_SDS_H_
28
29enum {
30 FLASH_METHOD_UNKNOWN,
31 FLASH_METHOD_A,
32 FLASH_METHOD_B
33};
34
35#define FLASH_MANUF_ID_AMD 0x01
36#define FLASH_MANUF_ID_ST 0x20
37#define FLASH_MANUF_ID_FUJITSU 0x04
38#define FLASH_MANUF_ID_MACRONIX 0xC2
39#define FLASH_MANUF_ID_INTEL 0x89
40#define FLASH_MANUF_ID_UNKNOWN 0xFF
41
42#define FLASH_DEV_ID_AM29LV008BT 0x3E
43#define FLASH_DEV_ID_AM29LV800DT 0xDA
44#define FLASH_DEV_ID_STM29W800DT 0xD7
45#define FLASH_DEV_ID_STM29LV640 0xDE
46#define FLASH_DEV_ID_STM29008 0xEA
47#define FLASH_DEV_ID_MBM29LV800TE 0xDA
48#define FLASH_DEV_ID_MBM29DL800TA 0x4A
49#define FLASH_DEV_ID_MBM29LV008TA 0x3E
50#define FLASH_DEV_ID_AM29LV640MT 0x7E
51#define FLASH_DEV_ID_AM29F800B 0xD6
52#define FLASH_DEV_ID_MX29LV800BT 0xDA
53#define FLASH_DEV_ID_MX29LV008CT 0xDA
54#define FLASH_DEV_ID_I28LV00TAT 0x3E
55#define FLASH_DEV_ID_UNKNOWN 0xFF
56
57/* status bit mask values */
58#define FLASH_STATUS_BIT_MASK_DQ6 0x40
59#define FLASH_STATUS_BIT_MASK_DQ5 0x20
60#define FLASH_STATUS_BIT_MASK_DQ2 0x04
61
62/* minimum value in micro seconds needed for checking status */
63#define FLASH_STATUS_ERASE_DELAY_COUNT 50
64#define FLASH_STATUS_WRITE_DELAY_COUNT 25
65
66#define FLASH_SECTOR_SIZE 0x010000
67#define FLASH_SECTOR_SIZE_MASK 0xffff0000
68
69#define FLASH_OK 0x000000
70#define FAIL_OPEN_BIOS_FILE 0x000100
71#define FAIL_CHECK_PCI_ID 0x000200
72#define FAIL_CHECK_SUM 0x000300
73#define FAIL_UNKNOWN 0x000400
74#define FAIL_VERIFY 0x000500
75#define FAIL_RESET_FLASH 0x000600
76#define FAIL_FIND_FLASH_ID 0x000700
77#define FAIL_ERASE_FLASH 0x000800
78#define FAIL_WRITE_FLASH 0x000900
79#define FAIL_FILE_SIZE 0x000a00
80#define FAIL_PARAMETERS 0x000b00
81#define FAIL_OUT_MEMORY 0x000c00
82#define FLASH_IN_PROGRESS 0x001000
83
84struct controller_id {
85 u32 vendor; /* PCI Vendor ID */
86 u32 device; /* PCI Device ID */
87 u32 sub_vendor; /* PCI Subvendor ID */
88 u32 sub_device; /* PCI Subdevice ID */
89};
90
91struct image_info {
92 u32 ImageId; /* Identifies the image */
93 u32 ImageOffset; /* Offset the beginning of the file */
94 u32 ImageLength; /* length of the image */
95 u32 ImageChecksum; /* Image checksum */
96 u32 ImageVersion; /* Version of the image, could be build number */
97};
98
99struct bios_file_header {
100 u8 signature[32]; /* Signature/Cookie to identify the file */
101 u32 checksum; /*Entire file checksum with this field zero */
102 u32 antidote; /* Entire file checksum with this field 0xFFFFFFFF */
103 struct controller_id contrl_id; /*PCI id to identify the controller */
104 u32 filelen; /*Length of the entire file*/
105 u32 chunk_num; /*The chunk/part number for multiple Image files */
106 u32 total_chunks; /*Total number of chunks/parts in the image file */
107 u32 num_images; /* Number of images in the file */
108 u32 build_num; /* Build number of this image */
109 struct image_info image_header;
110};
111
112int asd_verify_flash_seg(struct asd_ha_struct *asd_ha,
113 void *src, u32 dest_offset, u32 bytes_to_verify);
114int asd_write_flash_seg(struct asd_ha_struct *asd_ha,
115 void *src, u32 dest_offset, u32 bytes_to_write);
116int asd_chk_write_status(struct asd_ha_struct *asd_ha,
117 u32 sector_addr, u8 erase_flag);
118int asd_check_flash_type(struct asd_ha_struct *asd_ha);
119int asd_erase_nv_sector(struct asd_ha_struct *asd_ha,
120 u32 flash_addr, u32 size);
121#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 14:51:20 -0500