diff options
author | Henne <henne@nachtwindheim.de> | 2006-11-08 22:56:28 -0500 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-11-15 17:43:50 -0500 |
commit | 667c667f86c87cd4f72296d650e5e65f2d89cb31 (patch) | |
tree | d698b705d311e27d7a1ce3790d2490b310c578a8 /drivers/scsi/t128.h | |
parent | 297295ae6653af1356dd35a8edc411e2715aec57 (diff) |
[SCSI] scsi: t128 scsi_cmnd convertion
Changes the obsolete Scsi_Cmnd to struct scsi_cmnd and remove the trailing
whitespaces.
Signed-off-by: Henrik Kretzschmar <henne@nachtwindheim.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/t128.h')
-rw-r--r-- | drivers/scsi/t128.h | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/drivers/scsi/t128.h b/drivers/scsi/t128.h index 646e840266e2..76a069b7ac0b 100644 --- a/drivers/scsi/t128.h +++ b/drivers/scsi/t128.h | |||
@@ -8,20 +8,20 @@ | |||
8 | * drew@colorado.edu | 8 | * drew@colorado.edu |
9 | * +1 (303) 440-4894 | 9 | * +1 (303) 440-4894 |
10 | * | 10 | * |
11 | * DISTRIBUTION RELEASE 3. | 11 | * DISTRIBUTION RELEASE 3. |
12 | * | 12 | * |
13 | * For more information, please consult | 13 | * For more information, please consult |
14 | * | 14 | * |
15 | * Trantor Systems, Ltd. | 15 | * Trantor Systems, Ltd. |
16 | * T128/T128F/T228 SCSI Host Adapter | 16 | * T128/T128F/T228 SCSI Host Adapter |
17 | * Hardware Specifications | 17 | * Hardware Specifications |
18 | * | 18 | * |
19 | * Trantor Systems, Ltd. | 19 | * Trantor Systems, Ltd. |
20 | * 5415 Randall Place | 20 | * 5415 Randall Place |
21 | * Fremont, CA 94538 | 21 | * Fremont, CA 94538 |
22 | * 1+ (415) 770-1400, FAX 1+ (415) 770-9910 | 22 | * 1+ (415) 770-1400, FAX 1+ (415) 770-9910 |
23 | * | 23 | * |
24 | * and | 24 | * and |
25 | * | 25 | * |
26 | * NCR 5380 Family | 26 | * NCR 5380 Family |
27 | * SCSI Protocol Controller | 27 | * SCSI Protocol Controller |
@@ -48,15 +48,15 @@ | |||
48 | #define TDEBUG_TRANSFER 0x2 | 48 | #define TDEBUG_TRANSFER 0x2 |
49 | 49 | ||
50 | /* | 50 | /* |
51 | * The trantor boards are memory mapped. They use an NCR5380 or | 51 | * The trantor boards are memory mapped. They use an NCR5380 or |
52 | * equivalent (my sample board had part second sourced from ZILOG). | 52 | * equivalent (my sample board had part second sourced from ZILOG). |
53 | * NCR's recommended "Pseudo-DMA" architecture is used, where | 53 | * NCR's recommended "Pseudo-DMA" architecture is used, where |
54 | * a PAL drives the DMA signals on the 5380 allowing fast, blind | 54 | * a PAL drives the DMA signals on the 5380 allowing fast, blind |
55 | * transfers with proper handshaking. | 55 | * transfers with proper handshaking. |
56 | */ | 56 | */ |
57 | 57 | ||
58 | /* | 58 | /* |
59 | * Note : a boot switch is provided for the purpose of informing the | 59 | * Note : a boot switch is provided for the purpose of informing the |
60 | * firmware to boot or not boot from attached SCSI devices. So, I imagine | 60 | * firmware to boot or not boot from attached SCSI devices. So, I imagine |
61 | * there are fewer people who've yanked the ROM like they do on the Seagate | 61 | * there are fewer people who've yanked the ROM like they do on the Seagate |
62 | * to make bootup faster, and I'll probably use this for autodetection. | 62 | * to make bootup faster, and I'll probably use this for autodetection. |
@@ -92,19 +92,20 @@ | |||
92 | #define T_DATA_REG_OFFSET 0x1e00 /* rw 512 bytes long */ | 92 | #define T_DATA_REG_OFFSET 0x1e00 /* rw 512 bytes long */ |
93 | 93 | ||
94 | #ifndef ASM | 94 | #ifndef ASM |
95 | static int t128_abort(Scsi_Cmnd *); | 95 | static int t128_abort(struct scsi_cmnd *); |
96 | static int t128_biosparam(struct scsi_device *, struct block_device *, | 96 | static int t128_biosparam(struct scsi_device *, struct block_device *, |
97 | sector_t, int*); | 97 | sector_t, int*); |
98 | static int t128_detect(struct scsi_host_template *); | 98 | static int t128_detect(struct scsi_host_template *); |
99 | static int t128_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); | 99 | static int t128_queue_command(struct scsi_cmnd *, |
100 | static int t128_bus_reset(Scsi_Cmnd *); | 100 | void (*done)(struct scsi_cmnd *)); |
101 | static int t128_bus_reset(struct scsi_cmnd *); | ||
101 | 102 | ||
102 | #ifndef CMD_PER_LUN | 103 | #ifndef CMD_PER_LUN |
103 | #define CMD_PER_LUN 2 | 104 | #define CMD_PER_LUN 2 |
104 | #endif | 105 | #endif |
105 | 106 | ||
106 | #ifndef CAN_QUEUE | 107 | #ifndef CAN_QUEUE |
107 | #define CAN_QUEUE 32 | 108 | #define CAN_QUEUE 32 |
108 | #endif | 109 | #endif |
109 | 110 | ||
110 | #ifndef HOSTS_C | 111 | #ifndef HOSTS_C |
@@ -120,7 +121,7 @@ static int t128_bus_reset(Scsi_Cmnd *); | |||
120 | 121 | ||
121 | #define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20)) | 122 | #define T128_address(reg) (base + T_5380_OFFSET + ((reg) * 0x20)) |
122 | 123 | ||
123 | #if !(TDEBUG & TDEBUG_TRANSFER) | 124 | #if !(TDEBUG & TDEBUG_TRANSFER) |
124 | #define NCR5380_read(reg) readb(T128_address(reg)) | 125 | #define NCR5380_read(reg) readb(T128_address(reg)) |
125 | #define NCR5380_write(reg, value) writeb((value),(T128_address(reg))) | 126 | #define NCR5380_write(reg, value) writeb((value),(T128_address(reg))) |
126 | #else | 127 | #else |
@@ -129,7 +130,7 @@ static int t128_bus_reset(Scsi_Cmnd *); | |||
129 | , instance->hostno, (reg), T128_address(reg))), readb(T128_address(reg))) | 130 | , instance->hostno, (reg), T128_address(reg))), readb(T128_address(reg))) |
130 | 131 | ||
131 | #define NCR5380_write(reg, value) { \ | 132 | #define NCR5380_write(reg, value) { \ |
132 | printk("scsi%d : write %02x to register %d at address %08x\n", \ | 133 | printk("scsi%d : write %02x to register %d at address %08x\n", \ |
133 | instance->hostno, (value), (reg), T128_address(reg)); \ | 134 | instance->hostno, (value), (reg), T128_address(reg)); \ |
134 | writeb((value), (T128_address(reg))); \ | 135 | writeb((value), (T128_address(reg))); \ |
135 | } | 136 | } |
@@ -142,10 +143,10 @@ static int t128_bus_reset(Scsi_Cmnd *); | |||
142 | #define NCR5380_bus_reset t128_bus_reset | 143 | #define NCR5380_bus_reset t128_bus_reset |
143 | #define NCR5380_proc_info t128_proc_info | 144 | #define NCR5380_proc_info t128_proc_info |
144 | 145 | ||
145 | /* 15 14 12 10 7 5 3 | 146 | /* 15 14 12 10 7 5 3 |
146 | 1101 0100 1010 1000 */ | 147 | 1101 0100 1010 1000 */ |
147 | 148 | ||
148 | #define T128_IRQS 0xc4a8 | 149 | #define T128_IRQS 0xc4a8 |
149 | 150 | ||
150 | #endif /* else def HOSTS_C */ | 151 | #endif /* else def HOSTS_C */ |
151 | #endif /* ndef ASM */ | 152 | #endif /* ndef ASM */ |