diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/scsi/sym53c416.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/scsi/sym53c416.c')
-rw-r--r-- | drivers/scsi/sym53c416.c | 881 |
1 files changed, 881 insertions, 0 deletions
diff --git a/drivers/scsi/sym53c416.c b/drivers/scsi/sym53c416.c new file mode 100644 index 000000000000..f26c3a29e631 --- /dev/null +++ b/drivers/scsi/sym53c416.c | |||
@@ -0,0 +1,881 @@ | |||
1 | /* | ||
2 | * sym53c416.c | ||
3 | * Low-level SCSI driver for sym53c416 chip. | ||
4 | * Copyright (C) 1998 Lieven Willems (lw_linux@hotmail.com) | ||
5 | * | ||
6 | * Changes : | ||
7 | * | ||
8 | * Marcelo Tosatti <marcelo@conectiva.com.br> : Added io_request_lock locking | ||
9 | * Alan Cox <alan@redhat.com> : Cleaned up code formatting | ||
10 | * Fixed an irq locking bug | ||
11 | * Added ISAPnP support | ||
12 | * Bjoern A. Zeeb <bzeeb@zabbadoz.net> : Initial irq locking updates | ||
13 | * Added another card with ISAPnP support | ||
14 | * | ||
15 | * LILO command line usage: sym53c416=<PORTBASE>[,<IRQ>] | ||
16 | * | ||
17 | * This program is free software; you can redistribute it and/or modify it | ||
18 | * under the terms of the GNU General Public License as published by the | ||
19 | * Free Software Foundation; either version 2, or (at your option) any | ||
20 | * later version. | ||
21 | * | ||
22 | * This program is distributed in the hope that it will be useful, but | ||
23 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
25 | * General Public License for more details. | ||
26 | * | ||
27 | */ | ||
28 | |||
29 | #include <linux/module.h> | ||
30 | #include <linux/kernel.h> | ||
31 | #include <linux/types.h> | ||
32 | #include <linux/init.h> | ||
33 | #include <linux/string.h> | ||
34 | #include <linux/ioport.h> | ||
35 | #include <linux/sched.h> | ||
36 | #include <linux/interrupt.h> | ||
37 | #include <linux/delay.h> | ||
38 | #include <linux/proc_fs.h> | ||
39 | #include <linux/spinlock.h> | ||
40 | #include <asm/dma.h> | ||
41 | #include <asm/system.h> | ||
42 | #include <asm/io.h> | ||
43 | #include <linux/blkdev.h> | ||
44 | #include <linux/isapnp.h> | ||
45 | #include "scsi.h" | ||
46 | #include <scsi/scsi_host.h> | ||
47 | #include "sym53c416.h" | ||
48 | |||
49 | #define VERSION_STRING "Version 1.0.0-ac" | ||
50 | |||
51 | #define TC_LOW 0x00 /* Transfer counter low */ | ||
52 | #define TC_MID 0x01 /* Transfer counter mid */ | ||
53 | #define SCSI_FIFO 0x02 /* SCSI FIFO register */ | ||
54 | #define COMMAND_REG 0x03 /* Command Register */ | ||
55 | #define STATUS_REG 0x04 /* Status Register (READ) */ | ||
56 | #define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */ | ||
57 | #define INT_REG 0x05 /* Interrupt Register (READ) */ | ||
58 | #define TOM 0x05 /* Time out multiplier (WRITE) */ | ||
59 | #define STP 0x06 /* Synchronous Transfer period */ | ||
60 | #define SYNC_OFFSET 0x07 /* Synchronous Offset */ | ||
61 | #define CONF_REG_1 0x08 /* Configuration register 1 */ | ||
62 | #define CONF_REG_2 0x0B /* Configuration register 2 */ | ||
63 | #define CONF_REG_3 0x0C /* Configuration register 3 */ | ||
64 | #define CONF_REG_4 0x0D /* Configuration register 4 */ | ||
65 | #define TC_HIGH 0x0E /* Transfer counter high */ | ||
66 | #define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */ | ||
67 | #define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */ | ||
68 | #define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */ | ||
69 | #define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */ | ||
70 | #define PIO_FIFO_CNT 0x14 /* PIO FIFO count */ | ||
71 | #define PIO_INT_REG 0x15 /* PIO interrupt register */ | ||
72 | #define CONF_REG_5 0x16 /* Configuration register 5 */ | ||
73 | #define FEATURE_EN 0x1D /* Feature Enable register */ | ||
74 | |||
75 | /* Configuration register 1 entries: */ | ||
76 | /* Bits 2-0: SCSI ID of host adapter */ | ||
77 | #define SCM 0x80 /* Slow Cable Mode */ | ||
78 | #define SRID 0x40 /* SCSI Reset Interrupt Disable */ | ||
79 | #define PTM 0x20 /* Parity Test Mode */ | ||
80 | #define EPC 0x10 /* Enable Parity Checking */ | ||
81 | #define CTME 0x08 /* Special Test Mode */ | ||
82 | |||
83 | /* Configuration register 2 entries: */ | ||
84 | #define FE 0x40 /* Features Enable */ | ||
85 | #define SCSI2 0x08 /* SCSI 2 Enable */ | ||
86 | #define TBPA 0x04 /* Target Bad Parity Abort */ | ||
87 | |||
88 | /* Configuration register 3 entries: */ | ||
89 | #define IDMRC 0x80 /* ID Message Reserved Check */ | ||
90 | #define QTE 0x40 /* Queue Tag Enable */ | ||
91 | #define CDB10 0x20 /* Command Descriptor Block 10 */ | ||
92 | #define FSCSI 0x10 /* FastSCSI */ | ||
93 | #define FCLK 0x08 /* FastClock */ | ||
94 | |||
95 | /* Configuration register 4 entries: */ | ||
96 | #define RBS 0x08 /* Register bank select */ | ||
97 | #define EAN 0x04 /* Enable Active Negotiation */ | ||
98 | |||
99 | /* Configuration register 5 entries: */ | ||
100 | #define LPSR 0x80 /* Lower Power SCSI Reset */ | ||
101 | #define IE 0x20 /* Interrupt Enable */ | ||
102 | #define LPM 0x02 /* Low Power Mode */ | ||
103 | #define WSE0 0x01 /* 0WS Enable */ | ||
104 | |||
105 | /* Interrupt register entries: */ | ||
106 | #define SRST 0x80 /* SCSI Reset */ | ||
107 | #define ILCMD 0x40 /* Illegal Command */ | ||
108 | #define DIS 0x20 /* Disconnect */ | ||
109 | #define BS 0x10 /* Bus Service */ | ||
110 | #define FC 0x08 /* Function Complete */ | ||
111 | #define RESEL 0x04 /* Reselected */ | ||
112 | #define SI 0x03 /* Selection Interrupt */ | ||
113 | |||
114 | /* Status Register Entries: */ | ||
115 | #define SCI 0x80 /* SCSI Core Int */ | ||
116 | #define GE 0x40 /* Gross Error */ | ||
117 | #define PE 0x20 /* Parity Error */ | ||
118 | #define TC 0x10 /* Terminal Count */ | ||
119 | #define VGC 0x08 /* Valid Group Code */ | ||
120 | #define PHBITS 0x07 /* Phase bits */ | ||
121 | |||
122 | /* PIO Interrupt Register Entries: */ | ||
123 | #define SCI 0x80 /* SCSI Core Int */ | ||
124 | #define PFI 0x40 /* PIO FIFO Interrupt */ | ||
125 | #define FULL 0x20 /* PIO FIFO Full */ | ||
126 | #define EMPTY 0x10 /* PIO FIFO Empty */ | ||
127 | #define CE 0x08 /* Collision Error */ | ||
128 | #define OUE 0x04 /* Overflow / Underflow error */ | ||
129 | #define FIE 0x02 /* Full Interrupt Enable */ | ||
130 | #define EIE 0x01 /* Empty Interrupt Enable */ | ||
131 | |||
132 | /* SYM53C416 SCSI phases (lower 3 bits of SYM53C416_STATUS_REG) */ | ||
133 | #define PHASE_DATA_OUT 0x00 | ||
134 | #define PHASE_DATA_IN 0x01 | ||
135 | #define PHASE_COMMAND 0x02 | ||
136 | #define PHASE_STATUS 0x03 | ||
137 | #define PHASE_RESERVED_1 0x04 | ||
138 | #define PHASE_RESERVED_2 0x05 | ||
139 | #define PHASE_MESSAGE_OUT 0x06 | ||
140 | #define PHASE_MESSAGE_IN 0x07 | ||
141 | |||
142 | /* SYM53C416 core commands */ | ||
143 | #define NOOP 0x00 | ||
144 | #define FLUSH_FIFO 0x01 | ||
145 | #define RESET_CHIP 0x02 | ||
146 | #define RESET_SCSI_BUS 0x03 | ||
147 | #define DISABLE_SEL_RESEL 0x45 | ||
148 | #define RESEL_SEQ 0x40 | ||
149 | #define SEL_WITHOUT_ATN_SEQ 0x41 | ||
150 | #define SEL_WITH_ATN_SEQ 0x42 | ||
151 | #define SEL_WITH_ATN_AND_STOP_SEQ 0x43 | ||
152 | #define ENABLE_SEL_RESEL 0x44 | ||
153 | #define SEL_WITH_ATN3_SEQ 0x46 | ||
154 | #define RESEL3_SEQ 0x47 | ||
155 | #define SND_MSG 0x20 | ||
156 | #define SND_STAT 0x21 | ||
157 | #define SND_DATA 0x22 | ||
158 | #define DISCONNECT_SEQ 0x23 | ||
159 | #define TERMINATE_SEQ 0x24 | ||
160 | #define TARGET_COMM_COMPLETE_SEQ 0x25 | ||
161 | #define DISCONN 0x27 | ||
162 | #define RECV_MSG_SEQ 0x28 | ||
163 | #define RECV_CMD 0x29 | ||
164 | #define RECV_DATA 0x2A | ||
165 | #define RECV_CMD_SEQ 0x2B | ||
166 | #define TARGET_ABORT_PIO 0x04 | ||
167 | #define TRANSFER_INFORMATION 0x10 | ||
168 | #define INIT_COMM_COMPLETE_SEQ 0x11 | ||
169 | #define MSG_ACCEPTED 0x12 | ||
170 | #define TRANSFER_PAD 0x18 | ||
171 | #define SET_ATN 0x1A | ||
172 | #define RESET_ATN 0x1B | ||
173 | #define ILLEGAL 0xFF | ||
174 | |||
175 | #define PIO_MODE 0x80 | ||
176 | |||
177 | #define IO_RANGE 0x20 /* 0x00 - 0x1F */ | ||
178 | #define ID "sym53c416" /* Attention: copied to the sym53c416.h */ | ||
179 | #define PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */ | ||
180 | |||
181 | #define READ_TIMEOUT 150 | ||
182 | #define WRITE_TIMEOUT 150 | ||
183 | |||
184 | #ifdef MODULE | ||
185 | |||
186 | #define sym53c416_base sym53c416 | ||
187 | #define sym53c416_base_1 sym53c416_1 | ||
188 | #define sym53c416_base_2 sym53c416_2 | ||
189 | #define sym53c416_base_3 sym53c416_3 | ||
190 | |||
191 | static unsigned int sym53c416_base[2] = {0,0}; | ||
192 | static unsigned int sym53c416_base_1[2] = {0,0}; | ||
193 | static unsigned int sym53c416_base_2[2] = {0,0}; | ||
194 | static unsigned int sym53c416_base_3[2] = {0,0}; | ||
195 | |||
196 | #endif | ||
197 | |||
198 | #define MAXHOSTS 4 | ||
199 | |||
200 | #define SG_ADDRESS(buffer) ((char *) (page_address((buffer)->page)+(buffer)->offset)) | ||
201 | |||
202 | enum phases | ||
203 | { | ||
204 | idle, | ||
205 | data_out, | ||
206 | data_in, | ||
207 | command_ph, | ||
208 | status_ph, | ||
209 | message_out, | ||
210 | message_in | ||
211 | }; | ||
212 | |||
213 | typedef struct | ||
214 | { | ||
215 | int base; | ||
216 | int irq; | ||
217 | int scsi_id; | ||
218 | } host; | ||
219 | |||
220 | static host hosts[MAXHOSTS] = { | ||
221 | {0, 0, SYM53C416_SCSI_ID}, | ||
222 | {0, 0, SYM53C416_SCSI_ID}, | ||
223 | {0, 0, SYM53C416_SCSI_ID}, | ||
224 | {0, 0, SYM53C416_SCSI_ID} | ||
225 | }; | ||
226 | |||
227 | static int host_index = 0; | ||
228 | static char info[120]; | ||
229 | static Scsi_Cmnd *current_command = NULL; | ||
230 | static int fastpio = 1; | ||
231 | |||
232 | static int probeaddrs[] = {0x200, 0x220, 0x240, 0}; | ||
233 | |||
234 | static void sym53c416_set_transfer_counter(int base, unsigned int len) | ||
235 | { | ||
236 | /* Program Transfer Counter */ | ||
237 | outb(len & 0x0000FF, base + TC_LOW); | ||
238 | outb((len & 0x00FF00) >> 8, base + TC_MID); | ||
239 | outb((len & 0xFF0000) >> 16, base + TC_HIGH); | ||
240 | } | ||
241 | |||
242 | static DEFINE_SPINLOCK(sym53c416_lock); | ||
243 | |||
244 | /* Returns the number of bytes read */ | ||
245 | static __inline__ unsigned int sym53c416_read(int base, unsigned char *buffer, unsigned int len) | ||
246 | { | ||
247 | unsigned int orig_len = len; | ||
248 | unsigned long flags = 0; | ||
249 | unsigned int bytes_left; | ||
250 | unsigned long i; | ||
251 | int timeout = READ_TIMEOUT; | ||
252 | |||
253 | /* Do transfer */ | ||
254 | spin_lock_irqsave(&sym53c416_lock, flags); | ||
255 | while(len && timeout) | ||
256 | { | ||
257 | bytes_left = inb(base + PIO_FIFO_CNT); /* Number of bytes in the PIO FIFO */ | ||
258 | if(fastpio && bytes_left > 3) | ||
259 | { | ||
260 | insl(base + PIO_FIFO_1, buffer, bytes_left >> 2); | ||
261 | buffer += bytes_left & 0xFC; | ||
262 | len -= bytes_left & 0xFC; | ||
263 | } | ||
264 | else if(bytes_left > 0) | ||
265 | { | ||
266 | len -= bytes_left; | ||
267 | for(; bytes_left > 0; bytes_left--) | ||
268 | *(buffer++) = inb(base + PIO_FIFO_1); | ||
269 | } | ||
270 | else | ||
271 | { | ||
272 | i = jiffies + timeout; | ||
273 | spin_unlock_irqrestore(&sym53c416_lock, flags); | ||
274 | while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & EMPTY) && timeout) | ||
275 | if(inb(base + PIO_INT_REG) & SCI) | ||
276 | timeout = 0; | ||
277 | spin_lock_irqsave(&sym53c416_lock, flags); | ||
278 | if(inb(base + PIO_INT_REG) & EMPTY) | ||
279 | timeout = 0; | ||
280 | } | ||
281 | } | ||
282 | spin_unlock_irqrestore(&sym53c416_lock, flags); | ||
283 | return orig_len - len; | ||
284 | } | ||
285 | |||
286 | /* Returns the number of bytes written */ | ||
287 | static __inline__ unsigned int sym53c416_write(int base, unsigned char *buffer, unsigned int len) | ||
288 | { | ||
289 | unsigned int orig_len = len; | ||
290 | unsigned long flags = 0; | ||
291 | unsigned int bufferfree; | ||
292 | unsigned long i; | ||
293 | unsigned int timeout = WRITE_TIMEOUT; | ||
294 | |||
295 | /* Do transfer */ | ||
296 | spin_lock_irqsave(&sym53c416_lock, flags); | ||
297 | while(len && timeout) | ||
298 | { | ||
299 | bufferfree = PIO_SIZE - inb(base + PIO_FIFO_CNT); | ||
300 | if(bufferfree > len) | ||
301 | bufferfree = len; | ||
302 | if(fastpio && bufferfree > 3) | ||
303 | { | ||
304 | outsl(base + PIO_FIFO_1, buffer, bufferfree >> 2); | ||
305 | buffer += bufferfree & 0xFC; | ||
306 | len -= bufferfree & 0xFC; | ||
307 | } | ||
308 | else if(bufferfree > 0) | ||
309 | { | ||
310 | len -= bufferfree; | ||
311 | for(; bufferfree > 0; bufferfree--) | ||
312 | outb(*(buffer++), base + PIO_FIFO_1); | ||
313 | } | ||
314 | else | ||
315 | { | ||
316 | i = jiffies + timeout; | ||
317 | spin_unlock_irqrestore(&sym53c416_lock, flags); | ||
318 | while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & FULL) && timeout) | ||
319 | ; | ||
320 | spin_lock_irqsave(&sym53c416_lock, flags); | ||
321 | if(inb(base + PIO_INT_REG) & FULL) | ||
322 | timeout = 0; | ||
323 | } | ||
324 | } | ||
325 | spin_unlock_irqrestore(&sym53c416_lock, flags); | ||
326 | return orig_len - len; | ||
327 | } | ||
328 | |||
329 | static irqreturn_t sym53c416_intr_handle(int irq, void *dev_id, | ||
330 | struct pt_regs *regs) | ||
331 | { | ||
332 | struct Scsi_Host *dev = dev_id; | ||
333 | int base = 0; | ||
334 | int i; | ||
335 | unsigned long flags = 0; | ||
336 | unsigned char status_reg, pio_int_reg, int_reg; | ||
337 | struct scatterlist *sglist; | ||
338 | unsigned int sgcount; | ||
339 | unsigned int tot_trans = 0; | ||
340 | |||
341 | /* We search the base address of the host adapter which caused the interrupt */ | ||
342 | /* FIXME: should pass dev_id sensibly as hosts[i] */ | ||
343 | for(i = 0; i < host_index && !base; i++) | ||
344 | if(irq == hosts[i].irq) | ||
345 | base = hosts[i].base; | ||
346 | /* If no adapter found, we cannot handle the interrupt. Leave a message */ | ||
347 | /* and continue. This should never happen... */ | ||
348 | if(!base) | ||
349 | { | ||
350 | printk(KERN_ERR "sym53c416: No host adapter defined for interrupt %d\n", irq); | ||
351 | return IRQ_NONE; | ||
352 | } | ||
353 | /* Now we have the base address and we can start handling the interrupt */ | ||
354 | |||
355 | spin_lock_irqsave(dev->host_lock,flags); | ||
356 | status_reg = inb(base + STATUS_REG); | ||
357 | pio_int_reg = inb(base + PIO_INT_REG); | ||
358 | int_reg = inb(base + INT_REG); | ||
359 | spin_unlock_irqrestore(dev->host_lock, flags); | ||
360 | |||
361 | /* First, we handle error conditions */ | ||
362 | if(int_reg & SCI) /* SCSI Reset */ | ||
363 | { | ||
364 | printk(KERN_DEBUG "sym53c416: Reset received\n"); | ||
365 | current_command->SCp.phase = idle; | ||
366 | current_command->result = DID_RESET << 16; | ||
367 | spin_lock_irqsave(dev->host_lock, flags); | ||
368 | current_command->scsi_done(current_command); | ||
369 | spin_unlock_irqrestore(dev->host_lock, flags); | ||
370 | goto out; | ||
371 | } | ||
372 | if(int_reg & ILCMD) /* Illegal Command */ | ||
373 | { | ||
374 | printk(KERN_WARNING "sym53c416: Illegal Command: 0x%02x.\n", inb(base + COMMAND_REG)); | ||
375 | current_command->SCp.phase = idle; | ||
376 | current_command->result = DID_ERROR << 16; | ||
377 | spin_lock_irqsave(dev->host_lock, flags); | ||
378 | current_command->scsi_done(current_command); | ||
379 | spin_unlock_irqrestore(dev->host_lock, flags); | ||
380 | goto out; | ||
381 | } | ||
382 | if(status_reg & GE) /* Gross Error */ | ||
383 | { | ||
384 | printk(KERN_WARNING "sym53c416: Controller reports gross error.\n"); | ||
385 | current_command->SCp.phase = idle; | ||
386 | current_command->result = DID_ERROR << 16; | ||
387 | spin_lock_irqsave(dev->host_lock, flags); | ||
388 | current_command->scsi_done(current_command); | ||
389 | spin_unlock_irqrestore(dev->host_lock, flags); | ||
390 | goto out; | ||
391 | } | ||
392 | if(status_reg & PE) /* Parity Error */ | ||
393 | { | ||
394 | printk(KERN_WARNING "sym53c416:SCSI parity error.\n"); | ||
395 | current_command->SCp.phase = idle; | ||
396 | current_command->result = DID_PARITY << 16; | ||
397 | spin_lock_irqsave(dev->host_lock, flags); | ||
398 | current_command->scsi_done(current_command); | ||
399 | spin_unlock_irqrestore(dev->host_lock, flags); | ||
400 | goto out; | ||
401 | } | ||
402 | if(pio_int_reg & (CE | OUE)) | ||
403 | { | ||
404 | printk(KERN_WARNING "sym53c416: PIO interrupt error.\n"); | ||
405 | current_command->SCp.phase = idle; | ||
406 | current_command->result = DID_ERROR << 16; | ||
407 | spin_lock_irqsave(dev->host_lock, flags); | ||
408 | current_command->scsi_done(current_command); | ||
409 | spin_unlock_irqrestore(dev->host_lock, flags); | ||
410 | goto out; | ||
411 | } | ||
412 | if(int_reg & DIS) /* Disconnect */ | ||
413 | { | ||
414 | if(current_command->SCp.phase != message_in) | ||
415 | current_command->result = DID_NO_CONNECT << 16; | ||
416 | else | ||
417 | current_command->result = (current_command->SCp.Status & 0xFF) | ((current_command->SCp.Message & 0xFF) << 8) | (DID_OK << 16); | ||
418 | current_command->SCp.phase = idle; | ||
419 | spin_lock_irqsave(dev->host_lock, flags); | ||
420 | current_command->scsi_done(current_command); | ||
421 | spin_unlock_irqrestore(dev->host_lock, flags); | ||
422 | goto out; | ||
423 | } | ||
424 | /* Now we handle SCSI phases */ | ||
425 | |||
426 | switch(status_reg & PHBITS) /* Filter SCSI phase out of status reg */ | ||
427 | { | ||
428 | case PHASE_DATA_OUT: | ||
429 | { | ||
430 | if(int_reg & BS) | ||
431 | { | ||
432 | current_command->SCp.phase = data_out; | ||
433 | outb(FLUSH_FIFO, base + COMMAND_REG); | ||
434 | sym53c416_set_transfer_counter(base, current_command->request_bufflen); | ||
435 | outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG); | ||
436 | if(!current_command->use_sg) | ||
437 | tot_trans = sym53c416_write(base, current_command->request_buffer, current_command->request_bufflen); | ||
438 | else | ||
439 | { | ||
440 | sgcount = current_command->use_sg; | ||
441 | sglist = current_command->request_buffer; | ||
442 | while(sgcount--) | ||
443 | { | ||
444 | tot_trans += sym53c416_write(base, SG_ADDRESS(sglist), sglist->length); | ||
445 | sglist++; | ||
446 | } | ||
447 | } | ||
448 | if(tot_trans < current_command->underflow) | ||
449 | printk(KERN_WARNING "sym53c416: Underflow, wrote %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow); | ||
450 | } | ||
451 | break; | ||
452 | } | ||
453 | |||
454 | case PHASE_DATA_IN: | ||
455 | { | ||
456 | if(int_reg & BS) | ||
457 | { | ||
458 | current_command->SCp.phase = data_in; | ||
459 | outb(FLUSH_FIFO, base + COMMAND_REG); | ||
460 | sym53c416_set_transfer_counter(base, current_command->request_bufflen); | ||
461 | outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG); | ||
462 | if(!current_command->use_sg) | ||
463 | tot_trans = sym53c416_read(base, current_command->request_buffer, current_command->request_bufflen); | ||
464 | else | ||
465 | { | ||
466 | sgcount = current_command->use_sg; | ||
467 | sglist = current_command->request_buffer; | ||
468 | while(sgcount--) | ||
469 | { | ||
470 | tot_trans += sym53c416_read(base, SG_ADDRESS(sglist), sglist->length); | ||
471 | sglist++; | ||
472 | } | ||
473 | } | ||
474 | if(tot_trans < current_command->underflow) | ||
475 | printk(KERN_WARNING "sym53c416: Underflow, read %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow); | ||
476 | } | ||
477 | break; | ||
478 | } | ||
479 | |||
480 | case PHASE_COMMAND: | ||
481 | { | ||
482 | current_command->SCp.phase = command_ph; | ||
483 | printk(KERN_ERR "sym53c416: Unknown interrupt in command phase.\n"); | ||
484 | break; | ||
485 | } | ||
486 | |||
487 | case PHASE_STATUS: | ||
488 | { | ||
489 | current_command->SCp.phase = status_ph; | ||
490 | outb(FLUSH_FIFO, base + COMMAND_REG); | ||
491 | outb(INIT_COMM_COMPLETE_SEQ, base + COMMAND_REG); | ||
492 | break; | ||
493 | } | ||
494 | |||
495 | case PHASE_RESERVED_1: | ||
496 | case PHASE_RESERVED_2: | ||
497 | { | ||
498 | printk(KERN_ERR "sym53c416: Reserved phase occurred.\n"); | ||
499 | break; | ||
500 | } | ||
501 | |||
502 | case PHASE_MESSAGE_OUT: | ||
503 | { | ||
504 | current_command->SCp.phase = message_out; | ||
505 | outb(SET_ATN, base + COMMAND_REG); | ||
506 | outb(MSG_ACCEPTED, base + COMMAND_REG); | ||
507 | break; | ||
508 | } | ||
509 | |||
510 | case PHASE_MESSAGE_IN: | ||
511 | { | ||
512 | current_command->SCp.phase = message_in; | ||
513 | current_command->SCp.Status = inb(base + SCSI_FIFO); | ||
514 | current_command->SCp.Message = inb(base + SCSI_FIFO); | ||
515 | if(current_command->SCp.Message == SAVE_POINTERS || current_command->SCp.Message == DISCONNECT) | ||
516 | outb(SET_ATN, base + COMMAND_REG); | ||
517 | outb(MSG_ACCEPTED, base + COMMAND_REG); | ||
518 | break; | ||
519 | } | ||
520 | } | ||
521 | out: | ||
522 | return IRQ_HANDLED; | ||
523 | } | ||
524 | |||
525 | static void sym53c416_init(int base, int scsi_id) | ||
526 | { | ||
527 | outb(RESET_CHIP, base + COMMAND_REG); | ||
528 | outb(NOOP, base + COMMAND_REG); | ||
529 | outb(0x99, base + TOM); /* Time out of 250 ms */ | ||
530 | outb(0x05, base + STP); | ||
531 | outb(0x00, base + SYNC_OFFSET); | ||
532 | outb(EPC | scsi_id, base + CONF_REG_1); | ||
533 | outb(FE | SCSI2 | TBPA, base + CONF_REG_2); | ||
534 | outb(IDMRC | QTE | CDB10 | FSCSI | FCLK, base + CONF_REG_3); | ||
535 | outb(0x83 | EAN, base + CONF_REG_4); | ||
536 | outb(IE | WSE0, base + CONF_REG_5); | ||
537 | outb(0, base + FEATURE_EN); | ||
538 | } | ||
539 | |||
540 | static int sym53c416_probeirq(int base, int scsi_id) | ||
541 | { | ||
542 | int irq, irqs; | ||
543 | unsigned long i; | ||
544 | |||
545 | /* Clear interrupt register */ | ||
546 | inb(base + INT_REG); | ||
547 | /* Start probing for irq's */ | ||
548 | irqs = probe_irq_on(); | ||
549 | /* Reinit chip */ | ||
550 | sym53c416_init(base, scsi_id); | ||
551 | /* Cause interrupt */ | ||
552 | outb(NOOP, base + COMMAND_REG); | ||
553 | outb(ILLEGAL, base + COMMAND_REG); | ||
554 | outb(0x07, base + DEST_BUS_ID); | ||
555 | outb(0x00, base + DEST_BUS_ID); | ||
556 | /* Wait for interrupt to occur */ | ||
557 | i = jiffies + 20; | ||
558 | while(time_before(jiffies, i) && !(inb(base + STATUS_REG) & SCI)) | ||
559 | barrier(); | ||
560 | if(time_before_eq(i, jiffies)) /* timed out */ | ||
561 | return 0; | ||
562 | /* Get occurred irq */ | ||
563 | irq = probe_irq_off(irqs); | ||
564 | sym53c416_init(base, scsi_id); | ||
565 | return irq; | ||
566 | } | ||
567 | |||
568 | /* Setup: sym53c416=base,irq */ | ||
569 | void sym53c416_setup(char *str, int *ints) | ||
570 | { | ||
571 | int i; | ||
572 | |||
573 | if(host_index >= MAXHOSTS) | ||
574 | { | ||
575 | printk(KERN_WARNING "sym53c416: Too many hosts defined\n"); | ||
576 | return; | ||
577 | } | ||
578 | if(ints[0] < 1 || ints[0] > 2) | ||
579 | { | ||
580 | printk(KERN_ERR "sym53c416: Wrong number of parameters:\n"); | ||
581 | printk(KERN_ERR "sym53c416: usage: sym53c416=<base>[,<irq>]\n"); | ||
582 | return; | ||
583 | } | ||
584 | for(i = 0; i < host_index && i >= 0; i++) | ||
585 | if(hosts[i].base == ints[1]) | ||
586 | i = -2; | ||
587 | if(i >= 0) | ||
588 | { | ||
589 | hosts[host_index].base = ints[1]; | ||
590 | hosts[host_index].irq = (ints[0] == 2)? ints[2] : 0; | ||
591 | host_index++; | ||
592 | } | ||
593 | } | ||
594 | |||
595 | static int sym53c416_test(int base) | ||
596 | { | ||
597 | outb(RESET_CHIP, base + COMMAND_REG); | ||
598 | outb(NOOP, base + COMMAND_REG); | ||
599 | if(inb(base + COMMAND_REG) != NOOP) | ||
600 | return 0; | ||
601 | if(!inb(base + TC_HIGH) || inb(base + TC_HIGH) == 0xFF) | ||
602 | return 0; | ||
603 | if((inb(base + PIO_INT_REG) & (FULL | EMPTY | CE | OUE | FIE | EIE)) != EMPTY) | ||
604 | return 0; | ||
605 | return 1; | ||
606 | } | ||
607 | |||
608 | |||
609 | static struct isapnp_device_id id_table[] __devinitdata = { | ||
610 | { ISAPNP_ANY_ID, ISAPNP_ANY_ID, | ||
611 | ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4161), 0 }, | ||
612 | { ISAPNP_ANY_ID, ISAPNP_ANY_ID, | ||
613 | ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4163), 0 }, | ||
614 | { ISAPNP_DEVICE_SINGLE_END } | ||
615 | }; | ||
616 | |||
617 | MODULE_DEVICE_TABLE(isapnp, id_table); | ||
618 | |||
619 | static void sym53c416_probe(void) | ||
620 | { | ||
621 | int *base = probeaddrs; | ||
622 | int ints[2]; | ||
623 | |||
624 | ints[0] = 1; | ||
625 | for(; *base; base++) { | ||
626 | if (request_region(*base, IO_RANGE, ID)) { | ||
627 | if (sym53c416_test(*base)) { | ||
628 | ints[1] = *base; | ||
629 | sym53c416_setup(NULL, ints); | ||
630 | } | ||
631 | release_region(*base, IO_RANGE); | ||
632 | } | ||
633 | } | ||
634 | } | ||
635 | |||
636 | int __init sym53c416_detect(Scsi_Host_Template *tpnt) | ||
637 | { | ||
638 | unsigned long flags; | ||
639 | struct Scsi_Host * shpnt = NULL; | ||
640 | int i; | ||
641 | int count; | ||
642 | struct pnp_dev *idev = NULL; | ||
643 | |||
644 | #ifdef MODULE | ||
645 | int ints[3]; | ||
646 | |||
647 | ints[0] = 2; | ||
648 | if(sym53c416_base) | ||
649 | { | ||
650 | ints[1] = sym53c416_base[0]; | ||
651 | ints[2] = sym53c416_base[1]; | ||
652 | sym53c416_setup(NULL, ints); | ||
653 | } | ||
654 | if(sym53c416_base_1) | ||
655 | { | ||
656 | ints[1] = sym53c416_base_1[0]; | ||
657 | ints[2] = sym53c416_base_1[1]; | ||
658 | sym53c416_setup(NULL, ints); | ||
659 | } | ||
660 | if(sym53c416_base_2) | ||
661 | { | ||
662 | ints[1] = sym53c416_base_2[0]; | ||
663 | ints[2] = sym53c416_base_2[1]; | ||
664 | sym53c416_setup(NULL, ints); | ||
665 | } | ||
666 | if(sym53c416_base_3) | ||
667 | { | ||
668 | ints[1] = sym53c416_base_3[0]; | ||
669 | ints[2] = sym53c416_base_3[1]; | ||
670 | sym53c416_setup(NULL, ints); | ||
671 | } | ||
672 | #endif | ||
673 | printk(KERN_INFO "sym53c416.c: %s\n", VERSION_STRING); | ||
674 | |||
675 | for (i=0; id_table[i].vendor != 0; i++) { | ||
676 | while((idev=pnp_find_dev(NULL, id_table[i].vendor, | ||
677 | id_table[i].function, idev))!=NULL) | ||
678 | { | ||
679 | int i[3]; | ||
680 | |||
681 | if(pnp_device_attach(idev)<0) | ||
682 | { | ||
683 | printk(KERN_WARNING "sym53c416: unable to attach PnP device.\n"); | ||
684 | continue; | ||
685 | } | ||
686 | if(pnp_activate_dev(idev) < 0) | ||
687 | { | ||
688 | printk(KERN_WARNING "sym53c416: unable to activate PnP device.\n"); | ||
689 | pnp_device_detach(idev); | ||
690 | continue; | ||
691 | |||
692 | } | ||
693 | |||
694 | i[0] = 2; | ||
695 | i[1] = pnp_port_start(idev, 0); | ||
696 | i[2] = pnp_irq(idev, 0); | ||
697 | |||
698 | printk(KERN_INFO "sym53c416: ISAPnP card found and configured at 0x%X, IRQ %d.\n", | ||
699 | i[1], i[2]); | ||
700 | sym53c416_setup(NULL, i); | ||
701 | } | ||
702 | } | ||
703 | sym53c416_probe(); | ||
704 | |||
705 | /* Now we register and set up each host adapter found... */ | ||
706 | for(count = 0, i = 0; i < host_index; i++) { | ||
707 | if (!request_region(hosts[i].base, IO_RANGE, ID)) | ||
708 | continue; | ||
709 | if (!sym53c416_test(hosts[i].base)) { | ||
710 | printk(KERN_WARNING "No sym53c416 found at address 0x%03x\n", hosts[i].base); | ||
711 | goto fail_release_region; | ||
712 | } | ||
713 | |||
714 | /* We don't have an irq yet, so we should probe for one */ | ||
715 | if (!hosts[i].irq) | ||
716 | hosts[i].irq = sym53c416_probeirq(hosts[i].base, hosts[i].scsi_id); | ||
717 | if (!hosts[i].irq) | ||
718 | goto fail_release_region; | ||
719 | |||
720 | shpnt = scsi_register(tpnt, 0); | ||
721 | if (!shpnt) | ||
722 | goto fail_release_region; | ||
723 | /* Request for specified IRQ */ | ||
724 | if (request_irq(hosts[i].irq, sym53c416_intr_handle, 0, ID, shpnt)) | ||
725 | goto fail_free_host; | ||
726 | |||
727 | spin_lock_irqsave(&sym53c416_lock, flags); | ||
728 | shpnt->unique_id = hosts[i].base; | ||
729 | shpnt->io_port = hosts[i].base; | ||
730 | shpnt->n_io_port = IO_RANGE; | ||
731 | shpnt->irq = hosts[i].irq; | ||
732 | shpnt->this_id = hosts[i].scsi_id; | ||
733 | sym53c416_init(hosts[i].base, hosts[i].scsi_id); | ||
734 | count++; | ||
735 | spin_unlock_irqrestore(&sym53c416_lock, flags); | ||
736 | continue; | ||
737 | |||
738 | fail_free_host: | ||
739 | scsi_unregister(shpnt); | ||
740 | fail_release_region: | ||
741 | release_region(hosts[i].base, IO_RANGE); | ||
742 | } | ||
743 | return count; | ||
744 | } | ||
745 | |||
746 | const char *sym53c416_info(struct Scsi_Host *SChost) | ||
747 | { | ||
748 | int i; | ||
749 | int base = SChost->io_port; | ||
750 | int irq = SChost->irq; | ||
751 | int scsi_id = 0; | ||
752 | int rev = inb(base + TC_HIGH); | ||
753 | |||
754 | for(i = 0; i < host_index; i++) | ||
755 | if(hosts[i].base == base) | ||
756 | scsi_id = hosts[i].scsi_id; | ||
757 | sprintf(info, "Symbios Logic 53c416 (rev. %d) at 0x%03x, irq %d, SCSI-ID %d, %s pio", rev, base, irq, scsi_id, (fastpio)? "fast" : "slow"); | ||
758 | return info; | ||
759 | } | ||
760 | |||
761 | int sym53c416_queuecommand(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)) | ||
762 | { | ||
763 | int base; | ||
764 | unsigned long flags = 0; | ||
765 | int i; | ||
766 | |||
767 | /* Store base register as we can have more than one controller in the system */ | ||
768 | base = SCpnt->device->host->io_port; | ||
769 | current_command = SCpnt; /* set current command */ | ||
770 | current_command->scsi_done = done; /* set ptr to done function */ | ||
771 | current_command->SCp.phase = command_ph; /* currect phase is the command phase */ | ||
772 | current_command->SCp.Status = 0; | ||
773 | current_command->SCp.Message = 0; | ||
774 | |||
775 | spin_lock_irqsave(&sym53c416_lock, flags); | ||
776 | outb(SCpnt->device->id, base + DEST_BUS_ID); /* Set scsi id target */ | ||
777 | outb(FLUSH_FIFO, base + COMMAND_REG); /* Flush SCSI and PIO FIFO's */ | ||
778 | /* Write SCSI command into the SCSI fifo */ | ||
779 | for(i = 0; i < SCpnt->cmd_len; i++) | ||
780 | outb(SCpnt->cmnd[i], base + SCSI_FIFO); | ||
781 | /* Start selection sequence */ | ||
782 | outb(SEL_WITHOUT_ATN_SEQ, base + COMMAND_REG); | ||
783 | /* Now an interrupt will be generated which we will catch in out interrupt routine */ | ||
784 | spin_unlock_irqrestore(&sym53c416_lock, flags); | ||
785 | return 0; | ||
786 | } | ||
787 | |||
788 | static int sym53c416_abort(Scsi_Cmnd *SCpnt) | ||
789 | { | ||
790 | return FAILED; | ||
791 | } | ||
792 | |||
793 | static int sym53c416_bus_reset(Scsi_Cmnd *SCpnt) | ||
794 | { | ||
795 | return FAILED; | ||
796 | } | ||
797 | |||
798 | static int sym53c416_device_reset(Scsi_Cmnd *SCpnt) | ||
799 | { | ||
800 | return FAILED; | ||
801 | } | ||
802 | |||
803 | static int sym53c416_host_reset(Scsi_Cmnd *SCpnt) | ||
804 | { | ||
805 | int base; | ||
806 | int scsi_id = -1; | ||
807 | int i; | ||
808 | |||
809 | /* printk("sym53c416_reset\n"); */ | ||
810 | base = SCpnt->device->host->io_port; | ||
811 | /* search scsi_id - fixme, we shouldnt need to iterate for this! */ | ||
812 | for(i = 0; i < host_index && scsi_id != -1; i++) | ||
813 | if(hosts[i].base == base) | ||
814 | scsi_id = hosts[i].scsi_id; | ||
815 | outb(RESET_CHIP, base + COMMAND_REG); | ||
816 | outb(NOOP | PIO_MODE, base + COMMAND_REG); | ||
817 | outb(RESET_SCSI_BUS, base + COMMAND_REG); | ||
818 | sym53c416_init(base, scsi_id); | ||
819 | return SUCCESS; | ||
820 | } | ||
821 | |||
822 | static int sym53c416_release(struct Scsi_Host *shost) | ||
823 | { | ||
824 | if (shost->irq) | ||
825 | free_irq(shost->irq, shost); | ||
826 | if (shost->io_port && shost->n_io_port) | ||
827 | release_region(shost->io_port, shost->n_io_port); | ||
828 | return 0; | ||
829 | } | ||
830 | |||
831 | static int sym53c416_bios_param(struct scsi_device *sdev, | ||
832 | struct block_device *dev, | ||
833 | sector_t capacity, int *ip) | ||
834 | { | ||
835 | int size; | ||
836 | |||
837 | size = capacity; | ||
838 | ip[0] = 64; /* heads */ | ||
839 | ip[1] = 32; /* sectors */ | ||
840 | if((ip[2] = size >> 11) > 1024) /* cylinders, test for big disk */ | ||
841 | { | ||
842 | ip[0] = 255; /* heads */ | ||
843 | ip[1] = 63; /* sectors */ | ||
844 | ip[2] = size / (255 * 63); /* cylinders */ | ||
845 | } | ||
846 | return 0; | ||
847 | } | ||
848 | |||
849 | /* Loadable module support */ | ||
850 | #ifdef MODULE | ||
851 | |||
852 | MODULE_AUTHOR("Lieven Willems"); | ||
853 | MODULE_LICENSE("GPL"); | ||
854 | |||
855 | module_param_array(sym53c416, uint, NULL, 0); | ||
856 | module_param_array(sym53c416_1, uint, NULL, 0); | ||
857 | module_param_array(sym53c416_2, uint, NULL, 0); | ||
858 | module_param_array(sym53c416_3, uint, NULL, 0); | ||
859 | |||
860 | #endif | ||
861 | |||
862 | static Scsi_Host_Template driver_template = { | ||
863 | .proc_name = "sym53c416", | ||
864 | .name = "Symbios Logic 53c416", | ||
865 | .detect = sym53c416_detect, | ||
866 | .info = sym53c416_info, | ||
867 | .queuecommand = sym53c416_queuecommand, | ||
868 | .eh_abort_handler = sym53c416_abort, | ||
869 | .eh_host_reset_handler =sym53c416_host_reset, | ||
870 | .eh_bus_reset_handler = sym53c416_bus_reset, | ||
871 | .eh_device_reset_handler =sym53c416_device_reset, | ||
872 | .release = sym53c416_release, | ||
873 | .bios_param = sym53c416_bios_param, | ||
874 | .can_queue = 1, | ||
875 | .this_id = SYM53C416_SCSI_ID, | ||
876 | .sg_tablesize = 32, | ||
877 | .cmd_per_lun = 1, | ||
878 | .unchecked_isa_dma = 1, | ||
879 | .use_clustering = ENABLE_CLUSTERING, | ||
880 | }; | ||
881 | #include "scsi_module.c" | ||