diff options
author | Finn Thain <fthain@telegraphics.com.au> | 2014-03-17 20:42:24 -0400 |
---|---|---|
committer | Christoph Hellwig <hch@lst.de> | 2014-05-28 06:16:28 -0400 |
commit | 757f5bad2b748dca6f82e660875320d156485ea5 (patch) | |
tree | 546120895d9d01ac96ab9c2c86f4fe135a3ea54a /drivers/scsi/sun3_scsi.c | |
parent | 9f6620a318e87d73f8ce3daa7f84efc739d1fa2d (diff) |
scsi/NCR5380: merge sun3_scsi_vme.c into sun3_scsi.c
The sun3 drivers suffer from a whole bunch of duplicated code. Fix this
by following the g_NCR5380_mmio example. (Notionally, sun3_scsi relates to
sun3_scsi_vme in the same way that g_NCR5380 relates to g_NCR5380_mmio.)
Dead code is also removed: we now have working debug macros so
SUN3_SCSI_DEBUG is undesirable. Dead code within #ifdef OLD_DMA is also
dropped, consistent with sun3_scsi_vme.c.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Acked-by: Sam Creasey <sammy@sammy.net>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Diffstat (limited to 'drivers/scsi/sun3_scsi.c')
-rw-r--r-- | drivers/scsi/sun3_scsi.c | 223 |
1 files changed, 171 insertions, 52 deletions
diff --git a/drivers/scsi/sun3_scsi.c b/drivers/scsi/sun3_scsi.c index ac9c29b55a33..9707b7494a89 100644 --- a/drivers/scsi/sun3_scsi.c +++ b/drivers/scsi/sun3_scsi.c | |||
@@ -3,6 +3,10 @@ | |||
3 | * | 3 | * |
4 | * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net) | 4 | * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net) |
5 | * | 5 | * |
6 | * VME support added by Sam Creasey | ||
7 | * | ||
8 | * TODO: modify this driver to support multiple Sun3 SCSI VME boards | ||
9 | * | ||
6 | * Adapted from mac_scsinew.c: | 10 | * Adapted from mac_scsinew.c: |
7 | */ | 11 | */ |
8 | /* | 12 | /* |
@@ -73,7 +77,7 @@ | |||
73 | #include "sun3_scsi.h" | 77 | #include "sun3_scsi.h" |
74 | #include "NCR5380.h" | 78 | #include "NCR5380.h" |
75 | 79 | ||
76 | /* #define OLDDMA */ | 80 | extern int sun3_map_test(unsigned long, char *); |
77 | 81 | ||
78 | #define USE_WRAPPER | 82 | #define USE_WRAPPER |
79 | /*#define RESET_BOOT */ | 83 | /*#define RESET_BOOT */ |
@@ -89,7 +93,11 @@ | |||
89 | 93 | ||
90 | /* #define SUPPORT_TAGS */ | 94 | /* #define SUPPORT_TAGS */ |
91 | 95 | ||
96 | #ifdef SUN3_SCSI_VME | ||
97 | #define ENABLE_IRQ() | ||
98 | #else | ||
92 | #define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI ); | 99 | #define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI ); |
100 | #endif | ||
93 | 101 | ||
94 | 102 | ||
95 | static irqreturn_t scsi_sun3_intr(int irq, void *dummy); | 103 | static irqreturn_t scsi_sun3_intr(int irq, void *dummy); |
@@ -126,10 +134,9 @@ static struct scsi_cmnd *sun3_dma_setup_done = NULL; | |||
126 | 134 | ||
127 | static volatile unsigned char *sun3_scsi_regp; | 135 | static volatile unsigned char *sun3_scsi_regp; |
128 | static volatile struct sun3_dma_regs *dregs; | 136 | static volatile struct sun3_dma_regs *dregs; |
129 | #ifdef OLDDMA | 137 | #ifndef SUN3_SCSI_VME |
130 | static unsigned char *dmabuf = NULL; /* dma memory buffer */ | ||
131 | #endif | ||
132 | static struct sun3_udc_regs *udc_regs = NULL; | 138 | static struct sun3_udc_regs *udc_regs = NULL; |
139 | #endif | ||
133 | static unsigned char *sun3_dma_orig_addr = NULL; | 140 | static unsigned char *sun3_dma_orig_addr = NULL; |
134 | static unsigned long sun3_dma_orig_count = 0; | 141 | static unsigned long sun3_dma_orig_count = 0; |
135 | static int sun3_dma_active = 0; | 142 | static int sun3_dma_active = 0; |
@@ -149,6 +156,7 @@ static inline void sun3scsi_write(int reg, int value) | |||
149 | sun3_scsi_regp[reg] = value; | 156 | sun3_scsi_regp[reg] = value; |
150 | } | 157 | } |
151 | 158 | ||
159 | #ifndef SUN3_SCSI_VME | ||
152 | /* dma controller register access functions */ | 160 | /* dma controller register access functions */ |
153 | 161 | ||
154 | static inline unsigned short sun3_udc_read(unsigned char reg) | 162 | static inline unsigned short sun3_udc_read(unsigned char reg) |
@@ -170,6 +178,7 @@ static inline void sun3_udc_write(unsigned short val, unsigned char reg) | |||
170 | dregs->udc_data = val; | 178 | dregs->udc_data = val; |
171 | udelay(SUN3_DMA_DELAY); | 179 | udelay(SUN3_DMA_DELAY); |
172 | } | 180 | } |
181 | #endif | ||
173 | 182 | ||
174 | /* | 183 | /* |
175 | * XXX: status debug | 184 | * XXX: status debug |
@@ -188,17 +197,32 @@ static struct Scsi_Host *default_instance; | |||
188 | * | 197 | * |
189 | */ | 198 | */ |
190 | 199 | ||
191 | int __init sun3scsi_detect(struct scsi_host_template * tpnt) | 200 | static int __init sun3scsi_detect(struct scsi_host_template *tpnt) |
192 | { | 201 | { |
193 | unsigned long ioaddr; | 202 | unsigned long ioaddr, irq; |
194 | static int called = 0; | 203 | static int called = 0; |
195 | struct Scsi_Host *instance; | 204 | struct Scsi_Host *instance; |
205 | #ifdef SUN3_SCSI_VME | ||
206 | int i; | ||
207 | unsigned long addrs[3] = { IOBASE_SUN3_VMESCSI, | ||
208 | IOBASE_SUN3_VMESCSI + 0x4000, | ||
209 | 0 }; | ||
210 | unsigned long vecs[3] = { SUN3_VEC_VMESCSI0, | ||
211 | SUN3_VEC_VMESCSI1, | ||
212 | 0 }; | ||
213 | #endif | ||
196 | 214 | ||
197 | /* check that this machine has an onboard 5380 */ | 215 | /* check that this machine has an onboard 5380 */ |
198 | switch(idprom->id_machtype) { | 216 | switch(idprom->id_machtype) { |
217 | #ifdef SUN3_SCSI_VME | ||
218 | case SM_SUN3|SM_3_160: | ||
219 | case SM_SUN3|SM_3_260: | ||
220 | break; | ||
221 | #else | ||
199 | case SM_SUN3|SM_3_50: | 222 | case SM_SUN3|SM_3_50: |
200 | case SM_SUN3|SM_3_60: | 223 | case SM_SUN3|SM_3_60: |
201 | break; | 224 | break; |
225 | #endif | ||
202 | 226 | ||
203 | default: | 227 | default: |
204 | return 0; | 228 | return 0; |
@@ -207,7 +231,11 @@ int __init sun3scsi_detect(struct scsi_host_template * tpnt) | |||
207 | if(called) | 231 | if(called) |
208 | return 0; | 232 | return 0; |
209 | 233 | ||
234 | #ifdef SUN3_SCSI_VME | ||
235 | tpnt->proc_name = "Sun3 5380 VME SCSI"; | ||
236 | #else | ||
210 | tpnt->proc_name = "Sun3 5380 SCSI"; | 237 | tpnt->proc_name = "Sun3 5380 SCSI"; |
238 | #endif | ||
211 | 239 | ||
212 | /* setup variables */ | 240 | /* setup variables */ |
213 | tpnt->can_queue = | 241 | tpnt->can_queue = |
@@ -224,6 +252,38 @@ int __init sun3scsi_detect(struct scsi_host_template * tpnt) | |||
224 | tpnt->this_id = 7; | 252 | tpnt->this_id = 7; |
225 | } | 253 | } |
226 | 254 | ||
255 | #ifdef SUN3_SCSI_VME | ||
256 | ioaddr = 0; | ||
257 | for (i = 0; addrs[i] != 0; i++) { | ||
258 | unsigned char x; | ||
259 | |||
260 | ioaddr = (unsigned long)sun3_ioremap(addrs[i], PAGE_SIZE, | ||
261 | SUN3_PAGE_TYPE_VME16); | ||
262 | irq = vecs[i]; | ||
263 | sun3_scsi_regp = (unsigned char *)ioaddr; | ||
264 | |||
265 | dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8); | ||
266 | |||
267 | if (sun3_map_test((unsigned long)dregs, &x)) { | ||
268 | unsigned short oldcsr; | ||
269 | |||
270 | oldcsr = dregs->csr; | ||
271 | dregs->csr = 0; | ||
272 | udelay(SUN3_DMA_DELAY); | ||
273 | if (dregs->csr == 0x1400) | ||
274 | break; | ||
275 | |||
276 | dregs->csr = oldcsr; | ||
277 | } | ||
278 | |||
279 | iounmap((void *)ioaddr); | ||
280 | ioaddr = 0; | ||
281 | } | ||
282 | |||
283 | if (!ioaddr) | ||
284 | return 0; | ||
285 | #else | ||
286 | irq = IRQ_SUN3_SCSI; | ||
227 | ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE); | 287 | ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE); |
228 | sun3_scsi_regp = (unsigned char *)ioaddr; | 288 | sun3_scsi_regp = (unsigned char *)ioaddr; |
229 | 289 | ||
@@ -234,11 +294,6 @@ int __init sun3scsi_detect(struct scsi_host_template * tpnt) | |||
234 | printk("SUN3 Scsi couldn't allocate DVMA memory!\n"); | 294 | printk("SUN3 Scsi couldn't allocate DVMA memory!\n"); |
235 | return 0; | 295 | return 0; |
236 | } | 296 | } |
237 | #ifdef OLDDMA | ||
238 | if((dmabuf = dvma_malloc_align(SUN3_DVMA_BUFSIZE, 0x10000)) == NULL) { | ||
239 | printk("SUN3 Scsi couldn't allocate DVMA memory!\n"); | ||
240 | return 0; | ||
241 | } | ||
242 | #endif | 297 | #endif |
243 | #ifdef SUPPORT_TAGS | 298 | #ifdef SUPPORT_TAGS |
244 | if (setup_use_tagged_queuing < 0) | 299 | if (setup_use_tagged_queuing < 0) |
@@ -252,7 +307,7 @@ int __init sun3scsi_detect(struct scsi_host_template * tpnt) | |||
252 | default_instance = instance; | 307 | default_instance = instance; |
253 | 308 | ||
254 | instance->io_port = (unsigned long) ioaddr; | 309 | instance->io_port = (unsigned long) ioaddr; |
255 | instance->irq = IRQ_SUN3_SCSI; | 310 | instance->irq = irq; |
256 | 311 | ||
257 | NCR5380_init(instance, 0); | 312 | NCR5380_init(instance, 0); |
258 | 313 | ||
@@ -273,7 +328,8 @@ int __init sun3scsi_detect(struct scsi_host_template * tpnt) | |||
273 | #endif | 328 | #endif |
274 | } | 329 | } |
275 | 330 | ||
276 | printk("scsi%d: Sun3 5380 at port %lX irq", instance->host_no, instance->io_port); | 331 | pr_info("scsi%d: %s at port %lX irq", instance->host_no, |
332 | tpnt->proc_name, instance->io_port); | ||
277 | if (instance->irq == SCSI_IRQ_NONE) | 333 | if (instance->irq == SCSI_IRQ_NONE) |
278 | printk ("s disabled"); | 334 | printk ("s disabled"); |
279 | else | 335 | else |
@@ -290,6 +346,15 @@ int __init sun3scsi_detect(struct scsi_host_template * tpnt) | |||
290 | dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; | 346 | dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; |
291 | udelay(SUN3_DMA_DELAY); | 347 | udelay(SUN3_DMA_DELAY); |
292 | dregs->fifo_count = 0; | 348 | dregs->fifo_count = 0; |
349 | #ifdef SUN3_SCSI_VME | ||
350 | dregs->fifo_count_hi = 0; | ||
351 | dregs->dma_addr_hi = 0; | ||
352 | dregs->dma_addr_lo = 0; | ||
353 | dregs->dma_count_hi = 0; | ||
354 | dregs->dma_count_lo = 0; | ||
355 | |||
356 | dregs->ivect = VME_DATA24 | (instance->irq & 0xff); | ||
357 | #endif | ||
293 | 358 | ||
294 | called = 1; | 359 | called = 1; |
295 | 360 | ||
@@ -357,7 +422,8 @@ static void sun3_scsi_reset_boot(struct Scsi_Host *instance) | |||
357 | } | 422 | } |
358 | #endif | 423 | #endif |
359 | 424 | ||
360 | const char * sun3scsi_info (struct Scsi_Host *spnt) { | 425 | static const char *sun3scsi_info(struct Scsi_Host *spnt) |
426 | { | ||
361 | return ""; | 427 | return ""; |
362 | } | 428 | } |
363 | 429 | ||
@@ -369,6 +435,10 @@ static irqreturn_t scsi_sun3_intr(int irq, void *dummy) | |||
369 | unsigned short csr = dregs->csr; | 435 | unsigned short csr = dregs->csr; |
370 | int handled = 0; | 436 | int handled = 0; |
371 | 437 | ||
438 | #ifdef SUN3_SCSI_VME | ||
439 | dregs->csr &= ~CSR_DMA_ENABLE; | ||
440 | #endif | ||
441 | |||
372 | if(csr & ~CSR_GOOD) { | 442 | if(csr & ~CSR_GOOD) { |
373 | if(csr & CSR_DMA_BUSERR) { | 443 | if(csr & CSR_DMA_BUSERR) { |
374 | printk("scsi%d: bus error in dma\n", default_instance->host_no); | 444 | printk("scsi%d: bus error in dma\n", default_instance->host_no); |
@@ -412,31 +482,28 @@ void sun3_sun3_debug (void) | |||
412 | /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */ | 482 | /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */ |
413 | static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag) | 483 | static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag) |
414 | { | 484 | { |
415 | #ifdef OLDDMA | ||
416 | if(write_flag) | ||
417 | memcpy(dmabuf, data, count); | ||
418 | else { | ||
419 | sun3_dma_orig_addr = data; | ||
420 | sun3_dma_orig_count = count; | ||
421 | } | ||
422 | #else | ||
423 | void *addr; | 485 | void *addr; |
424 | 486 | ||
425 | if(sun3_dma_orig_addr != NULL) | 487 | if(sun3_dma_orig_addr != NULL) |
426 | dvma_unmap(sun3_dma_orig_addr); | 488 | dvma_unmap(sun3_dma_orig_addr); |
427 | 489 | ||
428 | // addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf); | 490 | #ifdef SUN3_SCSI_VME |
491 | addr = (void *)dvma_map_vme((unsigned long) data, count); | ||
492 | #else | ||
429 | addr = (void *)dvma_map((unsigned long) data, count); | 493 | addr = (void *)dvma_map((unsigned long) data, count); |
494 | #endif | ||
430 | 495 | ||
431 | sun3_dma_orig_addr = addr; | 496 | sun3_dma_orig_addr = addr; |
432 | sun3_dma_orig_count = count; | 497 | sun3_dma_orig_count = count; |
433 | #endif | 498 | |
499 | #ifndef SUN3_SCSI_VME | ||
434 | dregs->fifo_count = 0; | 500 | dregs->fifo_count = 0; |
435 | sun3_udc_write(UDC_RESET, UDC_CSR); | 501 | sun3_udc_write(UDC_RESET, UDC_CSR); |
436 | 502 | ||
437 | /* reset fifo */ | 503 | /* reset fifo */ |
438 | dregs->csr &= ~CSR_FIFO; | 504 | dregs->csr &= ~CSR_FIFO; |
439 | dregs->csr |= CSR_FIFO; | 505 | dregs->csr |= CSR_FIFO; |
506 | #endif | ||
440 | 507 | ||
441 | /* set direction */ | 508 | /* set direction */ |
442 | if(write_flag) | 509 | if(write_flag) |
@@ -444,6 +511,17 @@ static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int wri | |||
444 | else | 511 | else |
445 | dregs->csr &= ~CSR_SEND; | 512 | dregs->csr &= ~CSR_SEND; |
446 | 513 | ||
514 | #ifdef SUN3_SCSI_VME | ||
515 | dregs->csr |= CSR_PACK_ENABLE; | ||
516 | |||
517 | dregs->dma_addr_hi = ((unsigned long)addr >> 16); | ||
518 | dregs->dma_addr_lo = ((unsigned long)addr & 0xffff); | ||
519 | |||
520 | dregs->dma_count_hi = 0; | ||
521 | dregs->dma_count_lo = 0; | ||
522 | dregs->fifo_count_hi = 0; | ||
523 | dregs->fifo_count = 0; | ||
524 | #else | ||
447 | /* byte count for fifo */ | 525 | /* byte count for fifo */ |
448 | dregs->fifo_count = count; | 526 | dregs->fifo_count = count; |
449 | 527 | ||
@@ -461,13 +539,8 @@ static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int wri | |||
461 | } | 539 | } |
462 | 540 | ||
463 | /* setup udc */ | 541 | /* setup udc */ |
464 | #ifdef OLDDMA | ||
465 | udc_regs->addr_hi = ((dvma_vtob(dmabuf) & 0xff0000) >> 8); | ||
466 | udc_regs->addr_lo = (dvma_vtob(dmabuf) & 0xffff); | ||
467 | #else | ||
468 | udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8); | 542 | udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8); |
469 | udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff); | 543 | udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff); |
470 | #endif | ||
471 | udc_regs->count = count/2; /* count in words */ | 544 | udc_regs->count = count/2; /* count in words */ |
472 | udc_regs->mode_hi = UDC_MODE_HIWORD; | 545 | udc_regs->mode_hi = UDC_MODE_HIWORD; |
473 | if(write_flag) { | 546 | if(write_flag) { |
@@ -491,11 +564,13 @@ static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int wri | |||
491 | 564 | ||
492 | /* interrupt enable */ | 565 | /* interrupt enable */ |
493 | sun3_udc_write(UDC_INT_ENABLE, UDC_CSR); | 566 | sun3_udc_write(UDC_INT_ENABLE, UDC_CSR); |
567 | #endif | ||
494 | 568 | ||
495 | return count; | 569 | return count; |
496 | 570 | ||
497 | } | 571 | } |
498 | 572 | ||
573 | #ifndef SUN3_SCSI_VME | ||
499 | static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance) | 574 | static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance) |
500 | { | 575 | { |
501 | unsigned short resid; | 576 | unsigned short resid; |
@@ -508,6 +583,7 @@ static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance) | |||
508 | 583 | ||
509 | return (unsigned long) resid; | 584 | return (unsigned long) resid; |
510 | } | 585 | } |
586 | #endif | ||
511 | 587 | ||
512 | static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance) | 588 | static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance) |
513 | { | 589 | { |
@@ -526,8 +602,23 @@ static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted, | |||
526 | 602 | ||
527 | static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data) | 603 | static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data) |
528 | { | 604 | { |
605 | #ifdef SUN3_SCSI_VME | ||
606 | unsigned short csr; | ||
607 | |||
608 | csr = dregs->csr; | ||
609 | |||
610 | dregs->dma_count_hi = (sun3_dma_orig_count >> 16); | ||
611 | dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff); | ||
529 | 612 | ||
613 | dregs->fifo_count_hi = (sun3_dma_orig_count >> 16); | ||
614 | dregs->fifo_count = (sun3_dma_orig_count & 0xffff); | ||
615 | |||
616 | /* if(!(csr & CSR_DMA_ENABLE)) | ||
617 | * dregs->csr |= CSR_DMA_ENABLE; | ||
618 | */ | ||
619 | #else | ||
530 | sun3_udc_write(UDC_CHN_START, UDC_CSR); | 620 | sun3_udc_write(UDC_CHN_START, UDC_CSR); |
621 | #endif | ||
531 | 622 | ||
532 | return 0; | 623 | return 0; |
533 | } | 624 | } |
@@ -535,12 +626,46 @@ static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data) | |||
535 | /* clean up after our dma is done */ | 626 | /* clean up after our dma is done */ |
536 | static int sun3scsi_dma_finish(int write_flag) | 627 | static int sun3scsi_dma_finish(int write_flag) |
537 | { | 628 | { |
538 | unsigned short count; | 629 | unsigned short __maybe_unused count; |
539 | unsigned short fifo; | 630 | unsigned short fifo; |
540 | int ret = 0; | 631 | int ret = 0; |
541 | 632 | ||
542 | sun3_dma_active = 0; | 633 | sun3_dma_active = 0; |
543 | #if 1 | 634 | |
635 | #ifdef SUN3_SCSI_VME | ||
636 | dregs->csr &= ~CSR_DMA_ENABLE; | ||
637 | |||
638 | fifo = dregs->fifo_count; | ||
639 | if (write_flag) { | ||
640 | if ((fifo > 0) && (fifo < sun3_dma_orig_count)) | ||
641 | fifo++; | ||
642 | } | ||
643 | |||
644 | last_residual = fifo; | ||
645 | /* empty bytes from the fifo which didn't make it */ | ||
646 | if ((!write_flag) && (dregs->csr & CSR_LEFT)) { | ||
647 | unsigned char *vaddr; | ||
648 | |||
649 | vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr); | ||
650 | |||
651 | vaddr += (sun3_dma_orig_count - fifo); | ||
652 | vaddr--; | ||
653 | |||
654 | switch (dregs->csr & CSR_LEFT) { | ||
655 | case CSR_LEFT_3: | ||
656 | *vaddr = (dregs->bpack_lo & 0xff00) >> 8; | ||
657 | vaddr--; | ||
658 | |||
659 | case CSR_LEFT_2: | ||
660 | *vaddr = (dregs->bpack_hi & 0x00ff); | ||
661 | vaddr--; | ||
662 | |||
663 | case CSR_LEFT_1: | ||
664 | *vaddr = (dregs->bpack_hi & 0xff00) >> 8; | ||
665 | break; | ||
666 | } | ||
667 | } | ||
668 | #else | ||
544 | // check to empty the fifo on a read | 669 | // check to empty the fifo on a read |
545 | if(!write_flag) { | 670 | if(!write_flag) { |
546 | int tmo = 20000; /* .2 sec */ | 671 | int tmo = 20000; /* .2 sec */ |
@@ -556,28 +681,8 @@ static int sun3scsi_dma_finish(int write_flag) | |||
556 | udelay(10); | 681 | udelay(10); |
557 | } | 682 | } |
558 | } | 683 | } |
559 | |||
560 | #endif | ||
561 | 684 | ||
562 | count = sun3scsi_dma_count(default_instance); | 685 | count = sun3scsi_dma_count(default_instance); |
563 | #ifdef OLDDMA | ||
564 | |||
565 | /* if we've finished a read, copy out the data we read */ | ||
566 | if(sun3_dma_orig_addr) { | ||
567 | /* check for residual bytes after dma end */ | ||
568 | if(count && (NCR5380_read(BUS_AND_STATUS_REG) & | ||
569 | (BASR_PHASE_MATCH | BASR_ACK))) { | ||
570 | printk("scsi%d: sun3_scsi_finish: read overrun baby... ", default_instance->host_no); | ||
571 | printk("basr now %02x\n", NCR5380_read(BUS_AND_STATUS_REG)); | ||
572 | ret = count; | ||
573 | } | ||
574 | |||
575 | /* copy in what we dma'd no matter what */ | ||
576 | memcpy(sun3_dma_orig_addr, dmabuf, sun3_dma_orig_count); | ||
577 | sun3_dma_orig_addr = NULL; | ||
578 | |||
579 | } | ||
580 | #else | ||
581 | 686 | ||
582 | fifo = dregs->fifo_count; | 687 | fifo = dregs->fifo_count; |
583 | last_residual = fifo; | 688 | last_residual = fifo; |
@@ -595,10 +700,23 @@ static int sun3scsi_dma_finish(int write_flag) | |||
595 | vaddr[-2] = (data & 0xff00) >> 8; | 700 | vaddr[-2] = (data & 0xff00) >> 8; |
596 | vaddr[-1] = (data & 0xff); | 701 | vaddr[-1] = (data & 0xff); |
597 | } | 702 | } |
703 | #endif | ||
598 | 704 | ||
599 | dvma_unmap(sun3_dma_orig_addr); | 705 | dvma_unmap(sun3_dma_orig_addr); |
600 | sun3_dma_orig_addr = NULL; | 706 | sun3_dma_orig_addr = NULL; |
601 | #endif | 707 | |
708 | #ifdef SUN3_SCSI_VME | ||
709 | dregs->dma_addr_hi = 0; | ||
710 | dregs->dma_addr_lo = 0; | ||
711 | dregs->dma_count_hi = 0; | ||
712 | dregs->dma_count_lo = 0; | ||
713 | |||
714 | dregs->fifo_count = 0; | ||
715 | dregs->fifo_count_hi = 0; | ||
716 | |||
717 | dregs->csr &= ~CSR_SEND; | ||
718 | /* dregs->csr |= CSR_DMA_ENABLE; */ | ||
719 | #else | ||
602 | sun3_udc_write(UDC_RESET, UDC_CSR); | 720 | sun3_udc_write(UDC_RESET, UDC_CSR); |
603 | dregs->fifo_count = 0; | 721 | dregs->fifo_count = 0; |
604 | dregs->csr &= ~CSR_SEND; | 722 | dregs->csr &= ~CSR_SEND; |
@@ -606,6 +724,7 @@ static int sun3scsi_dma_finish(int write_flag) | |||
606 | /* reset fifo */ | 724 | /* reset fifo */ |
607 | dregs->csr &= ~CSR_FIFO; | 725 | dregs->csr &= ~CSR_FIFO; |
608 | dregs->csr |= CSR_FIFO; | 726 | dregs->csr |= CSR_FIFO; |
727 | #endif | ||
609 | 728 | ||
610 | sun3_dma_setup_done = NULL; | 729 | sun3_dma_setup_done = NULL; |
611 | 730 | ||