diff options
author | Tejun Heo <htejun@gmail.com> | 2006-04-11 09:22:30 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-04-11 13:19:11 -0400 |
commit | 7dd29dd629bd5a4e6d8a164a9886da01f291ecf2 (patch) | |
tree | cf0dc7ae2468378dd5795346dac23badc7344667 /drivers/scsi/sata_sil24.c | |
parent | 75fe18069a55c78f553643b4e3a24c6864d71d87 (diff) |
[PATCH] sata_sil24: use ata_wait_register()
Replace hard-coded waiting loops in sata_sil24 to ata_wait_register().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/scsi/sata_sil24.c')
-rw-r--r-- | drivers/scsi/sata_sil24.c | 30 |
1 files changed, 10 insertions, 20 deletions
diff --git a/drivers/scsi/sata_sil24.c b/drivers/scsi/sata_sil24.c index d6cfd8eb29b9..286c46e1f21c 100644 --- a/drivers/scsi/sata_sil24.c +++ b/drivers/scsi/sata_sil24.c | |||
@@ -432,8 +432,7 @@ static int sil24_softreset(struct ata_port *ap, unsigned int *class) | |||
432 | struct sil24_port_priv *pp = ap->private_data; | 432 | struct sil24_port_priv *pp = ap->private_data; |
433 | struct sil24_prb *prb = &pp->cmd_block[0].ata.prb; | 433 | struct sil24_prb *prb = &pp->cmd_block[0].ata.prb; |
434 | dma_addr_t paddr = pp->cmd_block_dma; | 434 | dma_addr_t paddr = pp->cmd_block_dma; |
435 | unsigned long timeout = jiffies + ATA_TMOUT_BOOT; | 435 | u32 mask, irq_enable, irq_stat; |
436 | u32 irq_enable, irq_stat; | ||
437 | const char *reason; | 436 | const char *reason; |
438 | 437 | ||
439 | DPRINTK("ENTER\n"); | 438 | DPRINTK("ENTER\n"); |
@@ -459,16 +458,12 @@ static int sil24_softreset(struct ata_port *ap, unsigned int *class) | |||
459 | 458 | ||
460 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); | 459 | writel((u32)paddr, port + PORT_CMD_ACTIVATE); |
461 | 460 | ||
462 | do { | 461 | mask = (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR) << PORT_IRQ_RAW_SHIFT; |
463 | irq_stat = readl(port + PORT_IRQ_STAT); | 462 | irq_stat = ata_wait_register(port + PORT_IRQ_STAT, mask, 0x0, |
464 | writel(irq_stat, port + PORT_IRQ_STAT); /* clear irq */ | 463 | 100, ATA_TMOUT_BOOT / HZ * 1000); |
465 | 464 | ||
466 | irq_stat >>= PORT_IRQ_RAW_SHIFT; | 465 | writel(irq_stat, port + PORT_IRQ_STAT); /* clear IRQs */ |
467 | if (irq_stat & (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR)) | 466 | irq_stat >>= PORT_IRQ_RAW_SHIFT; |
468 | break; | ||
469 | |||
470 | msleep(100); | ||
471 | } while (time_before(jiffies, timeout)); | ||
472 | 467 | ||
473 | /* restore IRQs */ | 468 | /* restore IRQs */ |
474 | writel(irq_enable, port + PORT_IRQ_ENABLE_SET); | 469 | writel(irq_enable, port + PORT_IRQ_ENABLE_SET); |
@@ -937,14 +932,13 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
937 | /* GPIO off */ | 932 | /* GPIO off */ |
938 | writel(0, host_base + HOST_FLASH_CMD); | 933 | writel(0, host_base + HOST_FLASH_CMD); |
939 | 934 | ||
940 | /* Mask interrupts during initialization */ | 935 | /* clear global reset & mask interrupts during initialization */ |
941 | writel(0, host_base + HOST_CTRL); | 936 | writel(0, host_base + HOST_CTRL); |
942 | 937 | ||
943 | for (i = 0; i < probe_ent->n_ports; i++) { | 938 | for (i = 0; i < probe_ent->n_ports; i++) { |
944 | void __iomem *port = port_base + i * PORT_REGS_SIZE; | 939 | void __iomem *port = port_base + i * PORT_REGS_SIZE; |
945 | unsigned long portu = (unsigned long)port; | 940 | unsigned long portu = (unsigned long)port; |
946 | u32 tmp; | 941 | u32 tmp; |
947 | int cnt; | ||
948 | 942 | ||
949 | probe_ent->port[i].cmd_addr = portu + PORT_PRB; | 943 | probe_ent->port[i].cmd_addr = portu + PORT_PRB; |
950 | probe_ent->port[i].scr_addr = portu + PORT_SCONTROL; | 944 | probe_ent->port[i].scr_addr = portu + PORT_SCONTROL; |
@@ -958,13 +952,9 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
958 | tmp = readl(port + PORT_CTRL_STAT); | 952 | tmp = readl(port + PORT_CTRL_STAT); |
959 | if (tmp & PORT_CS_PORT_RST) { | 953 | if (tmp & PORT_CS_PORT_RST) { |
960 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); | 954 | writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR); |
961 | readl(port + PORT_CTRL_STAT); /* sync */ | 955 | tmp = ata_wait_register(port + PORT_CTRL_STAT, |
962 | for (cnt = 0; cnt < 10; cnt++) { | 956 | PORT_CS_PORT_RST, |
963 | msleep(10); | 957 | PORT_CS_PORT_RST, 10, 100); |
964 | tmp = readl(port + PORT_CTRL_STAT); | ||
965 | if (!(tmp & PORT_CS_PORT_RST)) | ||
966 | break; | ||
967 | } | ||
968 | if (tmp & PORT_CS_PORT_RST) | 958 | if (tmp & PORT_CS_PORT_RST) |
969 | dev_printk(KERN_ERR, &pdev->dev, | 959 | dev_printk(KERN_ERR, &pdev->dev, |
970 | "failed to clear port RST\n"); | 960 | "failed to clear port RST\n"); |