diff options
author | Tejun Heo <htejun@gmail.com> | 2006-05-31 05:27:53 -0400 |
---|---|---|
committer | Tejun Heo <htejun@gmail.com> | 2006-05-31 05:27:53 -0400 |
commit | 20888d83687d5cb374cdb5b0afa746ab79666f4e (patch) | |
tree | 7101992452740b728cf54481c8555d5acf49b76a /drivers/scsi/sata_sil.c | |
parent | 9a1004d0c11be41c83d06a67dfe74567a41ae582 (diff) |
[PATCH] sata_sil: add new constants in preparation for new interrupt handler
sata_sil is about to get a brand new interrupt handler. Add relevant
constants.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Diffstat (limited to 'drivers/scsi/sata_sil.c')
-rw-r--r-- | drivers/scsi/sata_sil.c | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c index 3bd807738698..f926883fd16c 100644 --- a/drivers/scsi/sata_sil.c +++ b/drivers/scsi/sata_sil.c | |||
@@ -54,6 +54,7 @@ enum { | |||
54 | */ | 54 | */ |
55 | SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29), | 55 | SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29), |
56 | SIL_FLAG_MOD15WRITE = (1 << 30), | 56 | SIL_FLAG_MOD15WRITE = (1 << 30), |
57 | |||
57 | SIL_DFL_HOST_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | 58 | SIL_DFL_HOST_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
58 | ATA_FLAG_MMIO, | 59 | ATA_FLAG_MMIO, |
59 | 60 | ||
@@ -84,6 +85,20 @@ enum { | |||
84 | /* BMDMA/BMDMA2 */ | 85 | /* BMDMA/BMDMA2 */ |
85 | SIL_INTR_STEERING = (1 << 1), | 86 | SIL_INTR_STEERING = (1 << 1), |
86 | 87 | ||
88 | SIL_DMA_ENABLE = (1 << 0), /* DMA run switch */ | ||
89 | SIL_DMA_RDWR = (1 << 3), /* DMA Rd-Wr */ | ||
90 | SIL_DMA_SATA_IRQ = (1 << 4), /* OR of all SATA IRQs */ | ||
91 | SIL_DMA_ACTIVE = (1 << 16), /* DMA running */ | ||
92 | SIL_DMA_ERROR = (1 << 17), /* PCI bus error */ | ||
93 | SIL_DMA_COMPLETE = (1 << 18), /* cmd complete / IRQ pending */ | ||
94 | SIL_DMA_N_SATA_IRQ = (1 << 6), /* SATA_IRQ for the next channel */ | ||
95 | SIL_DMA_N_ACTIVE = (1 << 24), /* ACTIVE for the next channel */ | ||
96 | SIL_DMA_N_ERROR = (1 << 25), /* ERROR for the next channel */ | ||
97 | SIL_DMA_N_COMPLETE = (1 << 26), /* COMPLETE for the next channel */ | ||
98 | |||
99 | /* SIEN */ | ||
100 | SIL_SIEN_N = (1 << 16), /* triggered by SError.N */ | ||
101 | |||
87 | /* | 102 | /* |
88 | * Others | 103 | * Others |
89 | */ | 104 | */ |
@@ -226,6 +241,7 @@ static const struct { | |||
226 | unsigned long tf; /* ATA taskfile register block */ | 241 | unsigned long tf; /* ATA taskfile register block */ |
227 | unsigned long ctl; /* ATA control/altstatus register block */ | 242 | unsigned long ctl; /* ATA control/altstatus register block */ |
228 | unsigned long bmdma; /* DMA register block */ | 243 | unsigned long bmdma; /* DMA register block */ |
244 | unsigned long bmdma2; /* DMA register block #2 */ | ||
229 | unsigned long fifo_cfg; /* FIFO Valid Byte Count and Control */ | 245 | unsigned long fifo_cfg; /* FIFO Valid Byte Count and Control */ |
230 | unsigned long scr; /* SATA control register block */ | 246 | unsigned long scr; /* SATA control register block */ |
231 | unsigned long sien; /* SATA Interrupt Enable register */ | 247 | unsigned long sien; /* SATA Interrupt Enable register */ |
@@ -233,10 +249,10 @@ static const struct { | |||
233 | unsigned long sfis_cfg; /* SATA FIS reception config register */ | 249 | unsigned long sfis_cfg; /* SATA FIS reception config register */ |
234 | } sil_port[] = { | 250 | } sil_port[] = { |
235 | /* port 0 ... */ | 251 | /* port 0 ... */ |
236 | { 0x80, 0x8A, 0x00, 0x40, 0x100, 0x148, 0xb4, 0x14c }, | 252 | { 0x80, 0x8A, 0x00, 0x10, 0x40, 0x100, 0x148, 0xb4, 0x14c }, |
237 | { 0xC0, 0xCA, 0x08, 0x44, 0x180, 0x1c8, 0xf4, 0x1cc }, | 253 | { 0xC0, 0xCA, 0x08, 0x18, 0x44, 0x180, 0x1c8, 0xf4, 0x1cc }, |
238 | { 0x280, 0x28A, 0x200, 0x240, 0x300, 0x348, 0x2b4, 0x34c }, | 254 | { 0x280, 0x28A, 0x200, 0x210, 0x240, 0x300, 0x348, 0x2b4, 0x34c }, |
239 | { 0x2C0, 0x2CA, 0x208, 0x244, 0x380, 0x3c8, 0x2f4, 0x3cc }, | 255 | { 0x2C0, 0x2CA, 0x208, 0x218, 0x244, 0x380, 0x3c8, 0x2f4, 0x3cc }, |
240 | /* ... port 3 */ | 256 | /* ... port 3 */ |
241 | }; | 257 | }; |
242 | 258 | ||