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authorTejun Heo <htejun@gmail.com>2006-03-05 02:03:52 -0500
committerJeff Garzik <jeff@garzik.org>2006-03-05 02:39:55 -0500
commit81c2af3561db54a4d3b439c84c58d8c2a469ec9b (patch)
tree23c5512dc5cc3d85fa2ce91a397587848caa36da /drivers/scsi/sata_sil.c
parent219e621443a1d0bba2a6d15cbc9a1181892c6d79 (diff)
[PATCH] sata_sil: replace sil_3112_m15w board id with sil_3112
All 3112's have m15w. Replace sil_3112_m15w with sil_3112 and flag sil_3112 with SIL_FLAG_MOD15WRITE. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Carlos Pardo <Carlos.Pardo@siliconimage.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/scsi/sata_sil.c')
-rw-r--r--drivers/scsi/sata_sil.c25
1 files changed, 7 insertions, 18 deletions
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index cdf800e3ec13..8cb662d537a3 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -53,9 +53,8 @@ enum {
53 SIL_FLAG_MOD15WRITE = (1 << 30), 53 SIL_FLAG_MOD15WRITE = (1 << 30),
54 54
55 sil_3112 = 0, 55 sil_3112 = 0,
56 sil_3112_m15w = 1, 56 sil_3512 = 1,
57 sil_3512 = 2, 57 sil_3114 = 2,
58 sil_3114 = 3,
59 58
60 SIL_FIFO_R0 = 0x40, 59 SIL_FIFO_R0 = 0x40,
61 SIL_FIFO_W0 = 0x41, 60 SIL_FIFO_W0 = 0x41,
@@ -90,13 +89,13 @@ static void sil_post_set_mode (struct ata_port *ap);
90 89
91 90
92static const struct pci_device_id sil_pci_tbl[] = { 91static const struct pci_device_id sil_pci_tbl[] = {
93 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 92 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
94 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 93 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
95 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3512 }, 94 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3512 },
96 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, 95 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 },
97 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 96 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
98 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 97 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
99 { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 98 { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
100 { } /* terminate list */ 99 { } /* terminate list */
101}; 100};
102 101
@@ -182,16 +181,6 @@ static const struct ata_port_info sil_port_info[] = {
182 { 181 {
183 .sht = &sil_sht, 182 .sht = &sil_sht,
184 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 183 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
185 ATA_FLAG_MMIO,
186 .pio_mask = 0x1f, /* pio0-4 */
187 .mwdma_mask = 0x07, /* mwdma0-2 */
188 .udma_mask = 0x3f, /* udma0-5 */
189 .port_ops = &sil_ops,
190 },
191 /* sil_3112_15w - keep it sync'd w/ sil_3112 */
192 {
193 .sht = &sil_sht,
194 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
195 ATA_FLAG_MMIO | SIL_FLAG_MOD15WRITE, 184 ATA_FLAG_MMIO | SIL_FLAG_MOD15WRITE,
196 .pio_mask = 0x1f, /* pio0-4 */ 185 .pio_mask = 0x1f, /* pio0-4 */
197 .mwdma_mask = 0x07, /* mwdma0-2 */ 186 .mwdma_mask = 0x07, /* mwdma0-2 */