diff options
author | Vikas Chaudhary <vikas.chaudhary@qlogic.com> | 2011-05-18 02:17:04 -0400 |
---|---|---|
committer | James Bottomley <jbottomley@parallels.com> | 2011-05-24 12:38:57 -0400 |
commit | cb74428ee3811d7749d07e00161336ba9f98b394 (patch) | |
tree | 757b03f5ca47a7e36b6d6361eaf521b413c53452 /drivers/scsi/qla4xxx | |
parent | 185f107ef9913d9263bc9c2014d16a5a65c4894e (diff) |
[SCSI] qla4xxx: Updated the reset sequence for ISP82xx
Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
Reviewed-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <jbottomley@parallels.com>
Diffstat (limited to 'drivers/scsi/qla4xxx')
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_nx.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_nx.c b/drivers/scsi/qla4xxx/ql4_nx.c index 35381cb0936e..e1085edd1779 100644 --- a/drivers/scsi/qla4xxx/ql4_nx.c +++ b/drivers/scsi/qla4xxx/ql4_nx.c | |||
@@ -943,12 +943,26 @@ qla4_8xxx_pinit_from_rom(struct scsi_qla_host *ha, int verbose) | |||
943 | /* Halt all the indiviual PEGs and other blocks of the ISP */ | 943 | /* Halt all the indiviual PEGs and other blocks of the ISP */ |
944 | qla4_8xxx_rom_lock(ha); | 944 | qla4_8xxx_rom_lock(ha); |
945 | 945 | ||
946 | /* mask all niu interrupts */ | 946 | /* disable all I2Q */ |
947 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); | ||
948 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); | ||
949 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); | ||
950 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); | ||
951 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); | ||
952 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); | ||
953 | |||
954 | /* disable all niu interrupts */ | ||
947 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); | 955 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); |
948 | /* disable xge rx/tx */ | 956 | /* disable xge rx/tx */ |
949 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); | 957 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); |
950 | /* disable xg1 rx/tx */ | 958 | /* disable xg1 rx/tx */ |
951 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); | 959 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); |
960 | /* disable sideband mac */ | ||
961 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); | ||
962 | /* disable ap0 mac */ | ||
963 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); | ||
964 | /* disable ap1 mac */ | ||
965 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); | ||
952 | 966 | ||
953 | /* halt sre */ | 967 | /* halt sre */ |
954 | val = qla4_8xxx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); | 968 | val = qla4_8xxx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); |
@@ -963,6 +977,7 @@ qla4_8xxx_pinit_from_rom(struct scsi_qla_host *ha, int verbose) | |||
963 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); | 977 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); |
964 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); | 978 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); |
965 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); | 979 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); |
980 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); | ||
966 | 981 | ||
967 | /* halt pegs */ | 982 | /* halt pegs */ |
968 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); | 983 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); |
@@ -970,9 +985,9 @@ qla4_8xxx_pinit_from_rom(struct scsi_qla_host *ha, int verbose) | |||
970 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); | 985 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); |
971 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); | 986 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); |
972 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); | 987 | qla4_8xxx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); |
988 | msleep(5); | ||
973 | 989 | ||
974 | /* big hammer */ | 990 | /* big hammer */ |
975 | msleep(1000); | ||
976 | if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) | 991 | if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) |
977 | /* don't reset CAM block on reset */ | 992 | /* don't reset CAM block on reset */ |
978 | qla4_8xxx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); | 993 | qla4_8xxx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); |