diff options
author | David Somayajulu <david.somayajulu@qlogic.com> | 2006-09-19 13:28:00 -0400 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-10-04 14:34:04 -0400 |
commit | afaf5a2d341d33b66b47c2716a263ce593460a08 (patch) | |
tree | 70aeac2f11cc644114eead55fa003be8288666f0 /drivers/scsi/qla4xxx/ql4_nvram.h | |
parent | ed542bed126caeefc6546b276e4af852d4d34f33 (diff) |
[SCSI] Initial Commit of qla4xxx
open-iSCSI driver for Qlogic Corporation's iSCSI HBAs
Signed-off-by: Ravi Anand <ravi.anand@qlogic.com>
Signed-off-by: David Somayajulu <david.somayajulu@qlogic.com>
Signed-off-by: Doug Maxey <dwm@bubba.enoyolf.org>
Signed-off-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/qla4xxx/ql4_nvram.h')
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_nvram.h | 256 |
1 files changed, 256 insertions, 0 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_nvram.h b/drivers/scsi/qla4xxx/ql4_nvram.h new file mode 100644 index 000000000000..08e2aed8c6cc --- /dev/null +++ b/drivers/scsi/qla4xxx/ql4_nvram.h | |||
@@ -0,0 +1,256 @@ | |||
1 | /* | ||
2 | * QLogic iSCSI HBA Driver | ||
3 | * Copyright (c) 2003-2006 QLogic Corporation | ||
4 | * | ||
5 | * See LICENSE.qla4xxx for copyright and licensing details. | ||
6 | */ | ||
7 | |||
8 | #ifndef _QL4XNVRM_H_ | ||
9 | #define _QL4XNVRM_H_ | ||
10 | |||
11 | /* | ||
12 | * AM29LV Flash definitions | ||
13 | */ | ||
14 | #define FM93C56A_SIZE_8 0x100 | ||
15 | #define FM93C56A_SIZE_16 0x80 | ||
16 | #define FM93C66A_SIZE_8 0x200 | ||
17 | #define FM93C66A_SIZE_16 0x100/* 4010 */ | ||
18 | #define FM93C86A_SIZE_16 0x400/* 4022 */ | ||
19 | |||
20 | #define FM93C56A_START 0x1 | ||
21 | |||
22 | // Commands | ||
23 | #define FM93C56A_READ 0x2 | ||
24 | #define FM93C56A_WEN 0x0 | ||
25 | #define FM93C56A_WRITE 0x1 | ||
26 | #define FM93C56A_WRITE_ALL 0x0 | ||
27 | #define FM93C56A_WDS 0x0 | ||
28 | #define FM93C56A_ERASE 0x3 | ||
29 | #define FM93C56A_ERASE_ALL 0x0 | ||
30 | |||
31 | /* Command Extentions */ | ||
32 | #define FM93C56A_WEN_EXT 0x3 | ||
33 | #define FM93C56A_WRITE_ALL_EXT 0x1 | ||
34 | #define FM93C56A_WDS_EXT 0x0 | ||
35 | #define FM93C56A_ERASE_ALL_EXT 0x2 | ||
36 | |||
37 | /* Address Bits */ | ||
38 | #define FM93C56A_NO_ADDR_BITS_16 8 /* 4010 */ | ||
39 | #define FM93C56A_NO_ADDR_BITS_8 9 /* 4010 */ | ||
40 | #define FM93C86A_NO_ADDR_BITS_16 10 /* 4022 */ | ||
41 | |||
42 | /* Data Bits */ | ||
43 | #define FM93C56A_DATA_BITS_16 16 | ||
44 | #define FM93C56A_DATA_BITS_8 8 | ||
45 | |||
46 | /* Special Bits */ | ||
47 | #define FM93C56A_READ_DUMMY_BITS 1 | ||
48 | #define FM93C56A_READY 0 | ||
49 | #define FM93C56A_BUSY 1 | ||
50 | #define FM93C56A_CMD_BITS 2 | ||
51 | |||
52 | /* Auburn Bits */ | ||
53 | #define AUBURN_EEPROM_DI 0x8 | ||
54 | #define AUBURN_EEPROM_DI_0 0x0 | ||
55 | #define AUBURN_EEPROM_DI_1 0x8 | ||
56 | #define AUBURN_EEPROM_DO 0x4 | ||
57 | #define AUBURN_EEPROM_DO_0 0x0 | ||
58 | #define AUBURN_EEPROM_DO_1 0x4 | ||
59 | #define AUBURN_EEPROM_CS 0x2 | ||
60 | #define AUBURN_EEPROM_CS_0 0x0 | ||
61 | #define AUBURN_EEPROM_CS_1 0x2 | ||
62 | #define AUBURN_EEPROM_CLK_RISE 0x1 | ||
63 | #define AUBURN_EEPROM_CLK_FALL 0x0 | ||
64 | |||
65 | /* */ | ||
66 | /* EEPROM format */ | ||
67 | /* */ | ||
68 | struct bios_params { | ||
69 | uint16_t SpinUpDelay:1; | ||
70 | uint16_t BIOSDisable:1; | ||
71 | uint16_t MMAPEnable:1; | ||
72 | uint16_t BootEnable:1; | ||
73 | uint16_t Reserved0:12; | ||
74 | uint8_t bootID0:7; | ||
75 | uint8_t bootID0Valid:1; | ||
76 | uint8_t bootLUN0[8]; | ||
77 | uint8_t bootID1:7; | ||
78 | uint8_t bootID1Valid:1; | ||
79 | uint8_t bootLUN1[8]; | ||
80 | uint16_t MaxLunsPerTarget; | ||
81 | uint8_t Reserved1[10]; | ||
82 | }; | ||
83 | |||
84 | struct eeprom_port_cfg { | ||
85 | |||
86 | /* MTU MAC 0 */ | ||
87 | u16 etherMtu_mac; | ||
88 | |||
89 | /* Flow Control MAC 0 */ | ||
90 | u16 pauseThreshold_mac; | ||
91 | u16 resumeThreshold_mac; | ||
92 | u16 reserved[13]; | ||
93 | }; | ||
94 | |||
95 | struct eeprom_function_cfg { | ||
96 | u8 reserved[30]; | ||
97 | |||
98 | /* MAC ADDR */ | ||
99 | u8 macAddress[6]; | ||
100 | u8 macAddressSecondary[6]; | ||
101 | u16 subsysVendorId; | ||
102 | u16 subsysDeviceId; | ||
103 | }; | ||
104 | |||
105 | struct eeprom_data { | ||
106 | union { | ||
107 | struct { /* isp4010 */ | ||
108 | u8 asic_id[4]; /* x00 */ | ||
109 | u8 version; /* x04 */ | ||
110 | u8 reserved; /* x05 */ | ||
111 | u16 board_id; /* x06 */ | ||
112 | #define EEPROM_BOARDID_ELDORADO 1 | ||
113 | #define EEPROM_BOARDID_PLACER 2 | ||
114 | |||
115 | #define EEPROM_SERIAL_NUM_SIZE 16 | ||
116 | u8 serial_number[EEPROM_SERIAL_NUM_SIZE]; /* x08 */ | ||
117 | |||
118 | /* ExtHwConfig: */ | ||
119 | /* Offset = 24bytes | ||
120 | * | ||
121 | * | SSRAM Size| |ST|PD|SDRAM SZ| W| B| SP | | | ||
122 | * |15|14|13|12|11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1| 0| | ||
123 | * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ | ||
124 | */ | ||
125 | u16 ext_hw_conf; /* x18 */ | ||
126 | u8 mac0[6]; /* x1A */ | ||
127 | u8 mac1[6]; /* x20 */ | ||
128 | u8 mac2[6]; /* x26 */ | ||
129 | u8 mac3[6]; /* x2C */ | ||
130 | u16 etherMtu; /* x32 */ | ||
131 | u16 macConfig; /* x34 */ | ||
132 | #define MAC_CONFIG_ENABLE_ANEG 0x0001 | ||
133 | #define MAC_CONFIG_ENABLE_PAUSE 0x0002 | ||
134 | u16 phyConfig; /* x36 */ | ||
135 | #define PHY_CONFIG_PHY_ADDR_MASK 0x1f | ||
136 | #define PHY_CONFIG_ENABLE_FW_MANAGEMENT_MASK 0x20 | ||
137 | u16 topcat; /* x38 */ | ||
138 | #define TOPCAT_PRESENT 0x0100 | ||
139 | #define TOPCAT_MASK 0xFF00 | ||
140 | |||
141 | #define EEPROM_UNUSED_1_SIZE 2 | ||
142 | u8 unused_1[EEPROM_UNUSED_1_SIZE]; /* x3A */ | ||
143 | u16 bufletSize; /* x3C */ | ||
144 | u16 bufletCount; /* x3E */ | ||
145 | u16 bufletPauseThreshold; /* x40 */ | ||
146 | u16 tcpWindowThreshold50; /* x42 */ | ||
147 | u16 tcpWindowThreshold25; /* x44 */ | ||
148 | u16 tcpWindowThreshold0; /* x46 */ | ||
149 | u16 ipHashTableBaseHi; /* x48 */ | ||
150 | u16 ipHashTableBaseLo; /* x4A */ | ||
151 | u16 ipHashTableSize; /* x4C */ | ||
152 | u16 tcpHashTableBaseHi; /* x4E */ | ||
153 | u16 tcpHashTableBaseLo; /* x50 */ | ||
154 | u16 tcpHashTableSize; /* x52 */ | ||
155 | u16 ncbTableBaseHi; /* x54 */ | ||
156 | u16 ncbTableBaseLo; /* x56 */ | ||
157 | u16 ncbTableSize; /* x58 */ | ||
158 | u16 drbTableBaseHi; /* x5A */ | ||
159 | u16 drbTableBaseLo; /* x5C */ | ||
160 | u16 drbTableSize; /* x5E */ | ||
161 | |||
162 | #define EEPROM_UNUSED_2_SIZE 4 | ||
163 | u8 unused_2[EEPROM_UNUSED_2_SIZE]; /* x60 */ | ||
164 | u16 ipReassemblyTimeout; /* x64 */ | ||
165 | u16 tcpMaxWindowSizeHi; /* x66 */ | ||
166 | u16 tcpMaxWindowSizeLo; /* x68 */ | ||
167 | u32 net_ip_addr0; /* x6A Added for TOE | ||
168 | * functionality. */ | ||
169 | u32 net_ip_addr1; /* x6E */ | ||
170 | u32 scsi_ip_addr0; /* x72 */ | ||
171 | u32 scsi_ip_addr1; /* x76 */ | ||
172 | #define EEPROM_UNUSED_3_SIZE 128 /* changed from 144 to account | ||
173 | * for ip addresses */ | ||
174 | u8 unused_3[EEPROM_UNUSED_3_SIZE]; /* x7A */ | ||
175 | u16 subsysVendorId_f0; /* xFA */ | ||
176 | u16 subsysDeviceId_f0; /* xFC */ | ||
177 | |||
178 | /* Address = 0x7F */ | ||
179 | #define FM93C56A_SIGNATURE 0x9356 | ||
180 | #define FM93C66A_SIGNATURE 0x9366 | ||
181 | u16 signature; /* xFE */ | ||
182 | |||
183 | #define EEPROM_UNUSED_4_SIZE 250 | ||
184 | u8 unused_4[EEPROM_UNUSED_4_SIZE]; /* x100 */ | ||
185 | u16 subsysVendorId_f1; /* x1FA */ | ||
186 | u16 subsysDeviceId_f1; /* x1FC */ | ||
187 | u16 checksum; /* x1FE */ | ||
188 | } __attribute__ ((packed)) isp4010; | ||
189 | struct { /* isp4022 */ | ||
190 | u8 asicId[4]; /* x00 */ | ||
191 | u8 version; /* x04 */ | ||
192 | u8 reserved_5; /* x05 */ | ||
193 | u16 boardId; /* x06 */ | ||
194 | u8 boardIdStr[16]; /* x08 */ | ||
195 | u8 serialNumber[16]; /* x18 */ | ||
196 | |||
197 | /* External Hardware Configuration */ | ||
198 | u16 ext_hw_conf; /* x28 */ | ||
199 | |||
200 | /* MAC 0 CONFIGURATION */ | ||
201 | struct eeprom_port_cfg macCfg_port0; /* x2A */ | ||
202 | |||
203 | /* MAC 1 CONFIGURATION */ | ||
204 | struct eeprom_port_cfg macCfg_port1; /* x4A */ | ||
205 | |||
206 | /* DDR SDRAM Configuration */ | ||
207 | u16 bufletSize; /* x6A */ | ||
208 | u16 bufletCount; /* x6C */ | ||
209 | u16 tcpWindowThreshold50; /* x6E */ | ||
210 | u16 tcpWindowThreshold25; /* x70 */ | ||
211 | u16 tcpWindowThreshold0; /* x72 */ | ||
212 | u16 ipHashTableBaseHi; /* x74 */ | ||
213 | u16 ipHashTableBaseLo; /* x76 */ | ||
214 | u16 ipHashTableSize; /* x78 */ | ||
215 | u16 tcpHashTableBaseHi; /* x7A */ | ||
216 | u16 tcpHashTableBaseLo; /* x7C */ | ||
217 | u16 tcpHashTableSize; /* x7E */ | ||
218 | u16 ncbTableBaseHi; /* x80 */ | ||
219 | u16 ncbTableBaseLo; /* x82 */ | ||
220 | u16 ncbTableSize; /* x84 */ | ||
221 | u16 drbTableBaseHi; /* x86 */ | ||
222 | u16 drbTableBaseLo; /* x88 */ | ||
223 | u16 drbTableSize; /* x8A */ | ||
224 | u16 reserved_142[4]; /* x8C */ | ||
225 | |||
226 | /* TCP/IP Parameters */ | ||
227 | u16 ipReassemblyTimeout; /* x94 */ | ||
228 | u16 tcpMaxWindowSize; /* x96 */ | ||
229 | u16 ipSecurity; /* x98 */ | ||
230 | u8 reserved_156[294]; /* x9A */ | ||
231 | u16 qDebug[8]; /* QLOGIC USE ONLY x1C0 */ | ||
232 | struct eeprom_function_cfg funcCfg_fn0; /* x1D0 */ | ||
233 | u16 reserved_510; /* x1FE */ | ||
234 | |||
235 | /* Address = 512 */ | ||
236 | u8 oemSpace[432]; /* x200 */ | ||
237 | struct bios_params sBIOSParams_fn1; /* x3B0 */ | ||
238 | struct eeprom_function_cfg funcCfg_fn1; /* x3D0 */ | ||
239 | u16 reserved_1022; /* x3FE */ | ||
240 | |||
241 | /* Address = 1024 */ | ||
242 | u8 reserved_1024[464]; /* x400 */ | ||
243 | struct eeprom_function_cfg funcCfg_fn2; /* x5D0 */ | ||
244 | u16 reserved_1534; /* x5FE */ | ||
245 | |||
246 | /* Address = 1536 */ | ||
247 | u8 reserved_1536[432]; /* x600 */ | ||
248 | struct bios_params sBIOSParams_fn3; /* x7B0 */ | ||
249 | struct eeprom_function_cfg funcCfg_fn3; /* x7D0 */ | ||
250 | u16 checksum; /* x7FE */ | ||
251 | } __attribute__ ((packed)) isp4022; | ||
252 | }; | ||
253 | }; | ||
254 | |||
255 | |||
256 | #endif /* _QL4XNVRM_H_ */ | ||