diff options
author | David C Somayajulu <david.somayajulu@qlogic.com> | 2007-05-23 20:52:26 -0400 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-05-26 12:47:31 -0400 |
commit | b2854316574d1fa2f1b85ad336d4a88aee5dd140 (patch) | |
tree | c73d9cb153ef3e72210d2e45e0751642782810f2 /drivers/scsi/qla4xxx/ql4_fw.h | |
parent | 5c8bfc9449b64b3726262bcaa914eeeafdd47ed3 (diff) |
[SCSI] qla4xxx: ql4_fw.h add support for qla4032
Add support for QLA4032 which supports IPv6
Signed-off-by: David Somayajulu <david.somayajulu@qlogic.com>
Signed-off-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/qla4xxx/ql4_fw.h')
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_fw.h | 426 |
1 files changed, 177 insertions, 249 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h index 4eea8c571916..9bb3d1d2a925 100644 --- a/drivers/scsi/qla4xxx/ql4_fw.h +++ b/drivers/scsi/qla4xxx/ql4_fw.h | |||
@@ -20,143 +20,23 @@ | |||
20 | *************************************************************************/ | 20 | *************************************************************************/ |
21 | 21 | ||
22 | struct port_ctrl_stat_regs { | 22 | struct port_ctrl_stat_regs { |
23 | __le32 ext_hw_conf; /* 80 x50 R/W */ | 23 | __le32 ext_hw_conf; /* 0x50 R/W */ |
24 | __le32 intChipConfiguration; /* 84 x54 */ | 24 | __le32 rsrvd0; /* 0x54 */ |
25 | __le32 port_ctrl; /* 88 x58 */ | 25 | __le32 port_ctrl; /* 0x58 */ |
26 | __le32 port_status; /* 92 x5c */ | 26 | __le32 port_status; /* 0x5c */ |
27 | __le32 HostPrimMACHi; /* 96 x60 */ | 27 | __le32 rsrvd1[32]; /* 0x60-0xdf */ |
28 | __le32 HostPrimMACLow; /* 100 x64 */ | 28 | __le32 gp_out; /* 0xe0 */ |
29 | __le32 HostSecMACHi; /* 104 x68 */ | 29 | __le32 gp_in; /* 0xe4 */ |
30 | __le32 HostSecMACLow; /* 108 x6c */ | 30 | __le32 rsrvd2[5]; /* 0xe8-0xfb */ |
31 | __le32 EPPrimMACHi; /* 112 x70 */ | 31 | __le32 port_err_status; /* 0xfc */ |
32 | __le32 EPPrimMACLow; /* 116 x74 */ | ||
33 | __le32 EPSecMACHi; /* 120 x78 */ | ||
34 | __le32 EPSecMACLow; /* 124 x7c */ | ||
35 | __le32 HostPrimIPHi; /* 128 x80 */ | ||
36 | __le32 HostPrimIPMidHi; /* 132 x84 */ | ||
37 | __le32 HostPrimIPMidLow; /* 136 x88 */ | ||
38 | __le32 HostPrimIPLow; /* 140 x8c */ | ||
39 | __le32 HostSecIPHi; /* 144 x90 */ | ||
40 | __le32 HostSecIPMidHi; /* 148 x94 */ | ||
41 | __le32 HostSecIPMidLow; /* 152 x98 */ | ||
42 | __le32 HostSecIPLow; /* 156 x9c */ | ||
43 | __le32 EPPrimIPHi; /* 160 xa0 */ | ||
44 | __le32 EPPrimIPMidHi; /* 164 xa4 */ | ||
45 | __le32 EPPrimIPMidLow; /* 168 xa8 */ | ||
46 | __le32 EPPrimIPLow; /* 172 xac */ | ||
47 | __le32 EPSecIPHi; /* 176 xb0 */ | ||
48 | __le32 EPSecIPMidHi; /* 180 xb4 */ | ||
49 | __le32 EPSecIPMidLow; /* 184 xb8 */ | ||
50 | __le32 EPSecIPLow; /* 188 xbc */ | ||
51 | __le32 IPReassemblyTimeout; /* 192 xc0 */ | ||
52 | __le32 EthMaxFramePayload; /* 196 xc4 */ | ||
53 | __le32 TCPMaxWindowSize; /* 200 xc8 */ | ||
54 | __le32 TCPCurrentTimestampHi; /* 204 xcc */ | ||
55 | __le32 TCPCurrentTimestampLow; /* 208 xd0 */ | ||
56 | __le32 LocalRAMAddress; /* 212 xd4 */ | ||
57 | __le32 LocalRAMData; /* 216 xd8 */ | ||
58 | __le32 PCSReserved1; /* 220 xdc */ | ||
59 | __le32 gp_out; /* 224 xe0 */ | ||
60 | __le32 gp_in; /* 228 xe4 */ | ||
61 | __le32 ProbeMuxAddr; /* 232 xe8 */ | ||
62 | __le32 ProbeMuxData; /* 236 xec */ | ||
63 | __le32 ERMQueueBaseAddr0; /* 240 xf0 */ | ||
64 | __le32 ERMQueueBaseAddr1; /* 244 xf4 */ | ||
65 | __le32 MACConfiguration; /* 248 xf8 */ | ||
66 | __le32 port_err_status; /* 252 xfc COR */ | ||
67 | }; | 32 | }; |
68 | 33 | ||
69 | struct host_mem_cfg_regs { | 34 | struct host_mem_cfg_regs { |
70 | __le32 NetRequestQueueOut; /* 80 x50 */ | 35 | __le32 rsrvd0[12]; /* 0x50-0x79 */ |
71 | __le32 NetRequestQueueOutAddrHi; /* 84 x54 */ | 36 | __le32 req_q_out; /* 0x80 */ |
72 | __le32 NetRequestQueueOutAddrLow; /* 88 x58 */ | 37 | __le32 rsrvd1[31]; /* 0x84-0xFF */ |
73 | __le32 NetRequestQueueBaseAddrHi; /* 92 x5c */ | ||
74 | __le32 NetRequestQueueBaseAddrLow; /* 96 x60 */ | ||
75 | __le32 NetRequestQueueLength; /* 100 x64 */ | ||
76 | __le32 NetResponseQueueIn; /* 104 x68 */ | ||
77 | __le32 NetResponseQueueInAddrHi; /* 108 x6c */ | ||
78 | __le32 NetResponseQueueInAddrLow; /* 112 x70 */ | ||
79 | __le32 NetResponseQueueBaseAddrHi; /* 116 x74 */ | ||
80 | __le32 NetResponseQueueBaseAddrLow; /* 120 x78 */ | ||
81 | __le32 NetResponseQueueLength; /* 124 x7c */ | ||
82 | __le32 req_q_out; /* 128 x80 */ | ||
83 | __le32 RequestQueueOutAddrHi; /* 132 x84 */ | ||
84 | __le32 RequestQueueOutAddrLow; /* 136 x88 */ | ||
85 | __le32 RequestQueueBaseAddrHi; /* 140 x8c */ | ||
86 | __le32 RequestQueueBaseAddrLow; /* 144 x90 */ | ||
87 | __le32 RequestQueueLength; /* 148 x94 */ | ||
88 | __le32 ResponseQueueIn; /* 152 x98 */ | ||
89 | __le32 ResponseQueueInAddrHi; /* 156 x9c */ | ||
90 | __le32 ResponseQueueInAddrLow; /* 160 xa0 */ | ||
91 | __le32 ResponseQueueBaseAddrHi; /* 164 xa4 */ | ||
92 | __le32 ResponseQueueBaseAddrLow; /* 168 xa8 */ | ||
93 | __le32 ResponseQueueLength; /* 172 xac */ | ||
94 | __le32 NetRxLargeBufferQueueOut; /* 176 xb0 */ | ||
95 | __le32 NetRxLargeBufferQueueBaseAddrHi; /* 180 xb4 */ | ||
96 | __le32 NetRxLargeBufferQueueBaseAddrLow; /* 184 xb8 */ | ||
97 | __le32 NetRxLargeBufferQueueLength; /* 188 xbc */ | ||
98 | __le32 NetRxLargeBufferLength; /* 192 xc0 */ | ||
99 | __le32 NetRxSmallBufferQueueOut; /* 196 xc4 */ | ||
100 | __le32 NetRxSmallBufferQueueBaseAddrHi; /* 200 xc8 */ | ||
101 | __le32 NetRxSmallBufferQueueBaseAddrLow; /* 204 xcc */ | ||
102 | __le32 NetRxSmallBufferQueueLength; /* 208 xd0 */ | ||
103 | __le32 NetRxSmallBufferLength; /* 212 xd4 */ | ||
104 | __le32 HMCReserved0[10]; /* 216 xd8 */ | ||
105 | }; | 38 | }; |
106 | 39 | ||
107 | struct local_ram_cfg_regs { | ||
108 | __le32 BufletSize; /* 80 x50 */ | ||
109 | __le32 BufletMaxCount; /* 84 x54 */ | ||
110 | __le32 BufletCurrCount; /* 88 x58 */ | ||
111 | __le32 BufletPauseThresholdCount; /* 92 x5c */ | ||
112 | __le32 BufletTCPWinThresholdHi; /* 96 x60 */ | ||
113 | __le32 BufletTCPWinThresholdLow; /* 100 x64 */ | ||
114 | __le32 IPHashTableBaseAddr; /* 104 x68 */ | ||
115 | __le32 IPHashTableSize; /* 108 x6c */ | ||
116 | __le32 TCPHashTableBaseAddr; /* 112 x70 */ | ||
117 | __le32 TCPHashTableSize; /* 116 x74 */ | ||
118 | __le32 NCBAreaBaseAddr; /* 120 x78 */ | ||
119 | __le32 NCBMaxCount; /* 124 x7c */ | ||
120 | __le32 NCBCurrCount; /* 128 x80 */ | ||
121 | __le32 DRBAreaBaseAddr; /* 132 x84 */ | ||
122 | __le32 DRBMaxCount; /* 136 x88 */ | ||
123 | __le32 DRBCurrCount; /* 140 x8c */ | ||
124 | __le32 LRCReserved[28]; /* 144 x90 */ | ||
125 | }; | ||
126 | |||
127 | struct prot_stat_regs { | ||
128 | __le32 MACTxFrameCount; /* 80 x50 R */ | ||
129 | __le32 MACTxByteCount; /* 84 x54 R */ | ||
130 | __le32 MACRxFrameCount; /* 88 x58 R */ | ||
131 | __le32 MACRxByteCount; /* 92 x5c R */ | ||
132 | __le32 MACCRCErrCount; /* 96 x60 R */ | ||
133 | __le32 MACEncErrCount; /* 100 x64 R */ | ||
134 | __le32 MACRxLengthErrCount; /* 104 x68 R */ | ||
135 | __le32 IPTxPacketCount; /* 108 x6c R */ | ||
136 | __le32 IPTxByteCount; /* 112 x70 R */ | ||
137 | __le32 IPTxFragmentCount; /* 116 x74 R */ | ||
138 | __le32 IPRxPacketCount; /* 120 x78 R */ | ||
139 | __le32 IPRxByteCount; /* 124 x7c R */ | ||
140 | __le32 IPRxFragmentCount; /* 128 x80 R */ | ||
141 | __le32 IPDatagramReassemblyCount; /* 132 x84 R */ | ||
142 | __le32 IPV6RxPacketCount; /* 136 x88 R */ | ||
143 | __le32 IPErrPacketCount; /* 140 x8c R */ | ||
144 | __le32 IPReassemblyErrCount; /* 144 x90 R */ | ||
145 | __le32 TCPTxSegmentCount; /* 148 x94 R */ | ||
146 | __le32 TCPTxByteCount; /* 152 x98 R */ | ||
147 | __le32 TCPRxSegmentCount; /* 156 x9c R */ | ||
148 | __le32 TCPRxByteCount; /* 160 xa0 R */ | ||
149 | __le32 TCPTimerExpCount; /* 164 xa4 R */ | ||
150 | __le32 TCPRxAckCount; /* 168 xa8 R */ | ||
151 | __le32 TCPTxAckCount; /* 172 xac R */ | ||
152 | __le32 TCPRxErrOOOCount; /* 176 xb0 R */ | ||
153 | __le32 PSReserved0; /* 180 xb4 */ | ||
154 | __le32 TCPRxWindowProbeUpdateCount; /* 184 xb8 R */ | ||
155 | __le32 ECCErrCorrectionCount; /* 188 xbc R */ | ||
156 | __le32 PSReserved1[16]; /* 192 xc0 */ | ||
157 | }; | ||
158 | |||
159 | |||
160 | /* remote register set (access via PCI memory read/write) */ | 40 | /* remote register set (access via PCI memory read/write) */ |
161 | struct isp_reg { | 41 | struct isp_reg { |
162 | #define MBOX_REG_COUNT 8 | 42 | #define MBOX_REG_COUNT 8 |
@@ -207,11 +87,7 @@ struct isp_reg { | |||
207 | union { | 87 | union { |
208 | struct port_ctrl_stat_regs p0; | 88 | struct port_ctrl_stat_regs p0; |
209 | struct host_mem_cfg_regs p1; | 89 | struct host_mem_cfg_regs p1; |
210 | struct local_ram_cfg_regs p2; | ||
211 | struct prot_stat_regs p3; | ||
212 | __le32 r_union[44]; | ||
213 | }; | 90 | }; |
214 | |||
215 | } __attribute__ ((packed)) isp4022; | 91 | } __attribute__ ((packed)) isp4022; |
216 | } u2; | 92 | } u2; |
217 | }; /* 256 x100 */ | 93 | }; /* 256 x100 */ |
@@ -296,6 +172,7 @@ static inline uint32_t clr_rmask(uint32_t val) | |||
296 | /* ISP Semaphore definitions */ | 172 | /* ISP Semaphore definitions */ |
297 | 173 | ||
298 | /* ISP General Purpose Output definitions */ | 174 | /* ISP General Purpose Output definitions */ |
175 | #define GPOR_TOPCAT_RESET 0x00000004 | ||
299 | 176 | ||
300 | /* shadow registers (DMA'd from HA to system memory. read only) */ | 177 | /* shadow registers (DMA'd from HA to system memory. read only) */ |
301 | struct shadow_regs { | 178 | struct shadow_regs { |
@@ -337,6 +214,7 @@ union external_hw_config_reg { | |||
337 | 214 | ||
338 | /* Mailbox command definitions */ | 215 | /* Mailbox command definitions */ |
339 | #define MBOX_CMD_ABOUT_FW 0x0009 | 216 | #define MBOX_CMD_ABOUT_FW 0x0009 |
217 | #define MBOX_CMD_PING 0x000B | ||
340 | #define MBOX_CMD_LUN_RESET 0x0016 | 218 | #define MBOX_CMD_LUN_RESET 0x0016 |
341 | #define MBOX_CMD_GET_MANAGEMENT_DATA 0x001E | 219 | #define MBOX_CMD_GET_MANAGEMENT_DATA 0x001E |
342 | #define MBOX_CMD_GET_FW_STATUS 0x001F | 220 | #define MBOX_CMD_GET_FW_STATUS 0x001F |
@@ -364,6 +242,17 @@ union external_hw_config_reg { | |||
364 | #define MBOX_CMD_GET_FW_STATE 0x0069 | 242 | #define MBOX_CMD_GET_FW_STATE 0x0069 |
365 | #define MBOX_CMD_GET_INIT_FW_CTRL_BLOCK_DEFAULTS 0x006A | 243 | #define MBOX_CMD_GET_INIT_FW_CTRL_BLOCK_DEFAULTS 0x006A |
366 | #define MBOX_CMD_RESTORE_FACTORY_DEFAULTS 0x0087 | 244 | #define MBOX_CMD_RESTORE_FACTORY_DEFAULTS 0x0087 |
245 | #define MBOX_CMD_SET_ACB 0x0088 | ||
246 | #define MBOX_CMD_GET_ACB 0x0089 | ||
247 | #define MBOX_CMD_DISABLE_ACB 0x008A | ||
248 | #define MBOX_CMD_GET_IPV6_NEIGHBOR_CACHE 0x008B | ||
249 | #define MBOX_CMD_GET_IPV6_DEST_CACHE 0x008C | ||
250 | #define MBOX_CMD_GET_IPV6_DEF_ROUTER_LIST 0x008D | ||
251 | #define MBOX_CMD_GET_IPV6_LCL_PREFIX_LIST 0x008E | ||
252 | #define MBOX_CMD_SET_IPV6_NEIGHBOR_CACHE 0x0090 | ||
253 | #define MBOX_CMD_GET_IP_ADDR_STATE 0x0091 | ||
254 | #define MBOX_CMD_SEND_IPV6_ROUTER_SOL 0x0092 | ||
255 | #define MBOX_CMD_GET_DB_ENTRY_CURRENT_IP_ADDR 0x0093 | ||
367 | 256 | ||
368 | /* Mailbox 1 */ | 257 | /* Mailbox 1 */ |
369 | #define FW_STATE_READY 0x0000 | 258 | #define FW_STATE_READY 0x0000 |
@@ -409,6 +298,16 @@ union external_hw_config_reg { | |||
409 | #define MBOX_ASTS_DHCP_LEASE_EXPIRED 0x801D | 298 | #define MBOX_ASTS_DHCP_LEASE_EXPIRED 0x801D |
410 | #define MBOX_ASTS_DHCP_LEASE_ACQUIRED 0x801F | 299 | #define MBOX_ASTS_DHCP_LEASE_ACQUIRED 0x801F |
411 | #define MBOX_ASTS_ISNS_UNSOLICITED_PDU_RECEIVED 0x8021 | 300 | #define MBOX_ASTS_ISNS_UNSOLICITED_PDU_RECEIVED 0x8021 |
301 | #define MBOX_ASTS_DUPLICATE_IP 0x8025 | ||
302 | #define MBOX_ASTS_ARP_COMPLETE 0x8026 | ||
303 | #define MBOX_ASTS_SUBNET_STATE_CHANGE 0x8027 | ||
304 | #define MBOX_ASTS_RESPONSE_QUEUE_FULL 0x8028 | ||
305 | #define MBOX_ASTS_IP_ADDR_STATE_CHANGED 0x8029 | ||
306 | #define MBOX_ASTS_IPV6_PREFIX_EXPIRED 0x802B | ||
307 | #define MBOX_ASTS_IPV6_ND_PREFIX_IGNORED 0x802C | ||
308 | #define MBOX_ASTS_IPV6_LCL_PREFIX_IGNORED 0x802D | ||
309 | #define MBOX_ASTS_ICMPV6_ERROR_MSG_RCVD 0x802E | ||
310 | |||
412 | #define ISNS_EVENT_DATA_RECEIVED 0x0000 | 311 | #define ISNS_EVENT_DATA_RECEIVED 0x0000 |
413 | #define ISNS_EVENT_CONNECTION_OPENED 0x0001 | 312 | #define ISNS_EVENT_CONNECTION_OPENED 0x0001 |
414 | #define ISNS_EVENT_CONNECTION_FAILED 0x0002 | 313 | #define ISNS_EVENT_CONNECTION_FAILED 0x0002 |
@@ -418,137 +317,166 @@ union external_hw_config_reg { | |||
418 | /*************************************************************************/ | 317 | /*************************************************************************/ |
419 | 318 | ||
420 | /* Host Adapter Initialization Control Block (from host) */ | 319 | /* Host Adapter Initialization Control Block (from host) */ |
421 | struct init_fw_ctrl_blk { | 320 | struct addr_ctrl_blk { |
422 | uint8_t Version; /* 00 */ | 321 | uint8_t version; /* 00 */ |
423 | uint8_t Control; /* 01 */ | 322 | uint8_t control; /* 01 */ |
424 | 323 | ||
425 | uint16_t FwOptions; /* 02-03 */ | 324 | uint16_t fw_options; /* 02-03 */ |
426 | #define FWOPT_HEARTBEAT_ENABLE 0x1000 | 325 | #define FWOPT_HEARTBEAT_ENABLE 0x1000 |
427 | #define FWOPT_SESSION_MODE 0x0040 | 326 | #define FWOPT_SESSION_MODE 0x0040 |
428 | #define FWOPT_INITIATOR_MODE 0x0020 | 327 | #define FWOPT_INITIATOR_MODE 0x0020 |
429 | #define FWOPT_TARGET_MODE 0x0010 | 328 | #define FWOPT_TARGET_MODE 0x0010 |
430 | 329 | ||
431 | uint16_t ExecThrottle; /* 04-05 */ | 330 | uint16_t exec_throttle; /* 04-05 */ |
432 | uint8_t RetryCount; /* 06 */ | 331 | uint8_t zio_count; /* 06 */ |
433 | uint8_t RetryDelay; /* 07 */ | 332 | uint8_t res0; /* 07 */ |
434 | uint16_t MaxEthFrPayloadSize; /* 08-09 */ | 333 | uint16_t eth_mtu_size; /* 08-09 */ |
435 | uint16_t AddFwOptions; /* 0A-0B */ | 334 | uint16_t add_fw_options; /* 0A-0B */ |
436 | 335 | ||
437 | uint8_t HeartbeatInterval; /* 0C */ | 336 | uint8_t hb_interval; /* 0C */ |
438 | uint8_t InstanceNumber; /* 0D */ | 337 | uint8_t inst_num; /* 0D */ |
439 | uint16_t RES2; /* 0E-0F */ | 338 | uint16_t res1; /* 0E-0F */ |
440 | uint16_t ReqQConsumerIndex; /* 10-11 */ | 339 | uint16_t rqq_consumer_idx; /* 10-11 */ |
441 | uint16_t ComplQProducerIndex; /* 12-13 */ | 340 | uint16_t compq_producer_idx; /* 12-13 */ |
442 | uint16_t ReqQLen; /* 14-15 */ | 341 | uint16_t rqq_len; /* 14-15 */ |
443 | uint16_t ComplQLen; /* 16-17 */ | 342 | uint16_t compq_len; /* 16-17 */ |
444 | uint32_t ReqQAddrLo; /* 18-1B */ | 343 | uint32_t rqq_addr_lo; /* 18-1B */ |
445 | uint32_t ReqQAddrHi; /* 1C-1F */ | 344 | uint32_t rqq_addr_hi; /* 1C-1F */ |
446 | uint32_t ComplQAddrLo; /* 20-23 */ | 345 | uint32_t compq_addr_lo; /* 20-23 */ |
447 | uint32_t ComplQAddrHi; /* 24-27 */ | 346 | uint32_t compq_addr_hi; /* 24-27 */ |
448 | uint32_t ShadowRegBufAddrLo; /* 28-2B */ | 347 | uint32_t shdwreg_addr_lo; /* 28-2B */ |
449 | uint32_t ShadowRegBufAddrHi; /* 2C-2F */ | 348 | uint32_t shdwreg_addr_hi; /* 2C-2F */ |
450 | 349 | ||
451 | uint16_t iSCSIOptions; /* 30-31 */ | 350 | uint16_t iscsi_opts; /* 30-31 */ |
452 | 351 | uint16_t ipv4_tcp_opts; /* 32-33 */ | |
453 | uint16_t TCPOptions; /* 32-33 */ | 352 | uint16_t ipv4_ip_opts; /* 34-35 */ |
454 | 353 | ||
455 | uint16_t IPOptions; /* 34-35 */ | 354 | uint16_t iscsi_max_pdu_size; /* 36-37 */ |
456 | 355 | uint8_t ipv4_tos; /* 38 */ | |
457 | uint16_t MaxPDUSize; /* 36-37 */ | 356 | uint8_t ipv4_ttl; /* 39 */ |
458 | uint16_t RcvMarkerInt; /* 38-39 */ | 357 | uint8_t acb_version; /* 3A */ |
459 | uint16_t SndMarkerInt; /* 3A-3B */ | 358 | uint8_t res2; /* 3B */ |
460 | uint16_t InitMarkerlessInt; /* 3C-3D */ | 359 | uint16_t def_timeout; /* 3C-3D */ |
461 | uint16_t FirstBurstSize; /* 3E-3F */ | 360 | uint16_t iscsi_fburst_len; /* 3E-3F */ |
462 | uint16_t DefaultTime2Wait; /* 40-41 */ | 361 | uint16_t iscsi_def_time2wait; /* 40-41 */ |
463 | uint16_t DefaultTime2Retain; /* 42-43 */ | 362 | uint16_t iscsi_def_time2retain; /* 42-43 */ |
464 | uint16_t MaxOutStndngR2T; /* 44-45 */ | 363 | uint16_t iscsi_max_outstnd_r2t; /* 44-45 */ |
465 | uint16_t KeepAliveTimeout; /* 46-47 */ | 364 | uint16_t conn_ka_timeout; /* 46-47 */ |
466 | uint16_t PortNumber; /* 48-49 */ | 365 | uint16_t ipv4_port; /* 48-49 */ |
467 | uint16_t MaxBurstSize; /* 4A-4B */ | 366 | uint16_t iscsi_max_burst_len; /* 4A-4B */ |
468 | uint32_t RES4; /* 4C-4F */ | 367 | uint32_t res5; /* 4C-4F */ |
469 | uint8_t IPAddr[4]; /* 50-53 */ | 368 | uint8_t ipv4_addr[4]; /* 50-53 */ |
470 | uint8_t RES5[12]; /* 54-5F */ | 369 | uint16_t ipv4_vlan_tag; /* 54-55 */ |
471 | uint8_t SubnetMask[4]; /* 60-63 */ | 370 | uint8_t ipv4_addr_state; /* 56 */ |
472 | uint8_t RES6[12]; /* 64-6F */ | 371 | uint8_t ipv4_cacheid; /* 57 */ |
473 | uint8_t GatewayIPAddr[4]; /* 70-73 */ | 372 | uint8_t res6[8]; /* 58-5F */ |
474 | uint8_t RES7[12]; /* 74-7F */ | 373 | uint8_t ipv4_subnet[4]; /* 60-63 */ |
475 | uint8_t PriDNSIPAddr[4]; /* 80-83 */ | 374 | uint8_t res7[12]; /* 64-6F */ |
476 | uint8_t SecDNSIPAddr[4]; /* 84-87 */ | 375 | uint8_t ipv4_gw_addr[4]; /* 70-73 */ |
477 | uint8_t RES8[8]; /* 88-8F */ | 376 | uint8_t res8[0xc]; /* 74-7F */ |
478 | uint8_t Alias[32]; /* 90-AF */ | 377 | uint8_t pri_dns_srvr_ip[4];/* 80-83 */ |
479 | uint8_t TargAddr[8]; /* B0-B7 *//* /FIXME: Remove?? */ | 378 | uint8_t sec_dns_srvr_ip[4];/* 84-87 */ |
480 | uint8_t CHAPNameSecretsTable[8]; /* B8-BF */ | 379 | uint16_t min_eph_port; /* 88-89 */ |
481 | uint8_t EthernetMACAddr[6]; /* C0-C5 */ | 380 | uint16_t max_eph_port; /* 8A-8B */ |
482 | uint16_t TargetPortalGroup; /* C6-C7 */ | 381 | uint8_t res9[4]; /* 8C-8F */ |
483 | uint8_t SendScale; /* C8 */ | 382 | uint8_t iscsi_alias[32];/* 90-AF */ |
484 | uint8_t RecvScale; /* C9 */ | 383 | uint8_t res9_1[0x16]; /* B0-C5 */ |
485 | uint8_t TypeOfService; /* CA */ | 384 | uint16_t tgt_portal_grp;/* C6-C7 */ |
486 | uint8_t Time2Live; /* CB */ | 385 | uint8_t abort_timer; /* C8 */ |
487 | uint16_t VLANPriority; /* CC-CD */ | 386 | uint8_t ipv4_tcp_wsf; /* C9 */ |
488 | uint16_t Reserved8; /* CE-CF */ | 387 | uint8_t res10[6]; /* CA-CF */ |
489 | uint8_t SecIPAddr[4]; /* D0-D3 */ | 388 | uint8_t ipv4_sec_ip_addr[4]; /* D0-D3 */ |
490 | uint8_t Reserved9[12]; /* D4-DF */ | 389 | uint8_t ipv4_dhcp_vid_len; /* D4 */ |
491 | uint8_t iSNSIPAddr[4]; /* E0-E3 */ | 390 | uint8_t ipv4_dhcp_vid[11]; /* D5-DF */ |
492 | uint16_t iSNSServerPortNumber; /* E4-E5 */ | 391 | uint8_t res11[20]; /* E0-F3 */ |
493 | uint8_t Reserved10[10]; /* E6-EF */ | 392 | uint8_t ipv4_dhcp_alt_cid_len; /* F4 */ |
494 | uint8_t SLPDAIPAddr[4]; /* F0-F3 */ | 393 | uint8_t ipv4_dhcp_alt_cid[11]; /* F5-FF */ |
495 | uint8_t Reserved11[12]; /* F4-FF */ | 394 | uint8_t iscsi_name[224]; /* 100-1DF */ |
496 | uint8_t iSCSINameString[256]; /* 100-1FF */ | 395 | uint8_t res12[32]; /* 1E0-1FF */ |
396 | uint32_t cookie; /* 200-203 */ | ||
397 | uint16_t ipv6_port; /* 204-205 */ | ||
398 | uint16_t ipv6_opts; /* 206-207 */ | ||
399 | uint16_t ipv6_addtl_opts; /* 208-209 */ | ||
400 | uint16_t ipv6_tcp_opts; /* 20A-20B */ | ||
401 | uint8_t ipv6_tcp_wsf; /* 20C */ | ||
402 | uint16_t ipv6_flow_lbl; /* 20D-20F */ | ||
403 | uint8_t ipv6_gw_addr[16]; /* 210-21F */ | ||
404 | uint16_t ipv6_vlan_tag; /* 220-221 */ | ||
405 | uint8_t ipv6_lnk_lcl_addr_state;/* 222 */ | ||
406 | uint8_t ipv6_addr0_state; /* 223 */ | ||
407 | uint8_t ipv6_addr1_state; /* 224 */ | ||
408 | uint8_t ipv6_gw_state; /* 225 */ | ||
409 | uint8_t ipv6_traffic_class; /* 226 */ | ||
410 | uint8_t ipv6_hop_limit; /* 227 */ | ||
411 | uint8_t ipv6_if_id[8]; /* 228-22F */ | ||
412 | uint8_t ipv6_addr0[16]; /* 230-23F */ | ||
413 | uint8_t ipv6_addr1[16]; /* 240-24F */ | ||
414 | uint32_t ipv6_nd_reach_time; /* 250-253 */ | ||
415 | uint32_t ipv6_nd_rexmit_timer; /* 254-257 */ | ||
416 | uint32_t ipv6_nd_stale_timeout; /* 258-25B */ | ||
417 | uint8_t ipv6_dup_addr_detect_count; /* 25C */ | ||
418 | uint8_t ipv6_cache_id; /* 25D */ | ||
419 | uint8_t res13[18]; /* 25E-26F */ | ||
420 | uint32_t ipv6_gw_advrt_mtu; /* 270-273 */ | ||
421 | uint8_t res14[140]; /* 274-2FF */ | ||
422 | }; | ||
423 | |||
424 | struct init_fw_ctrl_blk { | ||
425 | struct addr_ctrl_blk pri; | ||
426 | struct addr_ctrl_blk sec; | ||
497 | }; | 427 | }; |
498 | 428 | ||
499 | /*************************************************************************/ | 429 | /*************************************************************************/ |
500 | 430 | ||
501 | struct dev_db_entry { | 431 | struct dev_db_entry { |
502 | uint8_t options; /* 00 */ | 432 | uint16_t options; /* 00-01 */ |
503 | #define DDB_OPT_DISC_SESSION 0x10 | 433 | #define DDB_OPT_DISC_SESSION 0x10 |
504 | #define DDB_OPT_TARGET 0x02 /* device is a target */ | 434 | #define DDB_OPT_TARGET 0x02 /* device is a target */ |
505 | 435 | ||
506 | uint8_t control; /* 01 */ | 436 | uint16_t exec_throttle; /* 02-03 */ |
507 | 437 | uint16_t exec_count; /* 04-05 */ | |
508 | uint16_t exeThrottle; /* 02-03 */ | 438 | uint16_t res0; /* 06-07 */ |
509 | uint16_t exeCount; /* 04-05 */ | 439 | uint16_t iscsi_options; /* 08-09 */ |
510 | uint8_t retryCount; /* 06 */ | 440 | uint16_t tcp_options; /* 0A-0B */ |
511 | uint8_t retryDelay; /* 07 */ | 441 | uint16_t ip_options; /* 0C-0D */ |
512 | uint16_t iSCSIOptions; /* 08-09 */ | 442 | uint16_t iscsi_max_rcv_data_seg_len; /* 0E-0F */ |
513 | 443 | uint32_t res1; /* 10-13 */ | |
514 | uint16_t TCPOptions; /* 0A-0B */ | 444 | uint16_t iscsi_max_snd_data_seg_len; /* 14-15 */ |
515 | 445 | uint16_t iscsi_first_burst_len; /* 16-17 */ | |
516 | uint16_t IPOptions; /* 0C-0D */ | 446 | uint16_t iscsi_def_time2wait; /* 18-19 */ |
517 | 447 | uint16_t iscsi_def_time2retain; /* 1A-1B */ | |
518 | uint16_t maxPDUSize; /* 0E-0F */ | 448 | uint16_t iscsi_max_outsnd_r2t; /* 1C-1D */ |
519 | uint16_t rcvMarkerInt; /* 10-11 */ | 449 | uint16_t ka_timeout; /* 1E-1F */ |
520 | uint16_t sndMarkerInt; /* 12-13 */ | 450 | uint8_t isid[6]; /* 20-25 big-endian, must be converted |
521 | uint16_t iSCSIMaxSndDataSegLen; /* 14-15 */ | ||
522 | uint16_t firstBurstSize; /* 16-17 */ | ||
523 | uint16_t minTime2Wait; /* 18-19 : RA :default_time2wait */ | ||
524 | uint16_t maxTime2Retain; /* 1A-1B */ | ||
525 | uint16_t maxOutstndngR2T; /* 1C-1D */ | ||
526 | uint16_t keepAliveTimeout; /* 1E-1F */ | ||
527 | uint8_t ISID[6]; /* 20-25 big-endian, must be converted | ||
528 | * to little-endian */ | 451 | * to little-endian */ |
529 | uint16_t TSID; /* 26-27 */ | 452 | uint16_t tsid; /* 26-27 */ |
530 | uint16_t portNumber; /* 28-29 */ | 453 | uint16_t port; /* 28-29 */ |
531 | uint16_t maxBurstSize; /* 2A-2B */ | 454 | uint16_t iscsi_max_burst_len; /* 2A-2B */ |
532 | uint16_t taskMngmntTimeout; /* 2C-2D */ | 455 | uint16_t def_timeout; /* 2C-2D */ |
533 | uint16_t reserved1; /* 2E-2F */ | 456 | uint16_t res2; /* 2E-2F */ |
534 | uint8_t ipAddr[0x10]; /* 30-3F */ | 457 | uint8_t ip_addr[0x10]; /* 30-3F */ |
535 | uint8_t iSCSIAlias[0x20]; /* 40-5F */ | 458 | uint8_t iscsi_alias[0x20]; /* 40-5F */ |
536 | uint8_t targetAddr[0x20]; /* 60-7F */ | 459 | uint8_t tgt_addr[0x20]; /* 60-7F */ |
537 | uint8_t userID[0x20]; /* 80-9F */ | 460 | uint16_t mss; /* 80-81 */ |
538 | uint8_t password[0x20]; /* A0-BF */ | 461 | uint16_t res3; /* 82-83 */ |
539 | uint8_t iscsiName[0x100]; /* C0-1BF : xxzzy Make this a | 462 | uint16_t lcl_port; /* 84-85 */ |
463 | uint8_t ipv4_tos; /* 86 */ | ||
464 | uint16_t ipv6_flow_lbl; /* 87-89 */ | ||
465 | uint8_t res4[0x36]; /* 8A-BF */ | ||
466 | uint8_t iscsi_name[0xE0]; /* C0-19F : xxzzy Make this a | ||
540 | * pointer to a string so we | 467 | * pointer to a string so we |
541 | * don't have to reserve soooo | 468 | * don't have to reserve soooo |
542 | * much RAM */ | 469 | * much RAM */ |
543 | uint16_t ddbLink; /* 1C0-1C1 */ | 470 | uint8_t ipv6_addr[0x10];/* 1A0-1AF */ |
544 | uint16_t CHAPTableIndex; /* 1C2-1C3 */ | 471 | uint8_t res5[0x10]; /* 1B0-1BF */ |
545 | uint16_t TargetPortalGroup; /* 1C4-1C5 */ | 472 | uint16_t ddb_link; /* 1C0-1C1 */ |
546 | uint16_t reserved2[2]; /* 1C6-1C7 */ | 473 | uint16_t chap_tbl_idx; /* 1C2-1C3 */ |
547 | uint32_t statSN; /* 1C8-1CB */ | 474 | uint16_t tgt_portal_grp; /* 1C4-1C5 */ |
548 | uint32_t expStatSN; /* 1CC-1CF */ | 475 | uint8_t tcp_xmt_wsf; /* 1C6 */ |
549 | uint16_t reserved3[0x2C]; /* 1D0-1FB */ | 476 | uint8_t tcp_rcv_wsf; /* 1C7 */ |
550 | uint16_t ddbValidCookie; /* 1FC-1FD */ | 477 | uint32_t stat_sn; /* 1C8-1CB */ |
551 | uint16_t ddbValidSize; /* 1FE-1FF */ | 478 | uint32_t exp_stat_sn; /* 1CC-1CF */ |
479 | uint8_t res6[0x30]; /* 1D0-1FF */ | ||
552 | }; | 480 | }; |
553 | 481 | ||
554 | /*************************************************************************/ | 482 | /*************************************************************************/ |