diff options
author | Manish Rangankar <manish.rangankar@qlogic.com> | 2011-07-25 14:48:55 -0400 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2011-08-27 10:36:27 -0400 |
commit | 2a991c2159782b8d318ac9f88a36c22dda3e7185 (patch) | |
tree | 963cc3bec9517038458ad7e71b9a5d45ede4d360 /drivers/scsi/qla4xxx/ql4_fw.h | |
parent | 0e7e85019c2709131b10c5f34b602cc6b94fe782 (diff) |
[SCSI] qla4xxx: Boot from SAN support for open-iscsi
Hook qla4xxx in fw boot sysfs interface so iscsi tools
can use the info to create boot sessions.
Signed-off-by: Manish Rangankar <manish.rangankar@qlogic.com>
Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com>
Signed-off-by: Mike Christie <michaelc@cs.wisc.edu>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/qla4xxx/ql4_fw.h')
-rw-r--r-- | drivers/scsi/qla4xxx/ql4_fw.h | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h index 99098d51543b..9dc439b0d75f 100644 --- a/drivers/scsi/qla4xxx/ql4_fw.h +++ b/drivers/scsi/qla4xxx/ql4_fw.h | |||
@@ -146,6 +146,13 @@ struct isp_reg { | |||
146 | #define QL4022_NVRAM_SEM_MASK (QL4022_RESOURCE_MASK_BASE_CODE << (10+16)) | 146 | #define QL4022_NVRAM_SEM_MASK (QL4022_RESOURCE_MASK_BASE_CODE << (10+16)) |
147 | #define QL4022_FLASH_SEM_MASK (QL4022_RESOURCE_MASK_BASE_CODE << (13+16)) | 147 | #define QL4022_FLASH_SEM_MASK (QL4022_RESOURCE_MASK_BASE_CODE << (13+16)) |
148 | 148 | ||
149 | /* nvram address for 4032 */ | ||
150 | #define NVRAM_PORT0_BOOT_MODE 0x03b1 | ||
151 | #define NVRAM_PORT0_BOOT_PRI_TGT 0x03b2 | ||
152 | #define NVRAM_PORT0_BOOT_SEC_TGT 0x03bb | ||
153 | #define NVRAM_PORT1_BOOT_MODE 0x07b1 | ||
154 | #define NVRAM_PORT1_BOOT_PRI_TGT 0x07b2 | ||
155 | #define NVRAM_PORT1_BOOT_SEC_TGT 0x07bb | ||
149 | 156 | ||
150 | 157 | ||
151 | /* Page # defines for 4022 */ | 158 | /* Page # defines for 4022 */ |
@@ -298,6 +305,7 @@ struct qla_flt_header { | |||
298 | #define FLT_REG_FW_82 0x74 | 305 | #define FLT_REG_FW_82 0x74 |
299 | #define FLT_REG_GOLD_FW_82 0x75 | 306 | #define FLT_REG_GOLD_FW_82 0x75 |
300 | #define FLT_REG_BOOT_CODE_82 0x78 | 307 | #define FLT_REG_BOOT_CODE_82 0x78 |
308 | #define FLT_REG_ISCSI_PARAM 0x65 | ||
301 | 309 | ||
302 | struct qla_flt_region { | 310 | struct qla_flt_region { |
303 | uint32_t code; | 311 | uint32_t code; |
@@ -733,7 +741,10 @@ struct dev_db_entry { | |||
733 | uint8_t tcp_rcv_wsf; /* 1C7 */ | 741 | uint8_t tcp_rcv_wsf; /* 1C7 */ |
734 | uint32_t stat_sn; /* 1C8-1CB */ | 742 | uint32_t stat_sn; /* 1C8-1CB */ |
735 | uint32_t exp_stat_sn; /* 1CC-1CF */ | 743 | uint32_t exp_stat_sn; /* 1CC-1CF */ |
736 | uint8_t res6[0x30]; /* 1D0-1FF */ | 744 | uint8_t res6[0x2b]; /* 1D0-1FB */ |
745 | #define DDB_VALID_COOKIE 0x9034 | ||
746 | uint16_t cookie; /* 1FC-1FD */ | ||
747 | uint16_t len; /* 1FE-1FF */ | ||
737 | }; | 748 | }; |
738 | 749 | ||
739 | /*************************************************************************/ | 750 | /*************************************************************************/ |
@@ -745,6 +756,14 @@ struct dev_db_entry { | |||
745 | #define FLASH_EOF_OFFSET (FLASH_DEFAULTBLOCKSIZE-8) /* 4 bytes | 756 | #define FLASH_EOF_OFFSET (FLASH_DEFAULTBLOCKSIZE-8) /* 4 bytes |
746 | * for EOF | 757 | * for EOF |
747 | * signature */ | 758 | * signature */ |
759 | #define FLASH_RAW_ACCESS_ADDR 0x8e000000 | ||
760 | |||
761 | #define BOOT_PARAM_OFFSET_PORT0 0x3b0 | ||
762 | #define BOOT_PARAM_OFFSET_PORT1 0x7b0 | ||
763 | |||
764 | #define FLASH_OFFSET_DB_INFO 0x05000000 | ||
765 | #define FLASH_OFFSET_DB_END (FLASH_OFFSET_DB_INFO + 0x7fff) | ||
766 | |||
748 | 767 | ||
749 | struct sys_info_phys_addr { | 768 | struct sys_info_phys_addr { |
750 | uint8_t address[6]; /* 00-05 */ | 769 | uint8_t address[6]; /* 00-05 */ |