diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-27 14:25:00 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-27 14:25:00 -0400 |
commit | 064922a805ec7aadfafdd27aa6b4908d737c3c1d (patch) | |
tree | 922d058f751964ccf73f5705d7c492b6d45a9425 /drivers/scsi/qla2xxx | |
parent | 42cadc86008aae0fd9ff31642dc01ed50723cf32 (diff) | |
parent | ecc1241e80a0bdc854b1602a44be3ad106753d4f (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6: (40 commits)
[SCSI] jazz_esp, sgiwd93, sni_53c710, sun3x_esp: fix platform driver hotplug/coldplug
[SCSI] aic7xxx: add const
[SCSI] aic7xxx: add static
[SCSI] aic7xxx: Update _shipped files
[SCSI] aic7xxx: teach aicasm to not emit unused debug code/data
[SCSI] qla2xxx: Update version number to 8.02.01-k2.
[SCSI] qla2xxx: Correct regression in relogin code.
[SCSI] qla2xxx: Correct misc. endian and byte-ordering issues.
[SCSI] qla2xxx: make qla2x00_issue_iocb_timeout() static
[SCSI] qla2xxx: qla_os.c, make 2 functions static
[SCSI] qla2xxx: Re-register FDMI information after a LIP.
[SCSI] qla2xxx: Correct SRB usage-after-completion/free issues.
[SCSI] qla2xxx: Correct ISP84XX verify-chip response handling.
[SCSI] qla2xxx: Wakeup DPC thread to process any deferred-work requests.
[SCSI] qla2xxx: Collapse RISC-RAM retrieval code during a firmware-dump.
[SCSI] m68k: new mac_esp scsi driver
[SCSI] zfcp: Add some statistics provided by the FCP adapter to the sysfs
[SCSI] zfcp: Print some messages only during ERP
[SCSI] zfcp: Wait for free SBAL during exchange config
[SCSI] scsi_transport_fc: fc_user_scan correction
...
Diffstat (limited to 'drivers/scsi/qla2xxx')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_attr.c | 8 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_dbg.c | 394 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_fw.h | 26 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_gbl.h | 4 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_gs.c | 4 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_init.c | 2 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_isr.c | 4 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_mbx.c | 19 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_os.c | 12 | ||||
-rw-r--r-- | drivers/scsi/qla2xxx/qla_version.h | 2 |
10 files changed, 174 insertions, 301 deletions
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index d61df036910c..287690853caf 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c | |||
@@ -609,8 +609,8 @@ qla2x00_pci_info_show(struct device *dev, struct device_attribute *attr, | |||
609 | } | 609 | } |
610 | 610 | ||
611 | static ssize_t | 611 | static ssize_t |
612 | qla2x00_state_show(struct device *dev, struct device_attribute *attr, | 612 | qla2x00_link_state_show(struct device *dev, struct device_attribute *attr, |
613 | char *buf) | 613 | char *buf) |
614 | { | 614 | { |
615 | scsi_qla_host_t *ha = shost_priv(class_to_shost(dev)); | 615 | scsi_qla_host_t *ha = shost_priv(class_to_shost(dev)); |
616 | int len = 0; | 616 | int len = 0; |
@@ -814,7 +814,7 @@ static DEVICE_ATTR(isp_id, S_IRUGO, qla2x00_isp_id_show, NULL); | |||
814 | static DEVICE_ATTR(model_name, S_IRUGO, qla2x00_model_name_show, NULL); | 814 | static DEVICE_ATTR(model_name, S_IRUGO, qla2x00_model_name_show, NULL); |
815 | static DEVICE_ATTR(model_desc, S_IRUGO, qla2x00_model_desc_show, NULL); | 815 | static DEVICE_ATTR(model_desc, S_IRUGO, qla2x00_model_desc_show, NULL); |
816 | static DEVICE_ATTR(pci_info, S_IRUGO, qla2x00_pci_info_show, NULL); | 816 | static DEVICE_ATTR(pci_info, S_IRUGO, qla2x00_pci_info_show, NULL); |
817 | static DEVICE_ATTR(state, S_IRUGO, qla2x00_state_show, NULL); | 817 | static DEVICE_ATTR(link_state, S_IRUGO, qla2x00_link_state_show, NULL); |
818 | static DEVICE_ATTR(zio, S_IRUGO | S_IWUSR, qla2x00_zio_show, qla2x00_zio_store); | 818 | static DEVICE_ATTR(zio, S_IRUGO | S_IWUSR, qla2x00_zio_show, qla2x00_zio_store); |
819 | static DEVICE_ATTR(zio_timer, S_IRUGO | S_IWUSR, qla2x00_zio_timer_show, | 819 | static DEVICE_ATTR(zio_timer, S_IRUGO | S_IWUSR, qla2x00_zio_timer_show, |
820 | qla2x00_zio_timer_store); | 820 | qla2x00_zio_timer_store); |
@@ -838,7 +838,7 @@ struct device_attribute *qla2x00_host_attrs[] = { | |||
838 | &dev_attr_model_name, | 838 | &dev_attr_model_name, |
839 | &dev_attr_model_desc, | 839 | &dev_attr_model_desc, |
840 | &dev_attr_pci_info, | 840 | &dev_attr_pci_info, |
841 | &dev_attr_state, | 841 | &dev_attr_link_state, |
842 | &dev_attr_zio, | 842 | &dev_attr_zio, |
843 | &dev_attr_zio_timer, | 843 | &dev_attr_zio_timer, |
844 | &dev_attr_beacon, | 844 | &dev_attr_beacon, |
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c index 9d12d9f26209..cbef785765cf 100644 --- a/drivers/scsi/qla2xxx/qla_dbg.c +++ b/drivers/scsi/qla2xxx/qla_dbg.c | |||
@@ -38,78 +38,38 @@ qla2xxx_copy_queues(scsi_qla_host_t *ha, void *ptr) | |||
38 | } | 38 | } |
39 | 39 | ||
40 | static int | 40 | static int |
41 | qla24xx_dump_memory(scsi_qla_host_t *ha, uint32_t *code_ram, | 41 | qla24xx_dump_ram(scsi_qla_host_t *ha, uint32_t addr, uint32_t *ram, |
42 | uint32_t cram_size, uint32_t *ext_mem, void **nxt) | 42 | uint32_t ram_dwords, void **nxt) |
43 | { | 43 | { |
44 | int rval; | 44 | int rval; |
45 | uint32_t cnt, stat, timer, risc_address, ext_mem_cnt; | 45 | uint32_t cnt, stat, timer, dwords, idx; |
46 | uint16_t mb[4]; | 46 | uint16_t mb0; |
47 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 47 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
48 | dma_addr_t dump_dma = ha->gid_list_dma; | ||
49 | uint32_t *dump = (uint32_t *)ha->gid_list; | ||
48 | 50 | ||
49 | rval = QLA_SUCCESS; | 51 | rval = QLA_SUCCESS; |
50 | risc_address = ext_mem_cnt = 0; | 52 | mb0 = 0; |
51 | memset(mb, 0, sizeof(mb)); | ||
52 | 53 | ||
53 | /* Code RAM. */ | 54 | WRT_REG_WORD(®->mailbox0, MBC_DUMP_RISC_RAM_EXTENDED); |
54 | risc_address = 0x20000; | ||
55 | WRT_REG_WORD(®->mailbox0, MBC_READ_RAM_EXTENDED); | ||
56 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | 55 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); |
57 | 56 | ||
58 | for (cnt = 0; cnt < cram_size / 4 && rval == QLA_SUCCESS; | 57 | dwords = GID_LIST_SIZE / 4; |
59 | cnt++, risc_address++) { | 58 | for (cnt = 0; cnt < ram_dwords && rval == QLA_SUCCESS; |
60 | WRT_REG_WORD(®->mailbox1, LSW(risc_address)); | 59 | cnt += dwords, addr += dwords) { |
61 | WRT_REG_WORD(®->mailbox8, MSW(risc_address)); | 60 | if (cnt + dwords > ram_dwords) |
62 | RD_REG_WORD(®->mailbox8); | 61 | dwords = ram_dwords - cnt; |
63 | WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); | ||
64 | |||
65 | for (timer = 6000000; timer; timer--) { | ||
66 | /* Check for pending interrupts. */ | ||
67 | stat = RD_REG_DWORD(®->host_status); | ||
68 | if (stat & HSRX_RISC_INT) { | ||
69 | stat &= 0xff; | ||
70 | 62 | ||
71 | if (stat == 0x1 || stat == 0x2 || | 63 | WRT_REG_WORD(®->mailbox1, LSW(addr)); |
72 | stat == 0x10 || stat == 0x11) { | 64 | WRT_REG_WORD(®->mailbox8, MSW(addr)); |
73 | set_bit(MBX_INTERRUPT, | ||
74 | &ha->mbx_cmd_flags); | ||
75 | 65 | ||
76 | mb[0] = RD_REG_WORD(®->mailbox0); | 66 | WRT_REG_WORD(®->mailbox2, MSW(dump_dma)); |
77 | mb[2] = RD_REG_WORD(®->mailbox2); | 67 | WRT_REG_WORD(®->mailbox3, LSW(dump_dma)); |
78 | mb[3] = RD_REG_WORD(®->mailbox3); | 68 | WRT_REG_WORD(®->mailbox6, MSW(MSD(dump_dma))); |
69 | WRT_REG_WORD(®->mailbox7, LSW(MSD(dump_dma))); | ||
79 | 70 | ||
80 | WRT_REG_DWORD(®->hccr, | 71 | WRT_REG_WORD(®->mailbox4, MSW(dwords)); |
81 | HCCRX_CLR_RISC_INT); | 72 | WRT_REG_WORD(®->mailbox5, LSW(dwords)); |
82 | RD_REG_DWORD(®->hccr); | ||
83 | break; | ||
84 | } | ||
85 | |||
86 | /* Clear this intr; it wasn't a mailbox intr */ | ||
87 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | ||
88 | RD_REG_DWORD(®->hccr); | ||
89 | } | ||
90 | udelay(5); | ||
91 | } | ||
92 | |||
93 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { | ||
94 | rval = mb[0] & MBS_MASK; | ||
95 | code_ram[cnt] = htonl((mb[3] << 16) | mb[2]); | ||
96 | } else { | ||
97 | rval = QLA_FUNCTION_FAILED; | ||
98 | } | ||
99 | } | ||
100 | |||
101 | if (rval == QLA_SUCCESS) { | ||
102 | /* External Memory. */ | ||
103 | risc_address = 0x100000; | ||
104 | ext_mem_cnt = ha->fw_memory_size - 0x100000 + 1; | ||
105 | WRT_REG_WORD(®->mailbox0, MBC_READ_RAM_EXTENDED); | ||
106 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | ||
107 | } | ||
108 | for (cnt = 0; cnt < ext_mem_cnt && rval == QLA_SUCCESS; | ||
109 | cnt++, risc_address++) { | ||
110 | WRT_REG_WORD(®->mailbox1, LSW(risc_address)); | ||
111 | WRT_REG_WORD(®->mailbox8, MSW(risc_address)); | ||
112 | RD_REG_WORD(®->mailbox8); | ||
113 | WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); | 73 | WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); |
114 | 74 | ||
115 | for (timer = 6000000; timer; timer--) { | 75 | for (timer = 6000000; timer; timer--) { |
@@ -123,9 +83,7 @@ qla24xx_dump_memory(scsi_qla_host_t *ha, uint32_t *code_ram, | |||
123 | set_bit(MBX_INTERRUPT, | 83 | set_bit(MBX_INTERRUPT, |
124 | &ha->mbx_cmd_flags); | 84 | &ha->mbx_cmd_flags); |
125 | 85 | ||
126 | mb[0] = RD_REG_WORD(®->mailbox0); | 86 | mb0 = RD_REG_WORD(®->mailbox0); |
127 | mb[2] = RD_REG_WORD(®->mailbox2); | ||
128 | mb[3] = RD_REG_WORD(®->mailbox3); | ||
129 | 87 | ||
130 | WRT_REG_DWORD(®->hccr, | 88 | WRT_REG_DWORD(®->hccr, |
131 | HCCRX_CLR_RISC_INT); | 89 | HCCRX_CLR_RISC_INT); |
@@ -141,17 +99,34 @@ qla24xx_dump_memory(scsi_qla_host_t *ha, uint32_t *code_ram, | |||
141 | } | 99 | } |
142 | 100 | ||
143 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { | 101 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { |
144 | rval = mb[0] & MBS_MASK; | 102 | rval = mb0 & MBS_MASK; |
145 | ext_mem[cnt] = htonl((mb[3] << 16) | mb[2]); | 103 | for (idx = 0; idx < dwords; idx++) |
104 | ram[cnt + idx] = swab32(dump[idx]); | ||
146 | } else { | 105 | } else { |
147 | rval = QLA_FUNCTION_FAILED; | 106 | rval = QLA_FUNCTION_FAILED; |
148 | } | 107 | } |
149 | } | 108 | } |
150 | 109 | ||
151 | *nxt = rval == QLA_SUCCESS ? &ext_mem[cnt]: NULL; | 110 | *nxt = rval == QLA_SUCCESS ? &ram[cnt]: NULL; |
152 | return rval; | 111 | return rval; |
153 | } | 112 | } |
154 | 113 | ||
114 | static int | ||
115 | qla24xx_dump_memory(scsi_qla_host_t *ha, uint32_t *code_ram, | ||
116 | uint32_t cram_size, void **nxt) | ||
117 | { | ||
118 | int rval; | ||
119 | |||
120 | /* Code RAM. */ | ||
121 | rval = qla24xx_dump_ram(ha, 0x20000, code_ram, cram_size / 4, nxt); | ||
122 | if (rval != QLA_SUCCESS) | ||
123 | return rval; | ||
124 | |||
125 | /* External Memory. */ | ||
126 | return qla24xx_dump_ram(ha, 0x100000, *nxt, | ||
127 | ha->fw_memory_size - 0x100000 + 1, nxt); | ||
128 | } | ||
129 | |||
155 | static uint32_t * | 130 | static uint32_t * |
156 | qla24xx_read_window(struct device_reg_24xx __iomem *reg, uint32_t iobase, | 131 | qla24xx_read_window(struct device_reg_24xx __iomem *reg, uint32_t iobase, |
157 | uint32_t count, uint32_t *buf) | 132 | uint32_t count, uint32_t *buf) |
@@ -239,6 +214,90 @@ qla24xx_soft_reset(scsi_qla_host_t *ha) | |||
239 | return rval; | 214 | return rval; |
240 | } | 215 | } |
241 | 216 | ||
217 | static int | ||
218 | qla2xxx_dump_ram(scsi_qla_host_t *ha, uint32_t addr, uint16_t *ram, | ||
219 | uint16_t ram_words, void **nxt) | ||
220 | { | ||
221 | int rval; | ||
222 | uint32_t cnt, stat, timer, words, idx; | ||
223 | uint16_t mb0; | ||
224 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
225 | dma_addr_t dump_dma = ha->gid_list_dma; | ||
226 | uint16_t *dump = (uint16_t *)ha->gid_list; | ||
227 | |||
228 | rval = QLA_SUCCESS; | ||
229 | mb0 = 0; | ||
230 | |||
231 | WRT_MAILBOX_REG(ha, reg, 0, MBC_DUMP_RISC_RAM_EXTENDED); | ||
232 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | ||
233 | |||
234 | words = GID_LIST_SIZE / 2; | ||
235 | for (cnt = 0; cnt < ram_words && rval == QLA_SUCCESS; | ||
236 | cnt += words, addr += words) { | ||
237 | if (cnt + words > ram_words) | ||
238 | words = ram_words - cnt; | ||
239 | |||
240 | WRT_MAILBOX_REG(ha, reg, 1, LSW(addr)); | ||
241 | WRT_MAILBOX_REG(ha, reg, 8, MSW(addr)); | ||
242 | |||
243 | WRT_MAILBOX_REG(ha, reg, 2, MSW(dump_dma)); | ||
244 | WRT_MAILBOX_REG(ha, reg, 3, LSW(dump_dma)); | ||
245 | WRT_MAILBOX_REG(ha, reg, 6, MSW(MSD(dump_dma))); | ||
246 | WRT_MAILBOX_REG(ha, reg, 7, LSW(MSD(dump_dma))); | ||
247 | |||
248 | WRT_MAILBOX_REG(ha, reg, 4, words); | ||
249 | WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT); | ||
250 | |||
251 | for (timer = 6000000; timer; timer--) { | ||
252 | /* Check for pending interrupts. */ | ||
253 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | ||
254 | if (stat & HSR_RISC_INT) { | ||
255 | stat &= 0xff; | ||
256 | |||
257 | if (stat == 0x1 || stat == 0x2) { | ||
258 | set_bit(MBX_INTERRUPT, | ||
259 | &ha->mbx_cmd_flags); | ||
260 | |||
261 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
262 | |||
263 | /* Release mailbox registers. */ | ||
264 | WRT_REG_WORD(®->semaphore, 0); | ||
265 | WRT_REG_WORD(®->hccr, | ||
266 | HCCR_CLR_RISC_INT); | ||
267 | RD_REG_WORD(®->hccr); | ||
268 | break; | ||
269 | } else if (stat == 0x10 || stat == 0x11) { | ||
270 | set_bit(MBX_INTERRUPT, | ||
271 | &ha->mbx_cmd_flags); | ||
272 | |||
273 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
274 | |||
275 | WRT_REG_WORD(®->hccr, | ||
276 | HCCR_CLR_RISC_INT); | ||
277 | RD_REG_WORD(®->hccr); | ||
278 | break; | ||
279 | } | ||
280 | |||
281 | /* clear this intr; it wasn't a mailbox intr */ | ||
282 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | ||
283 | RD_REG_WORD(®->hccr); | ||
284 | } | ||
285 | udelay(5); | ||
286 | } | ||
287 | |||
288 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { | ||
289 | rval = mb0 & MBS_MASK; | ||
290 | for (idx = 0; idx < words; idx++) | ||
291 | ram[cnt + idx] = swab16(dump[idx]); | ||
292 | } else { | ||
293 | rval = QLA_FUNCTION_FAILED; | ||
294 | } | ||
295 | } | ||
296 | |||
297 | *nxt = rval == QLA_SUCCESS ? &ram[cnt]: NULL; | ||
298 | return rval; | ||
299 | } | ||
300 | |||
242 | static inline void | 301 | static inline void |
243 | qla2xxx_read_window(struct device_reg_2xxx __iomem *reg, uint32_t count, | 302 | qla2xxx_read_window(struct device_reg_2xxx __iomem *reg, uint32_t count, |
244 | uint16_t *buf) | 303 | uint16_t *buf) |
@@ -258,19 +317,14 @@ void | |||
258 | qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked) | 317 | qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked) |
259 | { | 318 | { |
260 | int rval; | 319 | int rval; |
261 | uint32_t cnt, timer; | 320 | uint32_t cnt; |
262 | uint32_t risc_address; | ||
263 | uint16_t mb0, mb2; | ||
264 | 321 | ||
265 | uint32_t stat; | ||
266 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 322 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
267 | uint16_t __iomem *dmp_reg; | 323 | uint16_t __iomem *dmp_reg; |
268 | unsigned long flags; | 324 | unsigned long flags; |
269 | struct qla2300_fw_dump *fw; | 325 | struct qla2300_fw_dump *fw; |
270 | uint32_t data_ram_cnt; | 326 | void *nxt; |
271 | 327 | ||
272 | risc_address = data_ram_cnt = 0; | ||
273 | mb0 = mb2 = 0; | ||
274 | flags = 0; | 328 | flags = 0; |
275 | 329 | ||
276 | if (!hardware_locked) | 330 | if (!hardware_locked) |
@@ -388,185 +442,23 @@ qla2300_fw_dump(scsi_qla_host_t *ha, int hardware_locked) | |||
388 | } | 442 | } |
389 | } | 443 | } |
390 | 444 | ||
391 | if (rval == QLA_SUCCESS) { | 445 | /* Get RISC SRAM. */ |
392 | /* Get RISC SRAM. */ | 446 | if (rval == QLA_SUCCESS) |
393 | risc_address = 0x800; | 447 | rval = qla2xxx_dump_ram(ha, 0x800, fw->risc_ram, |
394 | WRT_MAILBOX_REG(ha, reg, 0, MBC_READ_RAM_WORD); | 448 | sizeof(fw->risc_ram) / 2, &nxt); |
395 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | ||
396 | } | ||
397 | for (cnt = 0; cnt < sizeof(fw->risc_ram) / 2 && rval == QLA_SUCCESS; | ||
398 | cnt++, risc_address++) { | ||
399 | WRT_MAILBOX_REG(ha, reg, 1, (uint16_t)risc_address); | ||
400 | WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT); | ||
401 | |||
402 | for (timer = 6000000; timer; timer--) { | ||
403 | /* Check for pending interrupts. */ | ||
404 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | ||
405 | if (stat & HSR_RISC_INT) { | ||
406 | stat &= 0xff; | ||
407 | |||
408 | if (stat == 0x1 || stat == 0x2) { | ||
409 | set_bit(MBX_INTERRUPT, | ||
410 | &ha->mbx_cmd_flags); | ||
411 | |||
412 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
413 | mb2 = RD_MAILBOX_REG(ha, reg, 2); | ||
414 | |||
415 | /* Release mailbox registers. */ | ||
416 | WRT_REG_WORD(®->semaphore, 0); | ||
417 | WRT_REG_WORD(®->hccr, | ||
418 | HCCR_CLR_RISC_INT); | ||
419 | RD_REG_WORD(®->hccr); | ||
420 | break; | ||
421 | } else if (stat == 0x10 || stat == 0x11) { | ||
422 | set_bit(MBX_INTERRUPT, | ||
423 | &ha->mbx_cmd_flags); | ||
424 | |||
425 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
426 | mb2 = RD_MAILBOX_REG(ha, reg, 2); | ||
427 | |||
428 | WRT_REG_WORD(®->hccr, | ||
429 | HCCR_CLR_RISC_INT); | ||
430 | RD_REG_WORD(®->hccr); | ||
431 | break; | ||
432 | } | ||
433 | |||
434 | /* clear this intr; it wasn't a mailbox intr */ | ||
435 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | ||
436 | RD_REG_WORD(®->hccr); | ||
437 | } | ||
438 | udelay(5); | ||
439 | } | ||
440 | |||
441 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { | ||
442 | rval = mb0 & MBS_MASK; | ||
443 | fw->risc_ram[cnt] = htons(mb2); | ||
444 | } else { | ||
445 | rval = QLA_FUNCTION_FAILED; | ||
446 | } | ||
447 | } | ||
448 | |||
449 | if (rval == QLA_SUCCESS) { | ||
450 | /* Get stack SRAM. */ | ||
451 | risc_address = 0x10000; | ||
452 | WRT_MAILBOX_REG(ha, reg, 0, MBC_READ_RAM_EXTENDED); | ||
453 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | ||
454 | } | ||
455 | for (cnt = 0; cnt < sizeof(fw->stack_ram) / 2 && rval == QLA_SUCCESS; | ||
456 | cnt++, risc_address++) { | ||
457 | WRT_MAILBOX_REG(ha, reg, 1, LSW(risc_address)); | ||
458 | WRT_MAILBOX_REG(ha, reg, 8, MSW(risc_address)); | ||
459 | WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT); | ||
460 | |||
461 | for (timer = 6000000; timer; timer--) { | ||
462 | /* Check for pending interrupts. */ | ||
463 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | ||
464 | if (stat & HSR_RISC_INT) { | ||
465 | stat &= 0xff; | ||
466 | |||
467 | if (stat == 0x1 || stat == 0x2) { | ||
468 | set_bit(MBX_INTERRUPT, | ||
469 | &ha->mbx_cmd_flags); | ||
470 | |||
471 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
472 | mb2 = RD_MAILBOX_REG(ha, reg, 2); | ||
473 | |||
474 | /* Release mailbox registers. */ | ||
475 | WRT_REG_WORD(®->semaphore, 0); | ||
476 | WRT_REG_WORD(®->hccr, | ||
477 | HCCR_CLR_RISC_INT); | ||
478 | RD_REG_WORD(®->hccr); | ||
479 | break; | ||
480 | } else if (stat == 0x10 || stat == 0x11) { | ||
481 | set_bit(MBX_INTERRUPT, | ||
482 | &ha->mbx_cmd_flags); | ||
483 | |||
484 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
485 | mb2 = RD_MAILBOX_REG(ha, reg, 2); | ||
486 | |||
487 | WRT_REG_WORD(®->hccr, | ||
488 | HCCR_CLR_RISC_INT); | ||
489 | RD_REG_WORD(®->hccr); | ||
490 | break; | ||
491 | } | ||
492 | |||
493 | /* clear this intr; it wasn't a mailbox intr */ | ||
494 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | ||
495 | RD_REG_WORD(®->hccr); | ||
496 | } | ||
497 | udelay(5); | ||
498 | } | ||
499 | |||
500 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { | ||
501 | rval = mb0 & MBS_MASK; | ||
502 | fw->stack_ram[cnt] = htons(mb2); | ||
503 | } else { | ||
504 | rval = QLA_FUNCTION_FAILED; | ||
505 | } | ||
506 | } | ||
507 | |||
508 | if (rval == QLA_SUCCESS) { | ||
509 | /* Get data SRAM. */ | ||
510 | risc_address = 0x11000; | ||
511 | data_ram_cnt = ha->fw_memory_size - risc_address + 1; | ||
512 | WRT_MAILBOX_REG(ha, reg, 0, MBC_READ_RAM_EXTENDED); | ||
513 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); | ||
514 | } | ||
515 | for (cnt = 0; cnt < data_ram_cnt && rval == QLA_SUCCESS; | ||
516 | cnt++, risc_address++) { | ||
517 | WRT_MAILBOX_REG(ha, reg, 1, LSW(risc_address)); | ||
518 | WRT_MAILBOX_REG(ha, reg, 8, MSW(risc_address)); | ||
519 | WRT_REG_WORD(®->hccr, HCCR_SET_HOST_INT); | ||
520 | |||
521 | for (timer = 6000000; timer; timer--) { | ||
522 | /* Check for pending interrupts. */ | ||
523 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | ||
524 | if (stat & HSR_RISC_INT) { | ||
525 | stat &= 0xff; | ||
526 | |||
527 | if (stat == 0x1 || stat == 0x2) { | ||
528 | set_bit(MBX_INTERRUPT, | ||
529 | &ha->mbx_cmd_flags); | ||
530 | |||
531 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
532 | mb2 = RD_MAILBOX_REG(ha, reg, 2); | ||
533 | |||
534 | /* Release mailbox registers. */ | ||
535 | WRT_REG_WORD(®->semaphore, 0); | ||
536 | WRT_REG_WORD(®->hccr, | ||
537 | HCCR_CLR_RISC_INT); | ||
538 | RD_REG_WORD(®->hccr); | ||
539 | break; | ||
540 | } else if (stat == 0x10 || stat == 0x11) { | ||
541 | set_bit(MBX_INTERRUPT, | ||
542 | &ha->mbx_cmd_flags); | ||
543 | |||
544 | mb0 = RD_MAILBOX_REG(ha, reg, 0); | ||
545 | mb2 = RD_MAILBOX_REG(ha, reg, 2); | ||
546 | |||
547 | WRT_REG_WORD(®->hccr, | ||
548 | HCCR_CLR_RISC_INT); | ||
549 | RD_REG_WORD(®->hccr); | ||
550 | break; | ||
551 | } | ||
552 | 449 | ||
553 | /* clear this intr; it wasn't a mailbox intr */ | 450 | /* Get stack SRAM. */ |
554 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | 451 | if (rval == QLA_SUCCESS) |
555 | RD_REG_WORD(®->hccr); | 452 | rval = qla2xxx_dump_ram(ha, 0x10000, fw->stack_ram, |
556 | } | 453 | sizeof(fw->stack_ram) / 2, &nxt); |
557 | udelay(5); | ||
558 | } | ||
559 | 454 | ||
560 | if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { | 455 | /* Get data SRAM. */ |
561 | rval = mb0 & MBS_MASK; | 456 | if (rval == QLA_SUCCESS) |
562 | fw->data_ram[cnt] = htons(mb2); | 457 | rval = qla2xxx_dump_ram(ha, 0x11000, fw->data_ram, |
563 | } else { | 458 | ha->fw_memory_size - 0x11000 + 1, &nxt); |
564 | rval = QLA_FUNCTION_FAILED; | ||
565 | } | ||
566 | } | ||
567 | 459 | ||
568 | if (rval == QLA_SUCCESS) | 460 | if (rval == QLA_SUCCESS) |
569 | qla2xxx_copy_queues(ha, &fw->data_ram[cnt]); | 461 | qla2xxx_copy_queues(ha, nxt); |
570 | 462 | ||
571 | if (rval != QLA_SUCCESS) { | 463 | if (rval != QLA_SUCCESS) { |
572 | qla_printk(KERN_WARNING, ha, | 464 | qla_printk(KERN_WARNING, ha, |
@@ -1010,7 +902,7 @@ qla24xx_fw_dump(scsi_qla_host_t *ha, int hardware_locked) | |||
1010 | goto qla24xx_fw_dump_failed_0; | 902 | goto qla24xx_fw_dump_failed_0; |
1011 | 903 | ||
1012 | rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), | 904 | rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), |
1013 | fw->ext_mem, &nxt); | 905 | &nxt); |
1014 | if (rval != QLA_SUCCESS) | 906 | if (rval != QLA_SUCCESS) |
1015 | goto qla24xx_fw_dump_failed_0; | 907 | goto qla24xx_fw_dump_failed_0; |
1016 | 908 | ||
@@ -1318,7 +1210,7 @@ qla25xx_fw_dump(scsi_qla_host_t *ha, int hardware_locked) | |||
1318 | goto qla25xx_fw_dump_failed_0; | 1210 | goto qla25xx_fw_dump_failed_0; |
1319 | 1211 | ||
1320 | rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), | 1212 | rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), |
1321 | fw->ext_mem, &nxt); | 1213 | &nxt); |
1322 | if (rval != QLA_SUCCESS) | 1214 | if (rval != QLA_SUCCESS) |
1323 | goto qla25xx_fw_dump_failed_0; | 1215 | goto qla25xx_fw_dump_failed_0; |
1324 | 1216 | ||
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h index 078f2a15f40b..cf194517400d 100644 --- a/drivers/scsi/qla2xxx/qla_fw.h +++ b/drivers/scsi/qla2xxx/qla_fw.h | |||
@@ -1036,22 +1036,6 @@ struct mid_db_entry_24xx { | |||
1036 | uint8_t reserved_1; | 1036 | uint8_t reserved_1; |
1037 | }; | 1037 | }; |
1038 | 1038 | ||
1039 | /* | ||
1040 | * Virtual Fabric ID type definition. | ||
1041 | */ | ||
1042 | typedef struct vf_id { | ||
1043 | uint16_t id : 12; | ||
1044 | uint16_t priority : 4; | ||
1045 | } vf_id_t; | ||
1046 | |||
1047 | /* | ||
1048 | * Virtual Fabric HopCt type definition. | ||
1049 | */ | ||
1050 | typedef struct vf_hopct { | ||
1051 | uint16_t reserved : 8; | ||
1052 | uint16_t hopct : 8; | ||
1053 | } vf_hopct_t; | ||
1054 | |||
1055 | /* | 1039 | /* |
1056 | * Virtual Port Control IOCB | 1040 | * Virtual Port Control IOCB |
1057 | */ | 1041 | */ |
@@ -1082,10 +1066,10 @@ struct vp_ctrl_entry_24xx { | |||
1082 | 1066 | ||
1083 | uint8_t vp_idx_map[16]; | 1067 | uint8_t vp_idx_map[16]; |
1084 | uint16_t flags; | 1068 | uint16_t flags; |
1085 | struct vf_id id; | 1069 | uint16_t id; |
1086 | uint16_t reserved_4; | 1070 | uint16_t reserved_4; |
1087 | struct vf_hopct hopct; | 1071 | uint16_t hopct; |
1088 | uint8_t reserved_5[8]; | 1072 | uint8_t reserved_5[24]; |
1089 | }; | 1073 | }; |
1090 | 1074 | ||
1091 | /* | 1075 | /* |
@@ -1132,9 +1116,9 @@ struct vp_config_entry_24xx { | |||
1132 | uint16_t reserved_vp2; | 1116 | uint16_t reserved_vp2; |
1133 | uint8_t port_name_idx2[WWN_SIZE]; | 1117 | uint8_t port_name_idx2[WWN_SIZE]; |
1134 | uint8_t node_name_idx2[WWN_SIZE]; | 1118 | uint8_t node_name_idx2[WWN_SIZE]; |
1135 | struct vf_id id; | 1119 | uint16_t id; |
1136 | uint16_t reserved_4; | 1120 | uint16_t reserved_4; |
1137 | struct vf_hopct hopct; | 1121 | uint16_t hopct; |
1138 | uint8_t reserved_5; | 1122 | uint8_t reserved_5; |
1139 | }; | 1123 | }; |
1140 | 1124 | ||
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h index 76eb4fecce65..f8827068d30f 100644 --- a/drivers/scsi/qla2xxx/qla_gbl.h +++ b/drivers/scsi/qla2xxx/qla_gbl.h | |||
@@ -152,10 +152,6 @@ extern int | |||
152 | qla2x00_issue_iocb(scsi_qla_host_t *, void *, dma_addr_t, size_t); | 152 | qla2x00_issue_iocb(scsi_qla_host_t *, void *, dma_addr_t, size_t); |
153 | 153 | ||
154 | extern int | 154 | extern int |
155 | qla2x00_issue_iocb_timeout(scsi_qla_host_t *, void *, dma_addr_t, size_t, | ||
156 | uint32_t); | ||
157 | |||
158 | extern int | ||
159 | qla2x00_abort_command(scsi_qla_host_t *, srb_t *); | 155 | qla2x00_abort_command(scsi_qla_host_t *, srb_t *); |
160 | 156 | ||
161 | extern int | 157 | extern int |
diff --git a/drivers/scsi/qla2xxx/qla_gs.c b/drivers/scsi/qla2xxx/qla_gs.c index 750d7ef83aae..4cb80b476c85 100644 --- a/drivers/scsi/qla2xxx/qla_gs.c +++ b/drivers/scsi/qla2xxx/qla_gs.c | |||
@@ -1583,8 +1583,8 @@ qla2x00_fdmi_rpa(scsi_qla_host_t *ha) | |||
1583 | eiter->type = __constant_cpu_to_be16(FDMI_PORT_MAX_FRAME_SIZE); | 1583 | eiter->type = __constant_cpu_to_be16(FDMI_PORT_MAX_FRAME_SIZE); |
1584 | eiter->len = __constant_cpu_to_be16(4 + 4); | 1584 | eiter->len = __constant_cpu_to_be16(4 + 4); |
1585 | max_frame_size = IS_FWI2_CAPABLE(ha) ? | 1585 | max_frame_size = IS_FWI2_CAPABLE(ha) ? |
1586 | (uint32_t) icb24->frame_payload_size: | 1586 | le16_to_cpu(icb24->frame_payload_size): |
1587 | (uint32_t) ha->init_cb->frame_payload_size; | 1587 | le16_to_cpu(ha->init_cb->frame_payload_size); |
1588 | eiter->a.max_frame_size = cpu_to_be32(max_frame_size); | 1588 | eiter->a.max_frame_size = cpu_to_be32(max_frame_size); |
1589 | size += 4 + 4; | 1589 | size += 4 + 4; |
1590 | 1590 | ||
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 01e26087c1dd..bbbc5a632a1d 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -3645,7 +3645,7 @@ qla24xx_nvram_config(scsi_qla_host_t *ha) | |||
3645 | if (le16_to_cpu(nv->login_timeout) < 4) | 3645 | if (le16_to_cpu(nv->login_timeout) < 4) |
3646 | nv->login_timeout = __constant_cpu_to_le16(4); | 3646 | nv->login_timeout = __constant_cpu_to_le16(4); |
3647 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | 3647 | ha->login_timeout = le16_to_cpu(nv->login_timeout); |
3648 | icb->login_timeout = cpu_to_le16(nv->login_timeout); | 3648 | icb->login_timeout = nv->login_timeout; |
3649 | 3649 | ||
3650 | /* Set minimum RATOV to 100 tenths of a second. */ | 3650 | /* Set minimum RATOV to 100 tenths of a second. */ |
3651 | ha->r_a_tov = 100; | 3651 | ha->r_a_tov = 100; |
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index 285479b62d8f..5d9a64a7879b 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
@@ -409,6 +409,7 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint16_t *mb) | |||
409 | } | 409 | } |
410 | 410 | ||
411 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); | 411 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); |
412 | set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags); | ||
412 | 413 | ||
413 | ha->flags.management_server_logged_in = 0; | 414 | ha->flags.management_server_logged_in = 0; |
414 | qla2x00_post_aen_work(ha, FCH_EVT_LIP, mb[1]); | 415 | qla2x00_post_aen_work(ha, FCH_EVT_LIP, mb[1]); |
@@ -454,8 +455,6 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint16_t *mb) | |||
454 | 455 | ||
455 | ha->flags.management_server_logged_in = 0; | 456 | ha->flags.management_server_logged_in = 0; |
456 | ha->link_data_rate = PORT_SPEED_UNKNOWN; | 457 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
457 | if (ql2xfdmienable) | ||
458 | set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags); | ||
459 | qla2x00_post_aen_work(ha, FCH_EVT_LINKDOWN, 0); | 458 | qla2x00_post_aen_work(ha, FCH_EVT_LINKDOWN, 0); |
460 | break; | 459 | break; |
461 | 460 | ||
@@ -511,6 +510,7 @@ qla2x00_async_event(scsi_qla_host_t *ha, uint16_t *mb) | |||
511 | set_bit(RESET_MARKER_NEEDED, &ha->dpc_flags); | 510 | set_bit(RESET_MARKER_NEEDED, &ha->dpc_flags); |
512 | } | 511 | } |
513 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); | 512 | set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); |
513 | set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags); | ||
514 | 514 | ||
515 | ha->flags.gpsc_supported = 1; | 515 | ha->flags.gpsc_supported = 1; |
516 | ha->flags.management_server_logged_in = 0; | 516 | ha->flags.management_server_logged_in = 0; |
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index 7d0a8a4c7719..210060420809 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -681,7 +681,7 @@ qla2x00_verify_checksum(scsi_qla_host_t *ha, uint32_t risc_addr) | |||
681 | * Context: | 681 | * Context: |
682 | * Kernel context. | 682 | * Kernel context. |
683 | */ | 683 | */ |
684 | int | 684 | static int |
685 | qla2x00_issue_iocb_timeout(scsi_qla_host_t *ha, void *buffer, | 685 | qla2x00_issue_iocb_timeout(scsi_qla_host_t *ha, void *buffer, |
686 | dma_addr_t phys_addr, size_t size, uint32_t tov) | 686 | dma_addr_t phys_addr, size_t size, uint32_t tov) |
687 | { | 687 | { |
@@ -784,7 +784,6 @@ qla2x00_abort_command(scsi_qla_host_t *ha, srb_t *sp) | |||
784 | DEBUG2_3_11(printk("qla2x00_abort_command(%ld): failed=%x.\n", | 784 | DEBUG2_3_11(printk("qla2x00_abort_command(%ld): failed=%x.\n", |
785 | ha->host_no, rval)); | 785 | ha->host_no, rval)); |
786 | } else { | 786 | } else { |
787 | sp->flags |= SRB_ABORT_PENDING; | ||
788 | DEBUG11(printk("qla2x00_abort_command(%ld): done.\n", | 787 | DEBUG11(printk("qla2x00_abort_command(%ld): done.\n", |
789 | ha->host_no)); | 788 | ha->host_no)); |
790 | } | 789 | } |
@@ -1469,7 +1468,7 @@ qla24xx_login_fabric(scsi_qla_host_t *ha, uint16_t loop_id, uint8_t domain, | |||
1469 | lg->port_id[0] = al_pa; | 1468 | lg->port_id[0] = al_pa; |
1470 | lg->port_id[1] = area; | 1469 | lg->port_id[1] = area; |
1471 | lg->port_id[2] = domain; | 1470 | lg->port_id[2] = domain; |
1472 | lg->vp_index = cpu_to_le16(ha->vp_idx); | 1471 | lg->vp_index = ha->vp_idx; |
1473 | rval = qla2x00_issue_iocb(ha, lg, lg_dma, 0); | 1472 | rval = qla2x00_issue_iocb(ha, lg, lg_dma, 0); |
1474 | if (rval != QLA_SUCCESS) { | 1473 | if (rval != QLA_SUCCESS) { |
1475 | DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB " | 1474 | DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB " |
@@ -1724,7 +1723,7 @@ qla24xx_fabric_logout(scsi_qla_host_t *ha, uint16_t loop_id, uint8_t domain, | |||
1724 | lg->port_id[0] = al_pa; | 1723 | lg->port_id[0] = al_pa; |
1725 | lg->port_id[1] = area; | 1724 | lg->port_id[1] = area; |
1726 | lg->port_id[2] = domain; | 1725 | lg->port_id[2] = domain; |
1727 | lg->vp_index = cpu_to_le16(ha->vp_idx); | 1726 | lg->vp_index = ha->vp_idx; |
1728 | rval = qla2x00_issue_iocb(ha, lg, lg_dma, 0); | 1727 | rval = qla2x00_issue_iocb(ha, lg, lg_dma, 0); |
1729 | if (rval != QLA_SUCCESS) { | 1728 | if (rval != QLA_SUCCESS) { |
1730 | DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB " | 1729 | DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB " |
@@ -2210,7 +2209,6 @@ qla24xx_abort_command(scsi_qla_host_t *ha, srb_t *sp) | |||
2210 | rval = QLA_FUNCTION_FAILED; | 2209 | rval = QLA_FUNCTION_FAILED; |
2211 | } else { | 2210 | } else { |
2212 | DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no)); | 2211 | DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no)); |
2213 | sp->flags |= SRB_ABORT_PENDING; | ||
2214 | } | 2212 | } |
2215 | 2213 | ||
2216 | dma_pool_free(ha->s_dma_pool, abt, abt_dma); | 2214 | dma_pool_free(ha->s_dma_pool, abt, abt_dma); |
@@ -2644,12 +2642,11 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *ha, | |||
2644 | struct vp_rpt_id_entry_24xx *rptid_entry) | 2642 | struct vp_rpt_id_entry_24xx *rptid_entry) |
2645 | { | 2643 | { |
2646 | uint8_t vp_idx; | 2644 | uint8_t vp_idx; |
2645 | uint16_t stat = le16_to_cpu(rptid_entry->vp_idx); | ||
2647 | scsi_qla_host_t *vha; | 2646 | scsi_qla_host_t *vha; |
2648 | 2647 | ||
2649 | if (rptid_entry->entry_status != 0) | 2648 | if (rptid_entry->entry_status != 0) |
2650 | return; | 2649 | return; |
2651 | if (rptid_entry->entry_status != __constant_cpu_to_le16(CS_COMPLETE)) | ||
2652 | return; | ||
2653 | 2650 | ||
2654 | if (rptid_entry->format == 0) { | 2651 | if (rptid_entry->format == 0) { |
2655 | DEBUG15(printk("%s:format 0 : scsi(%ld) number of VPs setup %d," | 2652 | DEBUG15(printk("%s:format 0 : scsi(%ld) number of VPs setup %d," |
@@ -2659,17 +2656,17 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *ha, | |||
2659 | rptid_entry->port_id[2], rptid_entry->port_id[1], | 2656 | rptid_entry->port_id[2], rptid_entry->port_id[1], |
2660 | rptid_entry->port_id[0])); | 2657 | rptid_entry->port_id[0])); |
2661 | } else if (rptid_entry->format == 1) { | 2658 | } else if (rptid_entry->format == 1) { |
2662 | vp_idx = LSB(rptid_entry->vp_idx); | 2659 | vp_idx = LSB(stat); |
2663 | DEBUG15(printk("%s:format 1: scsi(%ld): VP[%d] enabled " | 2660 | DEBUG15(printk("%s:format 1: scsi(%ld): VP[%d] enabled " |
2664 | "- status %d - " | 2661 | "- status %d - " |
2665 | "with port id %02x%02x%02x\n",__func__,ha->host_no, | 2662 | "with port id %02x%02x%02x\n",__func__,ha->host_no, |
2666 | vp_idx, MSB(rptid_entry->vp_idx), | 2663 | vp_idx, MSB(stat), |
2667 | rptid_entry->port_id[2], rptid_entry->port_id[1], | 2664 | rptid_entry->port_id[2], rptid_entry->port_id[1], |
2668 | rptid_entry->port_id[0])); | 2665 | rptid_entry->port_id[0])); |
2669 | if (vp_idx == 0) | 2666 | if (vp_idx == 0) |
2670 | return; | 2667 | return; |
2671 | 2668 | ||
2672 | if (MSB(rptid_entry->vp_idx) == 1) | 2669 | if (MSB(stat) == 1) |
2673 | return; | 2670 | return; |
2674 | 2671 | ||
2675 | list_for_each_entry(vha, &ha->vp_list, vp_list) | 2672 | list_for_each_entry(vha, &ha->vp_list, vp_list) |
@@ -2982,8 +2979,8 @@ qla84xx_verify_chip(struct scsi_qla_host *ha, uint16_t *status) | |||
2982 | /* We update the firmware with only one data sequence. */ | 2979 | /* We update the firmware with only one data sequence. */ |
2983 | options |= VCO_END_OF_DATA; | 2980 | options |= VCO_END_OF_DATA; |
2984 | 2981 | ||
2985 | retry = 0; | ||
2986 | do { | 2982 | do { |
2983 | retry = 0; | ||
2987 | memset(mn, 0, sizeof(*mn)); | 2984 | memset(mn, 0, sizeof(*mn)); |
2988 | mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE; | 2985 | mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE; |
2989 | mn->p.req.entry_count = 1; | 2986 | mn->p.req.entry_count = 1; |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 8b33b163b1d4..3223fd16bcfe 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -67,7 +67,7 @@ static void qla2x00_free_device(scsi_qla_host_t *); | |||
67 | 67 | ||
68 | static void qla2x00_config_dma_addressing(scsi_qla_host_t *ha); | 68 | static void qla2x00_config_dma_addressing(scsi_qla_host_t *ha); |
69 | 69 | ||
70 | int ql2xfdmienable; | 70 | int ql2xfdmienable=1; |
71 | module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR); | 71 | module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR); |
72 | MODULE_PARM_DESC(ql2xfdmienable, | 72 | MODULE_PARM_DESC(ql2xfdmienable, |
73 | "Enables FDMI registratons " | 73 | "Enables FDMI registratons " |
@@ -2135,7 +2135,7 @@ qla2x00_mem_free(scsi_qla_host_t *ha) | |||
2135 | kfree(ha->nvram); | 2135 | kfree(ha->nvram); |
2136 | } | 2136 | } |
2137 | 2137 | ||
2138 | struct qla_work_evt * | 2138 | static struct qla_work_evt * |
2139 | qla2x00_alloc_work(struct scsi_qla_host *ha, enum qla_work_type type, | 2139 | qla2x00_alloc_work(struct scsi_qla_host *ha, enum qla_work_type type, |
2140 | int locked) | 2140 | int locked) |
2141 | { | 2141 | { |
@@ -2152,7 +2152,7 @@ qla2x00_alloc_work(struct scsi_qla_host *ha, enum qla_work_type type, | |||
2152 | return e; | 2152 | return e; |
2153 | } | 2153 | } |
2154 | 2154 | ||
2155 | int | 2155 | static int |
2156 | qla2x00_post_work(struct scsi_qla_host *ha, struct qla_work_evt *e, int locked) | 2156 | qla2x00_post_work(struct scsi_qla_host *ha, struct qla_work_evt *e, int locked) |
2157 | { | 2157 | { |
2158 | unsigned long flags; | 2158 | unsigned long flags; |
@@ -2373,7 +2373,7 @@ qla2x00_do_dpc(void *data) | |||
2373 | } else { | 2373 | } else { |
2374 | fcport->login_retry = 0; | 2374 | fcport->login_retry = 0; |
2375 | } | 2375 | } |
2376 | if (fcport->login_retry == 0) | 2376 | if (fcport->login_retry == 0 && status != QLA_SUCCESS) |
2377 | fcport->loop_id = FC_NO_LOOP_ID; | 2377 | fcport->loop_id = FC_NO_LOOP_ID; |
2378 | } | 2378 | } |
2379 | if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) | 2379 | if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) |
@@ -2599,6 +2599,10 @@ qla2x00_timer(scsi_qla_host_t *ha) | |||
2599 | start_dpc++; | 2599 | start_dpc++; |
2600 | } | 2600 | } |
2601 | 2601 | ||
2602 | /* Process any deferred work. */ | ||
2603 | if (!list_empty(&ha->work_list)) | ||
2604 | start_dpc++; | ||
2605 | |||
2602 | /* Schedule the DPC routine if needed */ | 2606 | /* Schedule the DPC routine if needed */ |
2603 | if ((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || | 2607 | if ((test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || |
2604 | test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || | 2608 | test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || |
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h index f42f17acf2cf..afeae2bfe7eb 100644 --- a/drivers/scsi/qla2xxx/qla_version.h +++ b/drivers/scsi/qla2xxx/qla_version.h | |||
@@ -7,7 +7,7 @@ | |||
7 | /* | 7 | /* |
8 | * Driver version | 8 | * Driver version |
9 | */ | 9 | */ |
10 | #define QLA2XXX_VERSION "8.02.01-k1" | 10 | #define QLA2XXX_VERSION "8.02.01-k2" |
11 | 11 | ||
12 | #define QLA_DRIVER_MAJOR_VER 8 | 12 | #define QLA_DRIVER_MAJOR_VER 8 |
13 | #define QLA_DRIVER_MINOR_VER 2 | 13 | #define QLA_DRIVER_MINOR_VER 2 |