diff options
author | Giridhar Malavali <giridhar.malavali@qlogic.com> | 2011-03-30 14:46:24 -0400 |
---|---|---|
committer | James Bottomley <James.Bottomley@suse.de> | 2011-05-01 11:08:53 -0400 |
commit | 02be22155689d4e3a8bd04243547262b2915f4e3 (patch) | |
tree | 7ce0f421b91a997d7d4d95dc065a3be9943a76d6 /drivers/scsi/qla2xxx | |
parent | 07e264b76d1db5794614ca3d726fdf1c0399dac0 (diff) |
[SCSI] qla2xxx: Updated the reset sequence for ISP82xx.
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Signed-off-by: Madhuranath Iyengar <Madhu.Iyengar@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/qla2xxx')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_nx.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/scsi/qla2xxx/qla_nx.c b/drivers/scsi/qla2xxx/qla_nx.c index f81a870a660a..794c1647cd89 100644 --- a/drivers/scsi/qla2xxx/qla_nx.c +++ b/drivers/scsi/qla2xxx/qla_nx.c | |||
@@ -1081,12 +1081,26 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha) | |||
1081 | /* Halt all the indiviual PEGs and other blocks of the ISP */ | 1081 | /* Halt all the indiviual PEGs and other blocks of the ISP */ |
1082 | qla82xx_rom_lock(ha); | 1082 | qla82xx_rom_lock(ha); |
1083 | 1083 | ||
1084 | /* mask all niu interrupts */ | 1084 | /* disable all I2Q */ |
1085 | qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); | ||
1086 | qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); | ||
1087 | qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); | ||
1088 | qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); | ||
1089 | qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); | ||
1090 | qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); | ||
1091 | |||
1092 | /* disable all niu interrupts */ | ||
1085 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); | 1093 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); |
1086 | /* disable xge rx/tx */ | 1094 | /* disable xge rx/tx */ |
1087 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); | 1095 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); |
1088 | /* disable xg1 rx/tx */ | 1096 | /* disable xg1 rx/tx */ |
1089 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); | 1097 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); |
1098 | /* disable sideband mac */ | ||
1099 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); | ||
1100 | /* disable ap0 mac */ | ||
1101 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); | ||
1102 | /* disable ap1 mac */ | ||
1103 | qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); | ||
1090 | 1104 | ||
1091 | /* halt sre */ | 1105 | /* halt sre */ |
1092 | val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); | 1106 | val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); |
@@ -1101,6 +1115,7 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha) | |||
1101 | qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); | 1115 | qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); |
1102 | qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); | 1116 | qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); |
1103 | qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); | 1117 | qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); |
1118 | qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); | ||
1104 | 1119 | ||
1105 | /* halt pegs */ | 1120 | /* halt pegs */ |
1106 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); | 1121 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); |
@@ -1108,9 +1123,9 @@ qla82xx_pinit_from_rom(scsi_qla_host_t *vha) | |||
1108 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); | 1123 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); |
1109 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); | 1124 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); |
1110 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); | 1125 | qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); |
1126 | msleep(20); | ||
1111 | 1127 | ||
1112 | /* big hammer */ | 1128 | /* big hammer */ |
1113 | msleep(1000); | ||
1114 | if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) | 1129 | if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) |
1115 | /* don't reset CAM block on reset */ | 1130 | /* don't reset CAM block on reset */ |
1116 | qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); | 1131 | qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); |