diff options
author | Anirban Chakraborty <anirban.chakraborty@qlogic.com> | 2008-11-06 13:40:19 -0500 |
---|---|---|
committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2008-12-29 12:24:15 -0500 |
commit | 7b867cf76fbcc8d77867cbec6f509f71dce8a98f (patch) | |
tree | ef5fcc1e21701ed1baa1b131c7c29f29cd41d5d6 /drivers/scsi/qla2xxx/qla_sup.c | |
parent | a9b589d90e3d7748dae459031c2d912cd9e83c88 (diff) |
[SCSI] qla2xxx: Refactor qla data structures
Following changes have been made to the qla2xxx FC driver in
preparation for the multi- queue and future SR IOV hardware.
1. scsi_qla_host structure has been changed to contain scsi host
specific data only.
2. A new structure, qla_hw_data is created to contain HBA specific
hardware data.
3. Request and response IO specific data strucures are created.
4. The global list of fcports for the hba is not maintained anymore,
instead a fcport list is construted on per scsi_qla_host.
Signed-of-by: Anirban Chakraborty <anirban.chakraborty@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_sup.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_sup.c | 537 |
1 files changed, 280 insertions, 257 deletions
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c index e4af678eb2d6..6d6c02129a53 100644 --- a/drivers/scsi/qla2xxx/qla_sup.c +++ b/drivers/scsi/qla2xxx/qla_sup.c | |||
@@ -10,10 +10,6 @@ | |||
10 | #include <linux/vmalloc.h> | 10 | #include <linux/vmalloc.h> |
11 | #include <asm/uaccess.h> | 11 | #include <asm/uaccess.h> |
12 | 12 | ||
13 | static uint16_t qla2x00_nvram_request(scsi_qla_host_t *, uint32_t); | ||
14 | static void qla2x00_nv_deselect(scsi_qla_host_t *); | ||
15 | static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t); | ||
16 | |||
17 | /* | 13 | /* |
18 | * NVRAM support routines | 14 | * NVRAM support routines |
19 | */ | 15 | */ |
@@ -23,7 +19,7 @@ static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t); | |||
23 | * @ha: HA context | 19 | * @ha: HA context |
24 | */ | 20 | */ |
25 | static void | 21 | static void |
26 | qla2x00_lock_nvram_access(scsi_qla_host_t *ha) | 22 | qla2x00_lock_nvram_access(struct qla_hw_data *ha) |
27 | { | 23 | { |
28 | uint16_t data; | 24 | uint16_t data; |
29 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 25 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
@@ -56,7 +52,7 @@ qla2x00_lock_nvram_access(scsi_qla_host_t *ha) | |||
56 | * @ha: HA context | 52 | * @ha: HA context |
57 | */ | 53 | */ |
58 | static void | 54 | static void |
59 | qla2x00_unlock_nvram_access(scsi_qla_host_t *ha) | 55 | qla2x00_unlock_nvram_access(struct qla_hw_data *ha) |
60 | { | 56 | { |
61 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 57 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
62 | 58 | ||
@@ -67,6 +63,84 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha) | |||
67 | } | 63 | } |
68 | 64 | ||
69 | /** | 65 | /** |
66 | * qla2x00_nv_write() - Prepare for NVRAM read/write operation. | ||
67 | * @ha: HA context | ||
68 | * @data: Serial interface selector | ||
69 | */ | ||
70 | static void | ||
71 | qla2x00_nv_write(struct qla_hw_data *ha, uint16_t data) | ||
72 | { | ||
73 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
74 | |||
75 | WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE); | ||
76 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
77 | NVRAM_DELAY(); | ||
78 | WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_CLOCK | | ||
79 | NVR_WRT_ENABLE); | ||
80 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
81 | NVRAM_DELAY(); | ||
82 | WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE); | ||
83 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
84 | NVRAM_DELAY(); | ||
85 | } | ||
86 | |||
87 | /** | ||
88 | * qla2x00_nvram_request() - Sends read command to NVRAM and gets data from | ||
89 | * NVRAM. | ||
90 | * @ha: HA context | ||
91 | * @nv_cmd: NVRAM command | ||
92 | * | ||
93 | * Bit definitions for NVRAM command: | ||
94 | * | ||
95 | * Bit 26 = start bit | ||
96 | * Bit 25, 24 = opcode | ||
97 | * Bit 23-16 = address | ||
98 | * Bit 15-0 = write data | ||
99 | * | ||
100 | * Returns the word read from nvram @addr. | ||
101 | */ | ||
102 | static uint16_t | ||
103 | qla2x00_nvram_request(struct qla_hw_data *ha, uint32_t nv_cmd) | ||
104 | { | ||
105 | uint8_t cnt; | ||
106 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
107 | uint16_t data = 0; | ||
108 | uint16_t reg_data; | ||
109 | |||
110 | /* Send command to NVRAM. */ | ||
111 | nv_cmd <<= 5; | ||
112 | for (cnt = 0; cnt < 11; cnt++) { | ||
113 | if (nv_cmd & BIT_31) | ||
114 | qla2x00_nv_write(ha, NVR_DATA_OUT); | ||
115 | else | ||
116 | qla2x00_nv_write(ha, 0); | ||
117 | nv_cmd <<= 1; | ||
118 | } | ||
119 | |||
120 | /* Read data from NVRAM. */ | ||
121 | for (cnt = 0; cnt < 16; cnt++) { | ||
122 | WRT_REG_WORD(®->nvram, NVR_SELECT | NVR_CLOCK); | ||
123 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
124 | NVRAM_DELAY(); | ||
125 | data <<= 1; | ||
126 | reg_data = RD_REG_WORD(®->nvram); | ||
127 | if (reg_data & NVR_DATA_IN) | ||
128 | data |= BIT_0; | ||
129 | WRT_REG_WORD(®->nvram, NVR_SELECT); | ||
130 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
131 | NVRAM_DELAY(); | ||
132 | } | ||
133 | |||
134 | /* Deselect chip. */ | ||
135 | WRT_REG_WORD(®->nvram, NVR_DESELECT); | ||
136 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
137 | NVRAM_DELAY(); | ||
138 | |||
139 | return data; | ||
140 | } | ||
141 | |||
142 | |||
143 | /** | ||
70 | * qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the | 144 | * qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the |
71 | * request routine to get the word from NVRAM. | 145 | * request routine to get the word from NVRAM. |
72 | * @ha: HA context | 146 | * @ha: HA context |
@@ -75,7 +149,7 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha) | |||
75 | * Returns the word read from nvram @addr. | 149 | * Returns the word read from nvram @addr. |
76 | */ | 150 | */ |
77 | static uint16_t | 151 | static uint16_t |
78 | qla2x00_get_nvram_word(scsi_qla_host_t *ha, uint32_t addr) | 152 | qla2x00_get_nvram_word(struct qla_hw_data *ha, uint32_t addr) |
79 | { | 153 | { |
80 | uint16_t data; | 154 | uint16_t data; |
81 | uint32_t nv_cmd; | 155 | uint32_t nv_cmd; |
@@ -88,13 +162,27 @@ qla2x00_get_nvram_word(scsi_qla_host_t *ha, uint32_t addr) | |||
88 | } | 162 | } |
89 | 163 | ||
90 | /** | 164 | /** |
165 | * qla2x00_nv_deselect() - Deselect NVRAM operations. | ||
166 | * @ha: HA context | ||
167 | */ | ||
168 | static void | ||
169 | qla2x00_nv_deselect(struct qla_hw_data *ha) | ||
170 | { | ||
171 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
172 | |||
173 | WRT_REG_WORD(®->nvram, NVR_DESELECT); | ||
174 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
175 | NVRAM_DELAY(); | ||
176 | } | ||
177 | |||
178 | /** | ||
91 | * qla2x00_write_nvram_word() - Write NVRAM data. | 179 | * qla2x00_write_nvram_word() - Write NVRAM data. |
92 | * @ha: HA context | 180 | * @ha: HA context |
93 | * @addr: Address in NVRAM to write | 181 | * @addr: Address in NVRAM to write |
94 | * @data: word to program | 182 | * @data: word to program |
95 | */ | 183 | */ |
96 | static void | 184 | static void |
97 | qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) | 185 | qla2x00_write_nvram_word(struct qla_hw_data *ha, uint32_t addr, uint16_t data) |
98 | { | 186 | { |
99 | int count; | 187 | int count; |
100 | uint16_t word; | 188 | uint16_t word; |
@@ -132,7 +220,7 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) | |||
132 | do { | 220 | do { |
133 | if (!--wait_cnt) { | 221 | if (!--wait_cnt) { |
134 | DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n", | 222 | DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n", |
135 | __func__, ha->host_no)); | 223 | __func__, vha->host_no)); |
136 | break; | 224 | break; |
137 | } | 225 | } |
138 | NVRAM_DELAY(); | 226 | NVRAM_DELAY(); |
@@ -150,8 +238,8 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) | |||
150 | } | 238 | } |
151 | 239 | ||
152 | static int | 240 | static int |
153 | qla2x00_write_nvram_word_tmo(scsi_qla_host_t *ha, uint32_t addr, uint16_t data, | 241 | qla2x00_write_nvram_word_tmo(struct qla_hw_data *ha, uint32_t addr, |
154 | uint32_t tmo) | 242 | uint16_t data, uint32_t tmo) |
155 | { | 243 | { |
156 | int ret, count; | 244 | int ret, count; |
157 | uint16_t word; | 245 | uint16_t word; |
@@ -209,102 +297,11 @@ qla2x00_write_nvram_word_tmo(scsi_qla_host_t *ha, uint32_t addr, uint16_t data, | |||
209 | } | 297 | } |
210 | 298 | ||
211 | /** | 299 | /** |
212 | * qla2x00_nvram_request() - Sends read command to NVRAM and gets data from | ||
213 | * NVRAM. | ||
214 | * @ha: HA context | ||
215 | * @nv_cmd: NVRAM command | ||
216 | * | ||
217 | * Bit definitions for NVRAM command: | ||
218 | * | ||
219 | * Bit 26 = start bit | ||
220 | * Bit 25, 24 = opcode | ||
221 | * Bit 23-16 = address | ||
222 | * Bit 15-0 = write data | ||
223 | * | ||
224 | * Returns the word read from nvram @addr. | ||
225 | */ | ||
226 | static uint16_t | ||
227 | qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd) | ||
228 | { | ||
229 | uint8_t cnt; | ||
230 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
231 | uint16_t data = 0; | ||
232 | uint16_t reg_data; | ||
233 | |||
234 | /* Send command to NVRAM. */ | ||
235 | nv_cmd <<= 5; | ||
236 | for (cnt = 0; cnt < 11; cnt++) { | ||
237 | if (nv_cmd & BIT_31) | ||
238 | qla2x00_nv_write(ha, NVR_DATA_OUT); | ||
239 | else | ||
240 | qla2x00_nv_write(ha, 0); | ||
241 | nv_cmd <<= 1; | ||
242 | } | ||
243 | |||
244 | /* Read data from NVRAM. */ | ||
245 | for (cnt = 0; cnt < 16; cnt++) { | ||
246 | WRT_REG_WORD(®->nvram, NVR_SELECT | NVR_CLOCK); | ||
247 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
248 | NVRAM_DELAY(); | ||
249 | data <<= 1; | ||
250 | reg_data = RD_REG_WORD(®->nvram); | ||
251 | if (reg_data & NVR_DATA_IN) | ||
252 | data |= BIT_0; | ||
253 | WRT_REG_WORD(®->nvram, NVR_SELECT); | ||
254 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
255 | NVRAM_DELAY(); | ||
256 | } | ||
257 | |||
258 | /* Deselect chip. */ | ||
259 | WRT_REG_WORD(®->nvram, NVR_DESELECT); | ||
260 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
261 | NVRAM_DELAY(); | ||
262 | |||
263 | return (data); | ||
264 | } | ||
265 | |||
266 | /** | ||
267 | * qla2x00_nv_write() - Clean NVRAM operations. | ||
268 | * @ha: HA context | ||
269 | */ | ||
270 | static void | ||
271 | qla2x00_nv_deselect(scsi_qla_host_t *ha) | ||
272 | { | ||
273 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
274 | |||
275 | WRT_REG_WORD(®->nvram, NVR_DESELECT); | ||
276 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
277 | NVRAM_DELAY(); | ||
278 | } | ||
279 | |||
280 | /** | ||
281 | * qla2x00_nv_write() - Prepare for NVRAM read/write operation. | ||
282 | * @ha: HA context | ||
283 | * @data: Serial interface selector | ||
284 | */ | ||
285 | static void | ||
286 | qla2x00_nv_write(scsi_qla_host_t *ha, uint16_t data) | ||
287 | { | ||
288 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | ||
289 | |||
290 | WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE); | ||
291 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
292 | NVRAM_DELAY(); | ||
293 | WRT_REG_WORD(®->nvram, data | NVR_SELECT| NVR_CLOCK | | ||
294 | NVR_WRT_ENABLE); | ||
295 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
296 | NVRAM_DELAY(); | ||
297 | WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE); | ||
298 | RD_REG_WORD(®->nvram); /* PCI Posting. */ | ||
299 | NVRAM_DELAY(); | ||
300 | } | ||
301 | |||
302 | /** | ||
303 | * qla2x00_clear_nvram_protection() - | 300 | * qla2x00_clear_nvram_protection() - |
304 | * @ha: HA context | 301 | * @ha: HA context |
305 | */ | 302 | */ |
306 | static int | 303 | static int |
307 | qla2x00_clear_nvram_protection(scsi_qla_host_t *ha) | 304 | qla2x00_clear_nvram_protection(struct qla_hw_data *ha) |
308 | { | 305 | { |
309 | int ret, stat; | 306 | int ret, stat; |
310 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 307 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
@@ -352,9 +349,8 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha) | |||
352 | wait_cnt = NVR_WAIT_CNT; | 349 | wait_cnt = NVR_WAIT_CNT; |
353 | do { | 350 | do { |
354 | if (!--wait_cnt) { | 351 | if (!--wait_cnt) { |
355 | DEBUG9_10(printk("%s(%ld): NVRAM didn't go " | 352 | DEBUG9_10(qla_printk( |
356 | "ready...\n", __func__, | 353 | "NVRAM didn't go ready...\n")); |
357 | ha->host_no)); | ||
358 | break; | 354 | break; |
359 | } | 355 | } |
360 | NVRAM_DELAY(); | 356 | NVRAM_DELAY(); |
@@ -370,7 +366,7 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha) | |||
370 | } | 366 | } |
371 | 367 | ||
372 | static void | 368 | static void |
373 | qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat) | 369 | qla2x00_set_nvram_protection(struct qla_hw_data *ha, int stat) |
374 | { | 370 | { |
375 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 371 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
376 | uint32_t word, wait_cnt; | 372 | uint32_t word, wait_cnt; |
@@ -412,8 +408,7 @@ qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat) | |||
412 | wait_cnt = NVR_WAIT_CNT; | 408 | wait_cnt = NVR_WAIT_CNT; |
413 | do { | 409 | do { |
414 | if (!--wait_cnt) { | 410 | if (!--wait_cnt) { |
415 | DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n", | 411 | DEBUG9_10(qla_printk("NVRAM didn't go ready...\n")); |
416 | __func__, ha->host_no)); | ||
417 | break; | 412 | break; |
418 | } | 413 | } |
419 | NVRAM_DELAY(); | 414 | NVRAM_DELAY(); |
@@ -454,7 +449,7 @@ nvram_data_to_access_addr(uint32_t naddr) | |||
454 | } | 449 | } |
455 | 450 | ||
456 | static uint32_t | 451 | static uint32_t |
457 | qla24xx_read_flash_dword(scsi_qla_host_t *ha, uint32_t addr) | 452 | qla24xx_read_flash_dword(struct qla_hw_data *ha, uint32_t addr) |
458 | { | 453 | { |
459 | int rval; | 454 | int rval; |
460 | uint32_t cnt, data; | 455 | uint32_t cnt, data; |
@@ -482,21 +477,20 @@ qla24xx_read_flash_dword(scsi_qla_host_t *ha, uint32_t addr) | |||
482 | } | 477 | } |
483 | 478 | ||
484 | uint32_t * | 479 | uint32_t * |
485 | qla24xx_read_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, | 480 | qla24xx_read_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, |
486 | uint32_t dwords) | 481 | uint32_t dwords) |
487 | { | 482 | { |
488 | uint32_t i; | 483 | uint32_t i; |
489 | |||
490 | /* Dword reads to flash. */ | 484 | /* Dword reads to flash. */ |
491 | for (i = 0; i < dwords; i++, faddr++) | 485 | for (i = 0; i < dwords; i++, faddr++) |
492 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, | 486 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw, |
493 | flash_data_to_access_addr(faddr))); | 487 | flash_data_to_access_addr(faddr))); |
494 | 488 | ||
495 | return dwptr; | 489 | return dwptr; |
496 | } | 490 | } |
497 | 491 | ||
498 | static int | 492 | static int |
499 | qla24xx_write_flash_dword(scsi_qla_host_t *ha, uint32_t addr, uint32_t data) | 493 | qla24xx_write_flash_dword(struct qla_hw_data *ha, uint32_t addr, uint32_t data) |
500 | { | 494 | { |
501 | int rval; | 495 | int rval; |
502 | uint32_t cnt; | 496 | uint32_t cnt; |
@@ -519,7 +513,7 @@ qla24xx_write_flash_dword(scsi_qla_host_t *ha, uint32_t addr, uint32_t data) | |||
519 | } | 513 | } |
520 | 514 | ||
521 | static void | 515 | static void |
522 | qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id, | 516 | qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id, |
523 | uint8_t *flash_id) | 517 | uint8_t *flash_id) |
524 | { | 518 | { |
525 | uint32_t ids; | 519 | uint32_t ids; |
@@ -544,7 +538,7 @@ qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id, | |||
544 | } | 538 | } |
545 | 539 | ||
546 | static int | 540 | static int |
547 | qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start) | 541 | qla2xxx_find_flt_start(scsi_qla_host_t *vha, uint32_t *start) |
548 | { | 542 | { |
549 | const char *loc, *locations[] = { "DEF", "PCI" }; | 543 | const char *loc, *locations[] = { "DEF", "PCI" }; |
550 | uint32_t pcihdr, pcids; | 544 | uint32_t pcihdr, pcids; |
@@ -552,6 +546,8 @@ qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start) | |||
552 | uint8_t *buf, *bcode, last_image; | 546 | uint8_t *buf, *bcode, last_image; |
553 | uint16_t cnt, chksum, *wptr; | 547 | uint16_t cnt, chksum, *wptr; |
554 | struct qla_flt_location *fltl; | 548 | struct qla_flt_location *fltl; |
549 | struct qla_hw_data *ha = vha->hw; | ||
550 | struct req_que *req = ha->req; | ||
555 | 551 | ||
556 | /* | 552 | /* |
557 | * FLT-location structure resides after the last PCI region. | 553 | * FLT-location structure resides after the last PCI region. |
@@ -563,20 +559,20 @@ qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start) | |||
563 | FA_FLASH_LAYOUT_ADDR; | 559 | FA_FLASH_LAYOUT_ADDR; |
564 | 560 | ||
565 | /* Begin with first PCI expansion ROM header. */ | 561 | /* Begin with first PCI expansion ROM header. */ |
566 | buf = (uint8_t *)ha->request_ring; | 562 | buf = (uint8_t *)req->ring; |
567 | dcode = (uint32_t *)ha->request_ring; | 563 | dcode = (uint32_t *)req->ring; |
568 | pcihdr = 0; | 564 | pcihdr = 0; |
569 | last_image = 1; | 565 | last_image = 1; |
570 | do { | 566 | do { |
571 | /* Verify PCI expansion ROM header. */ | 567 | /* Verify PCI expansion ROM header. */ |
572 | qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, 0x20); | 568 | qla24xx_read_flash_data(vha, dcode, pcihdr >> 2, 0x20); |
573 | bcode = buf + (pcihdr % 4); | 569 | bcode = buf + (pcihdr % 4); |
574 | if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) | 570 | if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) |
575 | goto end; | 571 | goto end; |
576 | 572 | ||
577 | /* Locate PCI data structure. */ | 573 | /* Locate PCI data structure. */ |
578 | pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]); | 574 | pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]); |
579 | qla24xx_read_flash_data(ha, dcode, pcids >> 2, 0x20); | 575 | qla24xx_read_flash_data(vha, dcode, pcids >> 2, 0x20); |
580 | bcode = buf + (pcihdr % 4); | 576 | bcode = buf + (pcihdr % 4); |
581 | 577 | ||
582 | /* Validate signature of PCI data structure. */ | 578 | /* Validate signature of PCI data structure. */ |
@@ -591,14 +587,14 @@ qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start) | |||
591 | } while (!last_image); | 587 | } while (!last_image); |
592 | 588 | ||
593 | /* Now verify FLT-location structure. */ | 589 | /* Now verify FLT-location structure. */ |
594 | fltl = (struct qla_flt_location *)ha->request_ring; | 590 | fltl = (struct qla_flt_location *)req->ring; |
595 | qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, | 591 | qla24xx_read_flash_data(vha, dcode, pcihdr >> 2, |
596 | sizeof(struct qla_flt_location) >> 2); | 592 | sizeof(struct qla_flt_location) >> 2); |
597 | if (fltl->sig[0] != 'Q' || fltl->sig[1] != 'F' || | 593 | if (fltl->sig[0] != 'Q' || fltl->sig[1] != 'F' || |
598 | fltl->sig[2] != 'L' || fltl->sig[3] != 'T') | 594 | fltl->sig[2] != 'L' || fltl->sig[3] != 'T') |
599 | goto end; | 595 | goto end; |
600 | 596 | ||
601 | wptr = (uint16_t *)ha->request_ring; | 597 | wptr = (uint16_t *)req->ring; |
602 | cnt = sizeof(struct qla_flt_location) >> 1; | 598 | cnt = sizeof(struct qla_flt_location) >> 1; |
603 | for (chksum = 0; cnt; cnt--) | 599 | for (chksum = 0; cnt; cnt--) |
604 | chksum += le16_to_cpu(*wptr++); | 600 | chksum += le16_to_cpu(*wptr++); |
@@ -619,7 +615,7 @@ end: | |||
619 | } | 615 | } |
620 | 616 | ||
621 | static void | 617 | static void |
622 | qla2xxx_get_flt_info(scsi_qla_host_t *ha, uint32_t flt_addr) | 618 | qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr) |
623 | { | 619 | { |
624 | const char *loc, *locations[] = { "DEF", "FLT" }; | 620 | const char *loc, *locations[] = { "DEF", "FLT" }; |
625 | uint16_t *wptr; | 621 | uint16_t *wptr; |
@@ -627,12 +623,14 @@ qla2xxx_get_flt_info(scsi_qla_host_t *ha, uint32_t flt_addr) | |||
627 | uint32_t start; | 623 | uint32_t start; |
628 | struct qla_flt_header *flt; | 624 | struct qla_flt_header *flt; |
629 | struct qla_flt_region *region; | 625 | struct qla_flt_region *region; |
626 | struct qla_hw_data *ha = vha->hw; | ||
627 | struct req_que *req = ha->req; | ||
630 | 628 | ||
631 | ha->flt_region_flt = flt_addr; | 629 | ha->flt_region_flt = flt_addr; |
632 | wptr = (uint16_t *)ha->request_ring; | 630 | wptr = (uint16_t *)req->ring; |
633 | flt = (struct qla_flt_header *)ha->request_ring; | 631 | flt = (struct qla_flt_header *)req->ring; |
634 | region = (struct qla_flt_region *)&flt[1]; | 632 | region = (struct qla_flt_region *)&flt[1]; |
635 | ha->isp_ops->read_optrom(ha, (uint8_t *)ha->request_ring, | 633 | ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring, |
636 | flt_addr << 2, OPTROM_BURST_SIZE); | 634 | flt_addr << 2, OPTROM_BURST_SIZE); |
637 | if (*wptr == __constant_cpu_to_le16(0xffff)) | 635 | if (*wptr == __constant_cpu_to_le16(0xffff)) |
638 | goto no_flash_data; | 636 | goto no_flash_data; |
@@ -720,7 +718,7 @@ done: | |||
720 | } | 718 | } |
721 | 719 | ||
722 | static void | 720 | static void |
723 | qla2xxx_get_fdt_info(scsi_qla_host_t *ha) | 721 | qla2xxx_get_fdt_info(scsi_qla_host_t *vha) |
724 | { | 722 | { |
725 | #define FLASH_BLK_SIZE_4K 0x1000 | 723 | #define FLASH_BLK_SIZE_4K 0x1000 |
726 | #define FLASH_BLK_SIZE_32K 0x8000 | 724 | #define FLASH_BLK_SIZE_32K 0x8000 |
@@ -731,10 +729,12 @@ qla2xxx_get_fdt_info(scsi_qla_host_t *ha) | |||
731 | struct qla_fdt_layout *fdt; | 729 | struct qla_fdt_layout *fdt; |
732 | uint8_t man_id, flash_id; | 730 | uint8_t man_id, flash_id; |
733 | uint16_t mid, fid; | 731 | uint16_t mid, fid; |
732 | struct qla_hw_data *ha = vha->hw; | ||
733 | struct req_que *req = ha->req; | ||
734 | 734 | ||
735 | wptr = (uint16_t *)ha->request_ring; | 735 | wptr = (uint16_t *)req->ring; |
736 | fdt = (struct qla_fdt_layout *)ha->request_ring; | 736 | fdt = (struct qla_fdt_layout *)req->ring; |
737 | ha->isp_ops->read_optrom(ha, (uint8_t *)ha->request_ring, | 737 | ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring, |
738 | ha->flt_region_fdt << 2, OPTROM_BURST_SIZE); | 738 | ha->flt_region_fdt << 2, OPTROM_BURST_SIZE); |
739 | if (*wptr == __constant_cpu_to_le16(0xffff)) | 739 | if (*wptr == __constant_cpu_to_le16(0xffff)) |
740 | goto no_flash_data; | 740 | goto no_flash_data; |
@@ -807,26 +807,27 @@ done: | |||
807 | } | 807 | } |
808 | 808 | ||
809 | int | 809 | int |
810 | qla2xxx_get_flash_info(scsi_qla_host_t *ha) | 810 | qla2xxx_get_flash_info(scsi_qla_host_t *vha) |
811 | { | 811 | { |
812 | int ret; | 812 | int ret; |
813 | uint32_t flt_addr; | 813 | uint32_t flt_addr; |
814 | struct qla_hw_data *ha = vha->hw; | ||
814 | 815 | ||
815 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) | 816 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) |
816 | return QLA_SUCCESS; | 817 | return QLA_SUCCESS; |
817 | 818 | ||
818 | ret = qla2xxx_find_flt_start(ha, &flt_addr); | 819 | ret = qla2xxx_find_flt_start(vha, &flt_addr); |
819 | if (ret != QLA_SUCCESS) | 820 | if (ret != QLA_SUCCESS) |
820 | return ret; | 821 | return ret; |
821 | 822 | ||
822 | qla2xxx_get_flt_info(ha, flt_addr); | 823 | qla2xxx_get_flt_info(vha, flt_addr); |
823 | qla2xxx_get_fdt_info(ha); | 824 | qla2xxx_get_fdt_info(vha); |
824 | 825 | ||
825 | return QLA_SUCCESS; | 826 | return QLA_SUCCESS; |
826 | } | 827 | } |
827 | 828 | ||
828 | void | 829 | void |
829 | qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha) | 830 | qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha) |
830 | { | 831 | { |
831 | #define NPIV_CONFIG_SIZE (16*1024) | 832 | #define NPIV_CONFIG_SIZE (16*1024) |
832 | void *data; | 833 | void *data; |
@@ -834,11 +835,12 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha) | |||
834 | uint16_t cnt, chksum; | 835 | uint16_t cnt, chksum; |
835 | struct qla_npiv_header hdr; | 836 | struct qla_npiv_header hdr; |
836 | struct qla_npiv_entry *entry; | 837 | struct qla_npiv_entry *entry; |
838 | struct qla_hw_data *ha = vha->hw; | ||
837 | 839 | ||
838 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) | 840 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) |
839 | return; | 841 | return; |
840 | 842 | ||
841 | ha->isp_ops->read_optrom(ha, (uint8_t *)&hdr, | 843 | ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr, |
842 | ha->flt_region_npiv_conf << 2, sizeof(struct qla_npiv_header)); | 844 | ha->flt_region_npiv_conf << 2, sizeof(struct qla_npiv_header)); |
843 | if (hdr.version == __constant_cpu_to_le16(0xffff)) | 845 | if (hdr.version == __constant_cpu_to_le16(0xffff)) |
844 | return; | 846 | return; |
@@ -857,7 +859,7 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha) | |||
857 | return; | 859 | return; |
858 | } | 860 | } |
859 | 861 | ||
860 | ha->isp_ops->read_optrom(ha, (uint8_t *)data, | 862 | ha->isp_ops->read_optrom(vha, (uint8_t *)data, |
861 | ha->flt_region_npiv_conf << 2, NPIV_CONFIG_SIZE); | 863 | ha->flt_region_npiv_conf << 2, NPIV_CONFIG_SIZE); |
862 | 864 | ||
863 | cnt = (sizeof(struct qla_npiv_header) + le16_to_cpu(hdr.entries) * | 865 | cnt = (sizeof(struct qla_npiv_header) + le16_to_cpu(hdr.entries) * |
@@ -893,24 +895,22 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha) | |||
893 | vid.node_name = wwn_to_u64(entry->node_name); | 895 | vid.node_name = wwn_to_u64(entry->node_name); |
894 | 896 | ||
895 | DEBUG2(qla_printk(KERN_DEBUG, ha, "NPIV[%02x]: wwpn=%llx " | 897 | DEBUG2(qla_printk(KERN_DEBUG, ha, "NPIV[%02x]: wwpn=%llx " |
896 | "wwnn=%llx vf_id=0x%x qos=0x%x.\n", cnt, | 898 | "wwnn=%llx vf_id=0x%x qos=0x%x.\n", cnt, vid.port_name, |
897 | (unsigned long long)vid.port_name, | 899 | vid.node_name, le16_to_cpu(entry->vf_id), |
898 | (unsigned long long)vid.node_name, | 900 | le16_to_cpu(entry->qos))); |
899 | le16_to_cpu(entry->vf_id), le16_to_cpu(entry->qos))); | ||
900 | 901 | ||
901 | vport = fc_vport_create(ha->host, 0, &vid); | 902 | vport = fc_vport_create(vha->host, 0, &vid); |
902 | if (!vport) | 903 | if (!vport) |
903 | qla_printk(KERN_INFO, ha, "NPIV-Config: Failed to " | 904 | qla_printk(KERN_INFO, ha, "NPIV-Config: Failed to " |
904 | "create vport [%02x]: wwpn=%llx wwnn=%llx.\n", cnt, | 905 | "create vport [%02x]: wwpn=%llx wwnn=%llx.\n", cnt, |
905 | (unsigned long long)vid.port_name, | 906 | vid.port_name, vid.node_name); |
906 | (unsigned long long)vid.node_name); | ||
907 | } | 907 | } |
908 | done: | 908 | done: |
909 | kfree(data); | 909 | kfree(data); |
910 | } | 910 | } |
911 | 911 | ||
912 | static void | 912 | static void |
913 | qla24xx_unprotect_flash(scsi_qla_host_t *ha) | 913 | qla24xx_unprotect_flash(struct qla_hw_data *ha) |
914 | { | 914 | { |
915 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 915 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
916 | 916 | ||
@@ -929,7 +929,7 @@ qla24xx_unprotect_flash(scsi_qla_host_t *ha) | |||
929 | } | 929 | } |
930 | 930 | ||
931 | static void | 931 | static void |
932 | qla24xx_protect_flash(scsi_qla_host_t *ha) | 932 | qla24xx_protect_flash(struct qla_hw_data *ha) |
933 | { | 933 | { |
934 | uint32_t cnt; | 934 | uint32_t cnt; |
935 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 935 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
@@ -955,7 +955,7 @@ skip_wrt_protect: | |||
955 | } | 955 | } |
956 | 956 | ||
957 | static int | 957 | static int |
958 | qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, | 958 | qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, |
959 | uint32_t dwords) | 959 | uint32_t dwords) |
960 | { | 960 | { |
961 | int ret; | 961 | int ret; |
@@ -965,6 +965,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, | |||
965 | dma_addr_t optrom_dma; | 965 | dma_addr_t optrom_dma; |
966 | void *optrom = NULL; | 966 | void *optrom = NULL; |
967 | uint32_t *s, *d; | 967 | uint32_t *s, *d; |
968 | struct qla_hw_data *ha = vha->hw; | ||
968 | 969 | ||
969 | ret = QLA_SUCCESS; | 970 | ret = QLA_SUCCESS; |
970 | 971 | ||
@@ -1002,9 +1003,8 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, | |||
1002 | (fdata & 0xff00) |((fdata << 16) & | 1003 | (fdata & 0xff00) |((fdata << 16) & |
1003 | 0xff0000) | ((fdata >> 16) & 0xff)); | 1004 | 0xff0000) | ((fdata >> 16) & 0xff)); |
1004 | if (ret != QLA_SUCCESS) { | 1005 | if (ret != QLA_SUCCESS) { |
1005 | DEBUG9(printk("%s(%ld) Unable to flash " | 1006 | DEBUG9(qla_printk("Unable to flash sector: " |
1006 | "sector: address=%x.\n", __func__, | 1007 | "address=%x.\n", faddr)); |
1007 | ha->host_no, faddr)); | ||
1008 | break; | 1008 | break; |
1009 | } | 1009 | } |
1010 | } | 1010 | } |
@@ -1016,7 +1016,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, | |||
1016 | miter < OPTROM_BURST_DWORDS; miter++, s++, d++) | 1016 | miter < OPTROM_BURST_DWORDS; miter++, s++, d++) |
1017 | *s = cpu_to_le32(*d); | 1017 | *s = cpu_to_le32(*d); |
1018 | 1018 | ||
1019 | ret = qla2x00_load_ram(ha, optrom_dma, | 1019 | ret = qla2x00_load_ram(vha, optrom_dma, |
1020 | flash_data_to_access_addr(faddr), | 1020 | flash_data_to_access_addr(faddr), |
1021 | OPTROM_BURST_DWORDS); | 1021 | OPTROM_BURST_DWORDS); |
1022 | if (ret != QLA_SUCCESS) { | 1022 | if (ret != QLA_SUCCESS) { |
@@ -1044,7 +1044,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, | |||
1044 | if (ret != QLA_SUCCESS) { | 1044 | if (ret != QLA_SUCCESS) { |
1045 | DEBUG9(printk("%s(%ld) Unable to program flash " | 1045 | DEBUG9(printk("%s(%ld) Unable to program flash " |
1046 | "address=%x data=%x.\n", __func__, | 1046 | "address=%x data=%x.\n", __func__, |
1047 | ha->host_no, faddr, *dwptr)); | 1047 | vha->host_no, faddr, *dwptr)); |
1048 | break; | 1048 | break; |
1049 | } | 1049 | } |
1050 | 1050 | ||
@@ -1067,11 +1067,12 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, | |||
1067 | } | 1067 | } |
1068 | 1068 | ||
1069 | uint8_t * | 1069 | uint8_t * |
1070 | qla2x00_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | 1070 | qla2x00_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, |
1071 | uint32_t bytes) | 1071 | uint32_t bytes) |
1072 | { | 1072 | { |
1073 | uint32_t i; | 1073 | uint32_t i; |
1074 | uint16_t *wptr; | 1074 | uint16_t *wptr; |
1075 | struct qla_hw_data *ha = vha->hw; | ||
1075 | 1076 | ||
1076 | /* Word reads to NVRAM via registers. */ | 1077 | /* Word reads to NVRAM via registers. */ |
1077 | wptr = (uint16_t *)buf; | 1078 | wptr = (uint16_t *)buf; |
@@ -1085,7 +1086,7 @@ qla2x00_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | |||
1085 | } | 1086 | } |
1086 | 1087 | ||
1087 | uint8_t * | 1088 | uint8_t * |
1088 | qla24xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | 1089 | qla24xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, |
1089 | uint32_t bytes) | 1090 | uint32_t bytes) |
1090 | { | 1091 | { |
1091 | uint32_t i; | 1092 | uint32_t i; |
@@ -1094,20 +1095,21 @@ qla24xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | |||
1094 | /* Dword reads to flash. */ | 1095 | /* Dword reads to flash. */ |
1095 | dwptr = (uint32_t *)buf; | 1096 | dwptr = (uint32_t *)buf; |
1096 | for (i = 0; i < bytes >> 2; i++, naddr++) | 1097 | for (i = 0; i < bytes >> 2; i++, naddr++) |
1097 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, | 1098 | dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw, |
1098 | nvram_data_to_access_addr(naddr))); | 1099 | nvram_data_to_access_addr(naddr))); |
1099 | 1100 | ||
1100 | return buf; | 1101 | return buf; |
1101 | } | 1102 | } |
1102 | 1103 | ||
1103 | int | 1104 | int |
1104 | qla2x00_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | 1105 | qla2x00_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, |
1105 | uint32_t bytes) | 1106 | uint32_t bytes) |
1106 | { | 1107 | { |
1107 | int ret, stat; | 1108 | int ret, stat; |
1108 | uint32_t i; | 1109 | uint32_t i; |
1109 | uint16_t *wptr; | 1110 | uint16_t *wptr; |
1110 | unsigned long flags; | 1111 | unsigned long flags; |
1112 | struct qla_hw_data *ha = vha->hw; | ||
1111 | 1113 | ||
1112 | ret = QLA_SUCCESS; | 1114 | ret = QLA_SUCCESS; |
1113 | 1115 | ||
@@ -1134,12 +1136,13 @@ qla2x00_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | |||
1134 | } | 1136 | } |
1135 | 1137 | ||
1136 | int | 1138 | int |
1137 | qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | 1139 | qla24xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, |
1138 | uint32_t bytes) | 1140 | uint32_t bytes) |
1139 | { | 1141 | { |
1140 | int ret; | 1142 | int ret; |
1141 | uint32_t i; | 1143 | uint32_t i; |
1142 | uint32_t *dwptr; | 1144 | uint32_t *dwptr; |
1145 | struct qla_hw_data *ha = vha->hw; | ||
1143 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 1146 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
1144 | 1147 | ||
1145 | ret = QLA_SUCCESS; | 1148 | ret = QLA_SUCCESS; |
@@ -1162,9 +1165,8 @@ qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | |||
1162 | nvram_data_to_access_addr(naddr), | 1165 | nvram_data_to_access_addr(naddr), |
1163 | cpu_to_le32(*dwptr)); | 1166 | cpu_to_le32(*dwptr)); |
1164 | if (ret != QLA_SUCCESS) { | 1167 | if (ret != QLA_SUCCESS) { |
1165 | DEBUG9(printk("%s(%ld) Unable to program " | 1168 | DEBUG9(qla_printk("Unable to program nvram address=%x " |
1166 | "nvram address=%x data=%x.\n", __func__, | 1169 | "data=%x.\n", naddr, *dwptr)); |
1167 | ha->host_no, naddr, *dwptr)); | ||
1168 | break; | 1170 | break; |
1169 | } | 1171 | } |
1170 | } | 1172 | } |
@@ -1182,11 +1184,12 @@ qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | |||
1182 | } | 1184 | } |
1183 | 1185 | ||
1184 | uint8_t * | 1186 | uint8_t * |
1185 | qla25xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | 1187 | qla25xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, |
1186 | uint32_t bytes) | 1188 | uint32_t bytes) |
1187 | { | 1189 | { |
1188 | uint32_t i; | 1190 | uint32_t i; |
1189 | uint32_t *dwptr; | 1191 | uint32_t *dwptr; |
1192 | struct qla_hw_data *ha = vha->hw; | ||
1190 | 1193 | ||
1191 | /* Dword reads to flash. */ | 1194 | /* Dword reads to flash. */ |
1192 | dwptr = (uint32_t *)buf; | 1195 | dwptr = (uint32_t *)buf; |
@@ -1199,19 +1202,20 @@ qla25xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | |||
1199 | } | 1202 | } |
1200 | 1203 | ||
1201 | int | 1204 | int |
1202 | qla25xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | 1205 | qla25xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr, |
1203 | uint32_t bytes) | 1206 | uint32_t bytes) |
1204 | { | 1207 | { |
1208 | struct qla_hw_data *ha = vha->hw; | ||
1205 | #define RMW_BUFFER_SIZE (64 * 1024) | 1209 | #define RMW_BUFFER_SIZE (64 * 1024) |
1206 | uint8_t *dbuf; | 1210 | uint8_t *dbuf; |
1207 | 1211 | ||
1208 | dbuf = vmalloc(RMW_BUFFER_SIZE); | 1212 | dbuf = vmalloc(RMW_BUFFER_SIZE); |
1209 | if (!dbuf) | 1213 | if (!dbuf) |
1210 | return QLA_MEMORY_ALLOC_FAILED; | 1214 | return QLA_MEMORY_ALLOC_FAILED; |
1211 | ha->isp_ops->read_optrom(ha, dbuf, ha->flt_region_vpd_nvram << 2, | 1215 | ha->isp_ops->read_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2, |
1212 | RMW_BUFFER_SIZE); | 1216 | RMW_BUFFER_SIZE); |
1213 | memcpy(dbuf + (naddr << 2), buf, bytes); | 1217 | memcpy(dbuf + (naddr << 2), buf, bytes); |
1214 | ha->isp_ops->write_optrom(ha, dbuf, ha->flt_region_vpd_nvram << 2, | 1218 | ha->isp_ops->write_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2, |
1215 | RMW_BUFFER_SIZE); | 1219 | RMW_BUFFER_SIZE); |
1216 | vfree(dbuf); | 1220 | vfree(dbuf); |
1217 | 1221 | ||
@@ -1219,7 +1223,7 @@ qla25xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, | |||
1219 | } | 1223 | } |
1220 | 1224 | ||
1221 | static inline void | 1225 | static inline void |
1222 | qla2x00_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags) | 1226 | qla2x00_flip_colors(struct qla_hw_data *ha, uint16_t *pflags) |
1223 | { | 1227 | { |
1224 | if (IS_QLA2322(ha)) { | 1228 | if (IS_QLA2322(ha)) { |
1225 | /* Flip all colors. */ | 1229 | /* Flip all colors. */ |
@@ -1249,12 +1253,13 @@ qla2x00_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags) | |||
1249 | #define PIO_REG(h, r) ((h)->pio_address + offsetof(struct device_reg_2xxx, r)) | 1253 | #define PIO_REG(h, r) ((h)->pio_address + offsetof(struct device_reg_2xxx, r)) |
1250 | 1254 | ||
1251 | void | 1255 | void |
1252 | qla2x00_beacon_blink(struct scsi_qla_host *ha) | 1256 | qla2x00_beacon_blink(struct scsi_qla_host *vha) |
1253 | { | 1257 | { |
1254 | uint16_t gpio_enable; | 1258 | uint16_t gpio_enable; |
1255 | uint16_t gpio_data; | 1259 | uint16_t gpio_data; |
1256 | uint16_t led_color = 0; | 1260 | uint16_t led_color = 0; |
1257 | unsigned long flags; | 1261 | unsigned long flags; |
1262 | struct qla_hw_data *ha = vha->hw; | ||
1258 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1263 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1259 | 1264 | ||
1260 | spin_lock_irqsave(&ha->hardware_lock, flags); | 1265 | spin_lock_irqsave(&ha->hardware_lock, flags); |
@@ -1298,17 +1303,18 @@ qla2x00_beacon_blink(struct scsi_qla_host *ha) | |||
1298 | } | 1303 | } |
1299 | 1304 | ||
1300 | int | 1305 | int |
1301 | qla2x00_beacon_on(struct scsi_qla_host *ha) | 1306 | qla2x00_beacon_on(struct scsi_qla_host *vha) |
1302 | { | 1307 | { |
1303 | uint16_t gpio_enable; | 1308 | uint16_t gpio_enable; |
1304 | uint16_t gpio_data; | 1309 | uint16_t gpio_data; |
1305 | unsigned long flags; | 1310 | unsigned long flags; |
1311 | struct qla_hw_data *ha = vha->hw; | ||
1306 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1312 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1307 | 1313 | ||
1308 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | 1314 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; |
1309 | ha->fw_options[1] |= FO1_DISABLE_GPIO6_7; | 1315 | ha->fw_options[1] |= FO1_DISABLE_GPIO6_7; |
1310 | 1316 | ||
1311 | if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) { | 1317 | if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) { |
1312 | qla_printk(KERN_WARNING, ha, | 1318 | qla_printk(KERN_WARNING, ha, |
1313 | "Unable to update fw options (beacon on).\n"); | 1319 | "Unable to update fw options (beacon on).\n"); |
1314 | return QLA_FUNCTION_FAILED; | 1320 | return QLA_FUNCTION_FAILED; |
@@ -1354,9 +1360,10 @@ qla2x00_beacon_on(struct scsi_qla_host *ha) | |||
1354 | } | 1360 | } |
1355 | 1361 | ||
1356 | int | 1362 | int |
1357 | qla2x00_beacon_off(struct scsi_qla_host *ha) | 1363 | qla2x00_beacon_off(struct scsi_qla_host *vha) |
1358 | { | 1364 | { |
1359 | int rval = QLA_SUCCESS; | 1365 | int rval = QLA_SUCCESS; |
1366 | struct qla_hw_data *ha = vha->hw; | ||
1360 | 1367 | ||
1361 | ha->beacon_blink_led = 0; | 1368 | ha->beacon_blink_led = 0; |
1362 | 1369 | ||
@@ -1366,12 +1373,12 @@ qla2x00_beacon_off(struct scsi_qla_host *ha) | |||
1366 | else | 1373 | else |
1367 | ha->beacon_color_state = QLA_LED_GRN_ON; | 1374 | ha->beacon_color_state = QLA_LED_GRN_ON; |
1368 | 1375 | ||
1369 | ha->isp_ops->beacon_blink(ha); /* This turns green LED off */ | 1376 | ha->isp_ops->beacon_blink(vha); /* This turns green LED off */ |
1370 | 1377 | ||
1371 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | 1378 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; |
1372 | ha->fw_options[1] &= ~FO1_DISABLE_GPIO6_7; | 1379 | ha->fw_options[1] &= ~FO1_DISABLE_GPIO6_7; |
1373 | 1380 | ||
1374 | rval = qla2x00_set_fw_options(ha, ha->fw_options); | 1381 | rval = qla2x00_set_fw_options(vha, ha->fw_options); |
1375 | if (rval != QLA_SUCCESS) | 1382 | if (rval != QLA_SUCCESS) |
1376 | qla_printk(KERN_WARNING, ha, | 1383 | qla_printk(KERN_WARNING, ha, |
1377 | "Unable to update fw options (beacon off).\n"); | 1384 | "Unable to update fw options (beacon off).\n"); |
@@ -1380,7 +1387,7 @@ qla2x00_beacon_off(struct scsi_qla_host *ha) | |||
1380 | 1387 | ||
1381 | 1388 | ||
1382 | static inline void | 1389 | static inline void |
1383 | qla24xx_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags) | 1390 | qla24xx_flip_colors(struct qla_hw_data *ha, uint16_t *pflags) |
1384 | { | 1391 | { |
1385 | /* Flip all colors. */ | 1392 | /* Flip all colors. */ |
1386 | if (ha->beacon_color_state == QLA_LED_ALL_ON) { | 1393 | if (ha->beacon_color_state == QLA_LED_ALL_ON) { |
@@ -1395,11 +1402,12 @@ qla24xx_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags) | |||
1395 | } | 1402 | } |
1396 | 1403 | ||
1397 | void | 1404 | void |
1398 | qla24xx_beacon_blink(struct scsi_qla_host *ha) | 1405 | qla24xx_beacon_blink(struct scsi_qla_host *vha) |
1399 | { | 1406 | { |
1400 | uint16_t led_color = 0; | 1407 | uint16_t led_color = 0; |
1401 | uint32_t gpio_data; | 1408 | uint32_t gpio_data; |
1402 | unsigned long flags; | 1409 | unsigned long flags; |
1410 | struct qla_hw_data *ha = vha->hw; | ||
1403 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 1411 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
1404 | 1412 | ||
1405 | /* Save the Original GPIOD. */ | 1413 | /* Save the Original GPIOD. */ |
@@ -1428,20 +1436,21 @@ qla24xx_beacon_blink(struct scsi_qla_host *ha) | |||
1428 | } | 1436 | } |
1429 | 1437 | ||
1430 | int | 1438 | int |
1431 | qla24xx_beacon_on(struct scsi_qla_host *ha) | 1439 | qla24xx_beacon_on(struct scsi_qla_host *vha) |
1432 | { | 1440 | { |
1433 | uint32_t gpio_data; | 1441 | uint32_t gpio_data; |
1434 | unsigned long flags; | 1442 | unsigned long flags; |
1443 | struct qla_hw_data *ha = vha->hw; | ||
1435 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 1444 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
1436 | 1445 | ||
1437 | if (ha->beacon_blink_led == 0) { | 1446 | if (ha->beacon_blink_led == 0) { |
1438 | /* Enable firmware for update */ | 1447 | /* Enable firmware for update */ |
1439 | ha->fw_options[1] |= ADD_FO1_DISABLE_GPIO_LED_CTRL; | 1448 | ha->fw_options[1] |= ADD_FO1_DISABLE_GPIO_LED_CTRL; |
1440 | 1449 | ||
1441 | if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) | 1450 | if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) |
1442 | return QLA_FUNCTION_FAILED; | 1451 | return QLA_FUNCTION_FAILED; |
1443 | 1452 | ||
1444 | if (qla2x00_get_fw_options(ha, ha->fw_options) != | 1453 | if (qla2x00_get_fw_options(vha, ha->fw_options) != |
1445 | QLA_SUCCESS) { | 1454 | QLA_SUCCESS) { |
1446 | qla_printk(KERN_WARNING, ha, | 1455 | qla_printk(KERN_WARNING, ha, |
1447 | "Unable to update fw options (beacon on).\n"); | 1456 | "Unable to update fw options (beacon on).\n"); |
@@ -1469,16 +1478,17 @@ qla24xx_beacon_on(struct scsi_qla_host *ha) | |||
1469 | } | 1478 | } |
1470 | 1479 | ||
1471 | int | 1480 | int |
1472 | qla24xx_beacon_off(struct scsi_qla_host *ha) | 1481 | qla24xx_beacon_off(struct scsi_qla_host *vha) |
1473 | { | 1482 | { |
1474 | uint32_t gpio_data; | 1483 | uint32_t gpio_data; |
1475 | unsigned long flags; | 1484 | unsigned long flags; |
1485 | struct qla_hw_data *ha = vha->hw; | ||
1476 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; | 1486 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
1477 | 1487 | ||
1478 | ha->beacon_blink_led = 0; | 1488 | ha->beacon_blink_led = 0; |
1479 | ha->beacon_color_state = QLA_LED_ALL_ON; | 1489 | ha->beacon_color_state = QLA_LED_ALL_ON; |
1480 | 1490 | ||
1481 | ha->isp_ops->beacon_blink(ha); /* Will flip to all off. */ | 1491 | ha->isp_ops->beacon_blink(vha); /* Will flip to all off. */ |
1482 | 1492 | ||
1483 | /* Give control back to firmware. */ | 1493 | /* Give control back to firmware. */ |
1484 | spin_lock_irqsave(&ha->hardware_lock, flags); | 1494 | spin_lock_irqsave(&ha->hardware_lock, flags); |
@@ -1492,13 +1502,13 @@ qla24xx_beacon_off(struct scsi_qla_host *ha) | |||
1492 | 1502 | ||
1493 | ha->fw_options[1] &= ~ADD_FO1_DISABLE_GPIO_LED_CTRL; | 1503 | ha->fw_options[1] &= ~ADD_FO1_DISABLE_GPIO_LED_CTRL; |
1494 | 1504 | ||
1495 | if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) { | 1505 | if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) { |
1496 | qla_printk(KERN_WARNING, ha, | 1506 | qla_printk(KERN_WARNING, ha, |
1497 | "Unable to update fw options (beacon off).\n"); | 1507 | "Unable to update fw options (beacon off).\n"); |
1498 | return QLA_FUNCTION_FAILED; | 1508 | return QLA_FUNCTION_FAILED; |
1499 | } | 1509 | } |
1500 | 1510 | ||
1501 | if (qla2x00_get_fw_options(ha, ha->fw_options) != QLA_SUCCESS) { | 1511 | if (qla2x00_get_fw_options(vha, ha->fw_options) != QLA_SUCCESS) { |
1502 | qla_printk(KERN_WARNING, ha, | 1512 | qla_printk(KERN_WARNING, ha, |
1503 | "Unable to get fw options (beacon off).\n"); | 1513 | "Unable to get fw options (beacon off).\n"); |
1504 | return QLA_FUNCTION_FAILED; | 1514 | return QLA_FUNCTION_FAILED; |
@@ -1517,7 +1527,7 @@ qla24xx_beacon_off(struct scsi_qla_host *ha) | |||
1517 | * @ha: HA context | 1527 | * @ha: HA context |
1518 | */ | 1528 | */ |
1519 | static void | 1529 | static void |
1520 | qla2x00_flash_enable(scsi_qla_host_t *ha) | 1530 | qla2x00_flash_enable(struct qla_hw_data *ha) |
1521 | { | 1531 | { |
1522 | uint16_t data; | 1532 | uint16_t data; |
1523 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1533 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
@@ -1533,7 +1543,7 @@ qla2x00_flash_enable(scsi_qla_host_t *ha) | |||
1533 | * @ha: HA context | 1543 | * @ha: HA context |
1534 | */ | 1544 | */ |
1535 | static void | 1545 | static void |
1536 | qla2x00_flash_disable(scsi_qla_host_t *ha) | 1546 | qla2x00_flash_disable(struct qla_hw_data *ha) |
1537 | { | 1547 | { |
1538 | uint16_t data; | 1548 | uint16_t data; |
1539 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1549 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
@@ -1554,7 +1564,7 @@ qla2x00_flash_disable(scsi_qla_host_t *ha) | |||
1554 | * Returns the byte read from flash @addr. | 1564 | * Returns the byte read from flash @addr. |
1555 | */ | 1565 | */ |
1556 | static uint8_t | 1566 | static uint8_t |
1557 | qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr) | 1567 | qla2x00_read_flash_byte(struct qla_hw_data *ha, uint32_t addr) |
1558 | { | 1568 | { |
1559 | uint16_t data; | 1569 | uint16_t data; |
1560 | uint16_t bank_select; | 1570 | uint16_t bank_select; |
@@ -1615,7 +1625,7 @@ qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr) | |||
1615 | * @data: Data to write | 1625 | * @data: Data to write |
1616 | */ | 1626 | */ |
1617 | static void | 1627 | static void |
1618 | qla2x00_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data) | 1628 | qla2x00_write_flash_byte(struct qla_hw_data *ha, uint32_t addr, uint8_t data) |
1619 | { | 1629 | { |
1620 | uint16_t bank_select; | 1630 | uint16_t bank_select; |
1621 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1631 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
@@ -1678,7 +1688,7 @@ qla2x00_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data) | |||
1678 | * Returns 0 on success, else non-zero. | 1688 | * Returns 0 on success, else non-zero. |
1679 | */ | 1689 | */ |
1680 | static int | 1690 | static int |
1681 | qla2x00_poll_flash(scsi_qla_host_t *ha, uint32_t addr, uint8_t poll_data, | 1691 | qla2x00_poll_flash(struct qla_hw_data *ha, uint32_t addr, uint8_t poll_data, |
1682 | uint8_t man_id, uint8_t flash_id) | 1692 | uint8_t man_id, uint8_t flash_id) |
1683 | { | 1693 | { |
1684 | int status; | 1694 | int status; |
@@ -1718,8 +1728,8 @@ qla2x00_poll_flash(scsi_qla_host_t *ha, uint32_t addr, uint8_t poll_data, | |||
1718 | * Returns 0 on success, else non-zero. | 1728 | * Returns 0 on success, else non-zero. |
1719 | */ | 1729 | */ |
1720 | static int | 1730 | static int |
1721 | qla2x00_program_flash_address(scsi_qla_host_t *ha, uint32_t addr, uint8_t data, | 1731 | qla2x00_program_flash_address(struct qla_hw_data *ha, uint32_t addr, |
1722 | uint8_t man_id, uint8_t flash_id) | 1732 | uint8_t data, uint8_t man_id, uint8_t flash_id) |
1723 | { | 1733 | { |
1724 | /* Write Program Command Sequence. */ | 1734 | /* Write Program Command Sequence. */ |
1725 | if (IS_OEM_001(ha)) { | 1735 | if (IS_OEM_001(ha)) { |
@@ -1755,7 +1765,7 @@ qla2x00_program_flash_address(scsi_qla_host_t *ha, uint32_t addr, uint8_t data, | |||
1755 | * Returns 0 on success, else non-zero. | 1765 | * Returns 0 on success, else non-zero. |
1756 | */ | 1766 | */ |
1757 | static int | 1767 | static int |
1758 | qla2x00_erase_flash(scsi_qla_host_t *ha, uint8_t man_id, uint8_t flash_id) | 1768 | qla2x00_erase_flash(struct qla_hw_data *ha, uint8_t man_id, uint8_t flash_id) |
1759 | { | 1769 | { |
1760 | /* Individual Sector Erase Command Sequence */ | 1770 | /* Individual Sector Erase Command Sequence */ |
1761 | if (IS_OEM_001(ha)) { | 1771 | if (IS_OEM_001(ha)) { |
@@ -1791,7 +1801,7 @@ qla2x00_erase_flash(scsi_qla_host_t *ha, uint8_t man_id, uint8_t flash_id) | |||
1791 | * Returns 0 on success, else non-zero. | 1801 | * Returns 0 on success, else non-zero. |
1792 | */ | 1802 | */ |
1793 | static int | 1803 | static int |
1794 | qla2x00_erase_flash_sector(scsi_qla_host_t *ha, uint32_t addr, | 1804 | qla2x00_erase_flash_sector(struct qla_hw_data *ha, uint32_t addr, |
1795 | uint32_t sec_mask, uint8_t man_id, uint8_t flash_id) | 1805 | uint32_t sec_mask, uint8_t man_id, uint8_t flash_id) |
1796 | { | 1806 | { |
1797 | /* Individual Sector Erase Command Sequence */ | 1807 | /* Individual Sector Erase Command Sequence */ |
@@ -1817,7 +1827,7 @@ qla2x00_erase_flash_sector(scsi_qla_host_t *ha, uint32_t addr, | |||
1817 | * @flash_id: Flash ID | 1827 | * @flash_id: Flash ID |
1818 | */ | 1828 | */ |
1819 | static void | 1829 | static void |
1820 | qla2x00_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id, | 1830 | qla2x00_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id, |
1821 | uint8_t *flash_id) | 1831 | uint8_t *flash_id) |
1822 | { | 1832 | { |
1823 | qla2x00_write_flash_byte(ha, 0x5555, 0xaa); | 1833 | qla2x00_write_flash_byte(ha, 0x5555, 0xaa); |
@@ -1831,8 +1841,8 @@ qla2x00_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id, | |||
1831 | } | 1841 | } |
1832 | 1842 | ||
1833 | static void | 1843 | static void |
1834 | qla2x00_read_flash_data(scsi_qla_host_t *ha, uint8_t *tmp_buf, uint32_t saddr, | 1844 | qla2x00_read_flash_data(struct qla_hw_data *ha, uint8_t *tmp_buf, |
1835 | uint32_t length) | 1845 | uint32_t saddr, uint32_t length) |
1836 | { | 1846 | { |
1837 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1847 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1838 | uint32_t midpoint, ilength; | 1848 | uint32_t midpoint, ilength; |
@@ -1856,14 +1866,15 @@ qla2x00_read_flash_data(scsi_qla_host_t *ha, uint8_t *tmp_buf, uint32_t saddr, | |||
1856 | } | 1866 | } |
1857 | 1867 | ||
1858 | static inline void | 1868 | static inline void |
1859 | qla2x00_suspend_hba(struct scsi_qla_host *ha) | 1869 | qla2x00_suspend_hba(struct scsi_qla_host *vha) |
1860 | { | 1870 | { |
1861 | int cnt; | 1871 | int cnt; |
1862 | unsigned long flags; | 1872 | unsigned long flags; |
1873 | struct qla_hw_data *ha = vha->hw; | ||
1863 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1874 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1864 | 1875 | ||
1865 | /* Suspend HBA. */ | 1876 | /* Suspend HBA. */ |
1866 | scsi_block_requests(ha->host); | 1877 | scsi_block_requests(vha->host); |
1867 | ha->isp_ops->disable_intrs(ha); | 1878 | ha->isp_ops->disable_intrs(ha); |
1868 | set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); | 1879 | set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); |
1869 | 1880 | ||
@@ -1884,26 +1895,29 @@ qla2x00_suspend_hba(struct scsi_qla_host *ha) | |||
1884 | } | 1895 | } |
1885 | 1896 | ||
1886 | static inline void | 1897 | static inline void |
1887 | qla2x00_resume_hba(struct scsi_qla_host *ha) | 1898 | qla2x00_resume_hba(struct scsi_qla_host *vha) |
1888 | { | 1899 | { |
1900 | struct qla_hw_data *ha = vha->hw; | ||
1901 | |||
1889 | /* Resume HBA. */ | 1902 | /* Resume HBA. */ |
1890 | clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); | 1903 | clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); |
1891 | set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags); | 1904 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1892 | qla2xxx_wake_dpc(ha); | 1905 | qla2xxx_wake_dpc(vha); |
1893 | qla2x00_wait_for_hba_online(ha); | 1906 | qla2x00_wait_for_hba_online(vha); |
1894 | scsi_unblock_requests(ha->host); | 1907 | scsi_unblock_requests(vha->host); |
1895 | } | 1908 | } |
1896 | 1909 | ||
1897 | uint8_t * | 1910 | uint8_t * |
1898 | qla2x00_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | 1911 | qla2x00_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf, |
1899 | uint32_t offset, uint32_t length) | 1912 | uint32_t offset, uint32_t length) |
1900 | { | 1913 | { |
1901 | uint32_t addr, midpoint; | 1914 | uint32_t addr, midpoint; |
1902 | uint8_t *data; | 1915 | uint8_t *data; |
1916 | struct qla_hw_data *ha = vha->hw; | ||
1903 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1917 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1904 | 1918 | ||
1905 | /* Suspend HBA. */ | 1919 | /* Suspend HBA. */ |
1906 | qla2x00_suspend_hba(ha); | 1920 | qla2x00_suspend_hba(vha); |
1907 | 1921 | ||
1908 | /* Go with read. */ | 1922 | /* Go with read. */ |
1909 | midpoint = ha->optrom_size / 2; | 1923 | midpoint = ha->optrom_size / 2; |
@@ -1922,13 +1936,13 @@ qla2x00_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | |||
1922 | qla2x00_flash_disable(ha); | 1936 | qla2x00_flash_disable(ha); |
1923 | 1937 | ||
1924 | /* Resume HBA. */ | 1938 | /* Resume HBA. */ |
1925 | qla2x00_resume_hba(ha); | 1939 | qla2x00_resume_hba(vha); |
1926 | 1940 | ||
1927 | return buf; | 1941 | return buf; |
1928 | } | 1942 | } |
1929 | 1943 | ||
1930 | int | 1944 | int |
1931 | qla2x00_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | 1945 | qla2x00_write_optrom_data(struct scsi_qla_host *vha, uint8_t *buf, |
1932 | uint32_t offset, uint32_t length) | 1946 | uint32_t offset, uint32_t length) |
1933 | { | 1947 | { |
1934 | 1948 | ||
@@ -1936,10 +1950,11 @@ qla2x00_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | |||
1936 | uint8_t man_id, flash_id, sec_number, data; | 1950 | uint8_t man_id, flash_id, sec_number, data; |
1937 | uint16_t wd; | 1951 | uint16_t wd; |
1938 | uint32_t addr, liter, sec_mask, rest_addr; | 1952 | uint32_t addr, liter, sec_mask, rest_addr; |
1953 | struct qla_hw_data *ha = vha->hw; | ||
1939 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1954 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1940 | 1955 | ||
1941 | /* Suspend HBA. */ | 1956 | /* Suspend HBA. */ |
1942 | qla2x00_suspend_hba(ha); | 1957 | qla2x00_suspend_hba(vha); |
1943 | 1958 | ||
1944 | rval = QLA_SUCCESS; | 1959 | rval = QLA_SUCCESS; |
1945 | sec_number = 0; | 1960 | sec_number = 0; |
@@ -2139,55 +2154,58 @@ update_flash: | |||
2139 | qla2x00_flash_disable(ha); | 2154 | qla2x00_flash_disable(ha); |
2140 | 2155 | ||
2141 | /* Resume HBA. */ | 2156 | /* Resume HBA. */ |
2142 | qla2x00_resume_hba(ha); | 2157 | qla2x00_resume_hba(vha); |
2143 | 2158 | ||
2144 | return rval; | 2159 | return rval; |
2145 | } | 2160 | } |
2146 | 2161 | ||
2147 | uint8_t * | 2162 | uint8_t * |
2148 | qla24xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | 2163 | qla24xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf, |
2149 | uint32_t offset, uint32_t length) | 2164 | uint32_t offset, uint32_t length) |
2150 | { | 2165 | { |
2166 | struct qla_hw_data *ha = vha->hw; | ||
2167 | |||
2151 | /* Suspend HBA. */ | 2168 | /* Suspend HBA. */ |
2152 | scsi_block_requests(ha->host); | 2169 | scsi_block_requests(vha->host); |
2153 | set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); | 2170 | set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); |
2154 | 2171 | ||
2155 | /* Go with read. */ | 2172 | /* Go with read. */ |
2156 | qla24xx_read_flash_data(ha, (uint32_t *)buf, offset >> 2, length >> 2); | 2173 | qla24xx_read_flash_data(vha, (uint32_t *)buf, offset >> 2, length >> 2); |
2157 | 2174 | ||
2158 | /* Resume HBA. */ | 2175 | /* Resume HBA. */ |
2159 | clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); | 2176 | clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); |
2160 | scsi_unblock_requests(ha->host); | 2177 | scsi_unblock_requests(vha->host); |
2161 | 2178 | ||
2162 | return buf; | 2179 | return buf; |
2163 | } | 2180 | } |
2164 | 2181 | ||
2165 | int | 2182 | int |
2166 | qla24xx_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | 2183 | qla24xx_write_optrom_data(struct scsi_qla_host *vha, uint8_t *buf, |
2167 | uint32_t offset, uint32_t length) | 2184 | uint32_t offset, uint32_t length) |
2168 | { | 2185 | { |
2169 | int rval; | 2186 | int rval; |
2187 | struct qla_hw_data *ha = vha->hw; | ||
2170 | 2188 | ||
2171 | /* Suspend HBA. */ | 2189 | /* Suspend HBA. */ |
2172 | scsi_block_requests(ha->host); | 2190 | scsi_block_requests(vha->host); |
2173 | set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); | 2191 | set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); |
2174 | 2192 | ||
2175 | /* Go with write. */ | 2193 | /* Go with write. */ |
2176 | rval = qla24xx_write_flash_data(ha, (uint32_t *)buf, offset >> 2, | 2194 | rval = qla24xx_write_flash_data(vha, (uint32_t *)buf, offset >> 2, |
2177 | length >> 2); | 2195 | length >> 2); |
2178 | 2196 | ||
2179 | /* Resume HBA -- RISC reset needed. */ | 2197 | /* Resume HBA -- RISC reset needed. */ |
2180 | clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); | 2198 | clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); |
2181 | set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags); | 2199 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
2182 | qla2xxx_wake_dpc(ha); | 2200 | qla2xxx_wake_dpc(vha); |
2183 | qla2x00_wait_for_hba_online(ha); | 2201 | qla2x00_wait_for_hba_online(vha); |
2184 | scsi_unblock_requests(ha->host); | 2202 | scsi_unblock_requests(vha->host); |
2185 | 2203 | ||
2186 | return rval; | 2204 | return rval; |
2187 | } | 2205 | } |
2188 | 2206 | ||
2189 | uint8_t * | 2207 | uint8_t * |
2190 | qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | 2208 | qla25xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf, |
2191 | uint32_t offset, uint32_t length) | 2209 | uint32_t offset, uint32_t length) |
2192 | { | 2210 | { |
2193 | int rval; | 2211 | int rval; |
@@ -2195,6 +2213,7 @@ qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | |||
2195 | void *optrom; | 2213 | void *optrom; |
2196 | uint8_t *pbuf; | 2214 | uint8_t *pbuf; |
2197 | uint32_t faddr, left, burst; | 2215 | uint32_t faddr, left, burst; |
2216 | struct qla_hw_data *ha = vha->hw; | ||
2198 | 2217 | ||
2199 | if (offset & 0xfff) | 2218 | if (offset & 0xfff) |
2200 | goto slow_read; | 2219 | goto slow_read; |
@@ -2219,7 +2238,7 @@ qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | |||
2219 | if (burst > left) | 2238 | if (burst > left) |
2220 | burst = left; | 2239 | burst = left; |
2221 | 2240 | ||
2222 | rval = qla2x00_dump_ram(ha, optrom_dma, | 2241 | rval = qla2x00_dump_ram(vha, optrom_dma, |
2223 | flash_data_to_access_addr(faddr), burst); | 2242 | flash_data_to_access_addr(faddr), burst); |
2224 | if (rval) { | 2243 | if (rval) { |
2225 | qla_printk(KERN_WARNING, ha, | 2244 | qla_printk(KERN_WARNING, ha, |
@@ -2248,7 +2267,7 @@ qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, | |||
2248 | return buf; | 2267 | return buf; |
2249 | 2268 | ||
2250 | slow_read: | 2269 | slow_read: |
2251 | return qla24xx_read_optrom_data(ha, buf, offset, length); | 2270 | return qla24xx_read_optrom_data(vha, buf, offset, length); |
2252 | } | 2271 | } |
2253 | 2272 | ||
2254 | /** | 2273 | /** |
@@ -2270,7 +2289,7 @@ slow_read: | |||
2270 | * Returns QLA_SUCCESS on successful retrieval of version. | 2289 | * Returns QLA_SUCCESS on successful retrieval of version. |
2271 | */ | 2290 | */ |
2272 | static void | 2291 | static void |
2273 | qla2x00_get_fcode_version(scsi_qla_host_t *ha, uint32_t pcids) | 2292 | qla2x00_get_fcode_version(struct qla_hw_data *ha, uint32_t pcids) |
2274 | { | 2293 | { |
2275 | int ret = QLA_FUNCTION_FAILED; | 2294 | int ret = QLA_FUNCTION_FAILED; |
2276 | uint32_t istart, iend, iter, vend; | 2295 | uint32_t istart, iend, iter, vend; |
@@ -2344,13 +2363,14 @@ qla2x00_get_fcode_version(scsi_qla_host_t *ha, uint32_t pcids) | |||
2344 | } | 2363 | } |
2345 | 2364 | ||
2346 | int | 2365 | int |
2347 | qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | 2366 | qla2x00_get_flash_version(scsi_qla_host_t *vha, void *mbuf) |
2348 | { | 2367 | { |
2349 | int ret = QLA_SUCCESS; | 2368 | int ret = QLA_SUCCESS; |
2350 | uint8_t code_type, last_image; | 2369 | uint8_t code_type, last_image; |
2351 | uint32_t pcihdr, pcids; | 2370 | uint32_t pcihdr, pcids; |
2352 | uint8_t *dbyte; | 2371 | uint8_t *dbyte; |
2353 | uint16_t *dcode; | 2372 | uint16_t *dcode; |
2373 | struct qla_hw_data *ha = vha->hw; | ||
2354 | 2374 | ||
2355 | if (!ha->pio_address || !mbuf) | 2375 | if (!ha->pio_address || !mbuf) |
2356 | return QLA_FUNCTION_FAILED; | 2376 | return QLA_FUNCTION_FAILED; |
@@ -2370,8 +2390,8 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2370 | if (qla2x00_read_flash_byte(ha, pcihdr) != 0x55 || | 2390 | if (qla2x00_read_flash_byte(ha, pcihdr) != 0x55 || |
2371 | qla2x00_read_flash_byte(ha, pcihdr + 0x01) != 0xaa) { | 2391 | qla2x00_read_flash_byte(ha, pcihdr + 0x01) != 0xaa) { |
2372 | /* No signature */ | 2392 | /* No signature */ |
2373 | DEBUG2(printk("scsi(%ld): No matching ROM " | 2393 | DEBUG2(qla_printk(KERN_DEBUG, ha, "No matching ROM " |
2374 | "signature.\n", ha->host_no)); | 2394 | "signature.\n")); |
2375 | ret = QLA_FUNCTION_FAILED; | 2395 | ret = QLA_FUNCTION_FAILED; |
2376 | break; | 2396 | break; |
2377 | } | 2397 | } |
@@ -2387,8 +2407,8 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2387 | qla2x00_read_flash_byte(ha, pcids + 0x2) != 'I' || | 2407 | qla2x00_read_flash_byte(ha, pcids + 0x2) != 'I' || |
2388 | qla2x00_read_flash_byte(ha, pcids + 0x3) != 'R') { | 2408 | qla2x00_read_flash_byte(ha, pcids + 0x3) != 'R') { |
2389 | /* Incorrect header. */ | 2409 | /* Incorrect header. */ |
2390 | DEBUG2(printk("%s(): PCI data struct not found " | 2410 | DEBUG2(qla_printk(KERN_INFO, ha, "PCI data struct not " |
2391 | "pcir_adr=%x.\n", __func__, pcids)); | 2411 | "found pcir_adr=%x.\n", pcids)); |
2392 | ret = QLA_FUNCTION_FAILED; | 2412 | ret = QLA_FUNCTION_FAILED; |
2393 | break; | 2413 | break; |
2394 | } | 2414 | } |
@@ -2402,7 +2422,7 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2402 | qla2x00_read_flash_byte(ha, pcids + 0x12); | 2422 | qla2x00_read_flash_byte(ha, pcids + 0x12); |
2403 | ha->bios_revision[1] = | 2423 | ha->bios_revision[1] = |
2404 | qla2x00_read_flash_byte(ha, pcids + 0x13); | 2424 | qla2x00_read_flash_byte(ha, pcids + 0x13); |
2405 | DEBUG3(printk("%s(): read BIOS %d.%d.\n", __func__, | 2425 | DEBUG3(qla_printk(KERN_DEBUG, ha, "read BIOS %d.%d.\n", |
2406 | ha->bios_revision[1], ha->bios_revision[0])); | 2426 | ha->bios_revision[1], ha->bios_revision[0])); |
2407 | break; | 2427 | break; |
2408 | case ROM_CODE_TYPE_FCODE: | 2428 | case ROM_CODE_TYPE_FCODE: |
@@ -2416,12 +2436,12 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2416 | qla2x00_read_flash_byte(ha, pcids + 0x12); | 2436 | qla2x00_read_flash_byte(ha, pcids + 0x12); |
2417 | ha->efi_revision[1] = | 2437 | ha->efi_revision[1] = |
2418 | qla2x00_read_flash_byte(ha, pcids + 0x13); | 2438 | qla2x00_read_flash_byte(ha, pcids + 0x13); |
2419 | DEBUG3(printk("%s(): read EFI %d.%d.\n", __func__, | 2439 | DEBUG3(qla_printk(KERN_DEBUG, ha, "read EFI %d.%d.\n", |
2420 | ha->efi_revision[1], ha->efi_revision[0])); | 2440 | ha->efi_revision[1], ha->efi_revision[0])); |
2421 | break; | 2441 | break; |
2422 | default: | 2442 | default: |
2423 | DEBUG2(printk("%s(): Unrecognized code type %x at " | 2443 | DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized code " |
2424 | "pcids %x.\n", __func__, code_type, pcids)); | 2444 | "type %x at pcids %x.\n", code_type, pcids)); |
2425 | break; | 2445 | break; |
2426 | } | 2446 | } |
2427 | 2447 | ||
@@ -2441,16 +2461,16 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2441 | 2461 | ||
2442 | qla2x00_read_flash_data(ha, dbyte, ha->flt_region_fw * 4 + 10, | 2462 | qla2x00_read_flash_data(ha, dbyte, ha->flt_region_fw * 4 + 10, |
2443 | 8); | 2463 | 8); |
2444 | DEBUG3(printk("%s(%ld): dumping fw ver from flash:\n", | 2464 | DEBUG3(qla_printk(KERN_DEBUG, ha, "dumping fw ver from " |
2445 | __func__, ha->host_no)); | 2465 | "flash:\n")); |
2446 | DEBUG3(qla2x00_dump_buffer((uint8_t *)dbyte, 8)); | 2466 | DEBUG3(qla2x00_dump_buffer((uint8_t *)dbyte, 8)); |
2447 | 2467 | ||
2448 | if ((dcode[0] == 0xffff && dcode[1] == 0xffff && | 2468 | if ((dcode[0] == 0xffff && dcode[1] == 0xffff && |
2449 | dcode[2] == 0xffff && dcode[3] == 0xffff) || | 2469 | dcode[2] == 0xffff && dcode[3] == 0xffff) || |
2450 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | 2470 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && |
2451 | dcode[3] == 0)) { | 2471 | dcode[3] == 0)) { |
2452 | DEBUG2(printk("%s(): Unrecognized fw revision at " | 2472 | DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized fw " |
2453 | "%x.\n", __func__, ha->flt_region_fw * 4)); | 2473 | "revision at %x.\n", ha->flt_region_fw * 4)); |
2454 | } else { | 2474 | } else { |
2455 | /* values are in big endian */ | 2475 | /* values are in big endian */ |
2456 | ha->fw_revision[0] = dbyte[0] << 16 | dbyte[1]; | 2476 | ha->fw_revision[0] = dbyte[0] << 16 | dbyte[1]; |
@@ -2465,7 +2485,7 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2465 | } | 2485 | } |
2466 | 2486 | ||
2467 | int | 2487 | int |
2468 | qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | 2488 | qla24xx_get_flash_version(scsi_qla_host_t *vha, void *mbuf) |
2469 | { | 2489 | { |
2470 | int ret = QLA_SUCCESS; | 2490 | int ret = QLA_SUCCESS; |
2471 | uint32_t pcihdr, pcids; | 2491 | uint32_t pcihdr, pcids; |
@@ -2473,6 +2493,7 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2473 | uint8_t *bcode; | 2493 | uint8_t *bcode; |
2474 | uint8_t code_type, last_image; | 2494 | uint8_t code_type, last_image; |
2475 | int i; | 2495 | int i; |
2496 | struct qla_hw_data *ha = vha->hw; | ||
2476 | 2497 | ||
2477 | if (!mbuf) | 2498 | if (!mbuf) |
2478 | return QLA_FUNCTION_FAILED; | 2499 | return QLA_FUNCTION_FAILED; |
@@ -2489,12 +2510,12 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2489 | last_image = 1; | 2510 | last_image = 1; |
2490 | do { | 2511 | do { |
2491 | /* Verify PCI expansion ROM header. */ | 2512 | /* Verify PCI expansion ROM header. */ |
2492 | qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, 0x20); | 2513 | qla24xx_read_flash_data(vha, dcode, pcihdr >> 2, 0x20); |
2493 | bcode = mbuf + (pcihdr % 4); | 2514 | bcode = mbuf + (pcihdr % 4); |
2494 | if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) { | 2515 | if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) { |
2495 | /* No signature */ | 2516 | /* No signature */ |
2496 | DEBUG2(printk("scsi(%ld): No matching ROM " | 2517 | DEBUG2(qla_printk(KERN_DEBUG, ha, "No matching ROM " |
2497 | "signature.\n", ha->host_no)); | 2518 | "signature.\n")); |
2498 | ret = QLA_FUNCTION_FAILED; | 2519 | ret = QLA_FUNCTION_FAILED; |
2499 | break; | 2520 | break; |
2500 | } | 2521 | } |
@@ -2502,15 +2523,15 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2502 | /* Locate PCI data structure. */ | 2523 | /* Locate PCI data structure. */ |
2503 | pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]); | 2524 | pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]); |
2504 | 2525 | ||
2505 | qla24xx_read_flash_data(ha, dcode, pcids >> 2, 0x20); | 2526 | qla24xx_read_flash_data(vha, dcode, pcids >> 2, 0x20); |
2506 | bcode = mbuf + (pcihdr % 4); | 2527 | bcode = mbuf + (pcihdr % 4); |
2507 | 2528 | ||
2508 | /* Validate signature of PCI data structure. */ | 2529 | /* Validate signature of PCI data structure. */ |
2509 | if (bcode[0x0] != 'P' || bcode[0x1] != 'C' || | 2530 | if (bcode[0x0] != 'P' || bcode[0x1] != 'C' || |
2510 | bcode[0x2] != 'I' || bcode[0x3] != 'R') { | 2531 | bcode[0x2] != 'I' || bcode[0x3] != 'R') { |
2511 | /* Incorrect header. */ | 2532 | /* Incorrect header. */ |
2512 | DEBUG2(printk("%s(): PCI data struct not found " | 2533 | DEBUG2(qla_printk(KERN_INFO, ha, "PCI data struct not " |
2513 | "pcir_adr=%x.\n", __func__, pcids)); | 2534 | "found pcir_adr=%x.\n", pcids)); |
2514 | ret = QLA_FUNCTION_FAILED; | 2535 | ret = QLA_FUNCTION_FAILED; |
2515 | break; | 2536 | break; |
2516 | } | 2537 | } |
@@ -2522,26 +2543,26 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2522 | /* Intel x86, PC-AT compatible. */ | 2543 | /* Intel x86, PC-AT compatible. */ |
2523 | ha->bios_revision[0] = bcode[0x12]; | 2544 | ha->bios_revision[0] = bcode[0x12]; |
2524 | ha->bios_revision[1] = bcode[0x13]; | 2545 | ha->bios_revision[1] = bcode[0x13]; |
2525 | DEBUG3(printk("%s(): read BIOS %d.%d.\n", __func__, | 2546 | DEBUG3(qla_printk(KERN_DEBUG, ha, "read BIOS %d.%d.\n", |
2526 | ha->bios_revision[1], ha->bios_revision[0])); | 2547 | ha->bios_revision[1], ha->bios_revision[0])); |
2527 | break; | 2548 | break; |
2528 | case ROM_CODE_TYPE_FCODE: | 2549 | case ROM_CODE_TYPE_FCODE: |
2529 | /* Open Firmware standard for PCI (FCode). */ | 2550 | /* Open Firmware standard for PCI (FCode). */ |
2530 | ha->fcode_revision[0] = bcode[0x12]; | 2551 | ha->fcode_revision[0] = bcode[0x12]; |
2531 | ha->fcode_revision[1] = bcode[0x13]; | 2552 | ha->fcode_revision[1] = bcode[0x13]; |
2532 | DEBUG3(printk("%s(): read FCODE %d.%d.\n", __func__, | 2553 | DEBUG3(qla_printk(KERN_DEBUG, ha, "read FCODE %d.%d.\n", |
2533 | ha->fcode_revision[1], ha->fcode_revision[0])); | 2554 | ha->fcode_revision[1], ha->fcode_revision[0])); |
2534 | break; | 2555 | break; |
2535 | case ROM_CODE_TYPE_EFI: | 2556 | case ROM_CODE_TYPE_EFI: |
2536 | /* Extensible Firmware Interface (EFI). */ | 2557 | /* Extensible Firmware Interface (EFI). */ |
2537 | ha->efi_revision[0] = bcode[0x12]; | 2558 | ha->efi_revision[0] = bcode[0x12]; |
2538 | ha->efi_revision[1] = bcode[0x13]; | 2559 | ha->efi_revision[1] = bcode[0x13]; |
2539 | DEBUG3(printk("%s(): read EFI %d.%d.\n", __func__, | 2560 | DEBUG3(qla_printk(KERN_DEBUG, ha, "read EFI %d.%d.\n", |
2540 | ha->efi_revision[1], ha->efi_revision[0])); | 2561 | ha->efi_revision[1], ha->efi_revision[0])); |
2541 | break; | 2562 | break; |
2542 | default: | 2563 | default: |
2543 | DEBUG2(printk("%s(): Unrecognized code type %x at " | 2564 | DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized code " |
2544 | "pcids %x.\n", __func__, code_type, pcids)); | 2565 | "type %x at pcids %x.\n", code_type, pcids)); |
2545 | break; | 2566 | break; |
2546 | } | 2567 | } |
2547 | 2568 | ||
@@ -2555,7 +2576,7 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2555 | memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); | 2576 | memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); |
2556 | dcode = mbuf; | 2577 | dcode = mbuf; |
2557 | 2578 | ||
2558 | qla24xx_read_flash_data(ha, dcode, ha->flt_region_fw + 4, 4); | 2579 | qla24xx_read_flash_data(vha, dcode, ha->flt_region_fw + 4, 4); |
2559 | for (i = 0; i < 4; i++) | 2580 | for (i = 0; i < 4; i++) |
2560 | dcode[i] = be32_to_cpu(dcode[i]); | 2581 | dcode[i] = be32_to_cpu(dcode[i]); |
2561 | 2582 | ||
@@ -2563,8 +2584,8 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) | |||
2563 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | 2584 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || |
2564 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | 2585 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && |
2565 | dcode[3] == 0)) { | 2586 | dcode[3] == 0)) { |
2566 | DEBUG2(printk("%s(): Unrecognized fw version at %x.\n", | 2587 | DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized fw " |
2567 | __func__, ha->flt_region_fw)); | 2588 | "revision at %x.\n", ha->flt_region_fw * 4)); |
2568 | } else { | 2589 | } else { |
2569 | ha->fw_revision[0] = dcode[0]; | 2590 | ha->fw_revision[0] = dcode[0]; |
2570 | ha->fw_revision[1] = dcode[1]; | 2591 | ha->fw_revision[1] = dcode[1]; |
@@ -2593,8 +2614,9 @@ qla2xxx_is_vpd_valid(uint8_t *pos, uint8_t *end) | |||
2593 | } | 2614 | } |
2594 | 2615 | ||
2595 | int | 2616 | int |
2596 | qla2xxx_get_vpd_field(scsi_qla_host_t *ha, char *key, char *str, size_t size) | 2617 | qla2xxx_get_vpd_field(scsi_qla_host_t *vha, char *key, char *str, size_t size) |
2597 | { | 2618 | { |
2619 | struct qla_hw_data *ha = vha->hw; | ||
2598 | uint8_t *pos = ha->vpd; | 2620 | uint8_t *pos = ha->vpd; |
2599 | uint8_t *end = pos + ha->vpd_size; | 2621 | uint8_t *end = pos + ha->vpd_size; |
2600 | int len = 0; | 2622 | int len = 0; |
@@ -2621,9 +2643,10 @@ qla2xxx_get_vpd_field(scsi_qla_host_t *ha, char *key, char *str, size_t size) | |||
2621 | } | 2643 | } |
2622 | 2644 | ||
2623 | static int | 2645 | static int |
2624 | qla2xxx_hw_event_store(scsi_qla_host_t *ha, uint32_t *fdata) | 2646 | qla2xxx_hw_event_store(scsi_qla_host_t *vha, uint32_t *fdata) |
2625 | { | 2647 | { |
2626 | uint32_t d[2], faddr; | 2648 | uint32_t d[2], faddr; |
2649 | struct qla_hw_data *ha = vha->hw; | ||
2627 | 2650 | ||
2628 | /* Locate first empty entry. */ | 2651 | /* Locate first empty entry. */ |
2629 | for (;;) { | 2652 | for (;;) { |
@@ -2634,7 +2657,7 @@ qla2xxx_hw_event_store(scsi_qla_host_t *ha, uint32_t *fdata) | |||
2634 | return QLA_MEMORY_ALLOC_FAILED; | 2657 | return QLA_MEMORY_ALLOC_FAILED; |
2635 | } | 2658 | } |
2636 | 2659 | ||
2637 | qla24xx_read_flash_data(ha, d, ha->hw_event_ptr, 2); | 2660 | qla24xx_read_flash_data(vha, d, ha->hw_event_ptr, 2); |
2638 | faddr = flash_data_to_access_addr(ha->hw_event_ptr); | 2661 | faddr = flash_data_to_access_addr(ha->hw_event_ptr); |
2639 | ha->hw_event_ptr += FA_HW_EVENT_ENTRY_SIZE; | 2662 | ha->hw_event_ptr += FA_HW_EVENT_ENTRY_SIZE; |
2640 | if (d[0] == __constant_cpu_to_le32(0xffffffff) && | 2663 | if (d[0] == __constant_cpu_to_le32(0xffffffff) && |
@@ -2655,12 +2678,12 @@ qla2xxx_hw_event_store(scsi_qla_host_t *ha, uint32_t *fdata) | |||
2655 | } | 2678 | } |
2656 | 2679 | ||
2657 | int | 2680 | int |
2658 | qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1, | 2681 | qla2xxx_hw_event_log(scsi_qla_host_t *vha, uint16_t code, uint16_t d1, |
2659 | uint16_t d2, uint16_t d3) | 2682 | uint16_t d2, uint16_t d3) |
2660 | { | 2683 | { |
2661 | #define QMARK(a, b, c, d) \ | 2684 | #define QMARK(a, b, c, d) \ |
2662 | cpu_to_le32(LSB(a) << 24 | LSB(b) << 16 | LSB(c) << 8 | LSB(d)) | 2685 | cpu_to_le32(LSB(a) << 24 | LSB(b) << 16 | LSB(c) << 8 | LSB(d)) |
2663 | 2686 | struct qla_hw_data *ha = vha->hw; | |
2664 | int rval; | 2687 | int rval; |
2665 | uint32_t marker[2], fdata[4]; | 2688 | uint32_t marker[2], fdata[4]; |
2666 | 2689 | ||
@@ -2681,7 +2704,7 @@ qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1, | |||
2681 | /* Locate marker. */ | 2704 | /* Locate marker. */ |
2682 | ha->hw_event_ptr = ha->flt_region_hw_event; | 2705 | ha->hw_event_ptr = ha->flt_region_hw_event; |
2683 | for (;;) { | 2706 | for (;;) { |
2684 | qla24xx_read_flash_data(ha, fdata, ha->hw_event_ptr, | 2707 | qla24xx_read_flash_data(vha, fdata, ha->hw_event_ptr, |
2685 | 4); | 2708 | 4); |
2686 | if (fdata[0] == __constant_cpu_to_le32(0xffffffff) && | 2709 | if (fdata[0] == __constant_cpu_to_le32(0xffffffff) && |
2687 | fdata[1] == __constant_cpu_to_le32(0xffffffff)) | 2710 | fdata[1] == __constant_cpu_to_le32(0xffffffff)) |
@@ -2700,7 +2723,7 @@ qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1, | |||
2700 | } | 2723 | } |
2701 | /* No marker, write it. */ | 2724 | /* No marker, write it. */ |
2702 | if (!ha->flags.hw_event_marker_found) { | 2725 | if (!ha->flags.hw_event_marker_found) { |
2703 | rval = qla2xxx_hw_event_store(ha, marker); | 2726 | rval = qla2xxx_hw_event_store(vha, marker); |
2704 | if (rval != QLA_SUCCESS) { | 2727 | if (rval != QLA_SUCCESS) { |
2705 | DEBUG2(qla_printk(KERN_WARNING, ha, | 2728 | DEBUG2(qla_printk(KERN_WARNING, ha, |
2706 | "HW event -- Failed marker write=%x.!\n", | 2729 | "HW event -- Failed marker write=%x.!\n", |
@@ -2714,7 +2737,7 @@ qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1, | |||
2714 | /* Store error. */ | 2737 | /* Store error. */ |
2715 | fdata[0] = cpu_to_le32(code << 16 | d1); | 2738 | fdata[0] = cpu_to_le32(code << 16 | d1); |
2716 | fdata[1] = cpu_to_le32(d2 << 16 | d3); | 2739 | fdata[1] = cpu_to_le32(d2 << 16 | d3); |
2717 | rval = qla2xxx_hw_event_store(ha, fdata); | 2740 | rval = qla2xxx_hw_event_store(vha, fdata); |
2718 | if (rval != QLA_SUCCESS) { | 2741 | if (rval != QLA_SUCCESS) { |
2719 | DEBUG2(qla_printk(KERN_WARNING, ha, | 2742 | DEBUG2(qla_printk(KERN_WARNING, ha, |
2720 | "HW event -- Failed error write=%x.!\n", | 2743 | "HW event -- Failed error write=%x.!\n", |