diff options
author | Andrew Vasquez <andrew.vasquez@qlogic.com> | 2009-01-05 14:18:11 -0500 |
---|---|---|
committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2009-01-07 16:51:44 -0500 |
commit | 3a03eb797ce76ae8868a1497e9e746ad0add1e3b (patch) | |
tree | 2dc17c39b7c1e35248b35f7433de8711f0b6656a /drivers/scsi/qla2xxx/qla_os.c | |
parent | 444786d7fdd770f67e29a068ec8ee981d323f7a7 (diff) |
[SCSI] qla2xxx: Add ISP81XX support.
Codes to support new FCoE boards.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_os.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_os.c | 113 |
1 files changed, 91 insertions, 22 deletions
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 1b475c5fa6f4..4a71f522f925 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -404,26 +404,9 @@ static char * | |||
404 | qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str) | 404 | qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str) |
405 | { | 405 | { |
406 | struct qla_hw_data *ha = vha->hw; | 406 | struct qla_hw_data *ha = vha->hw; |
407 | sprintf(str, "%d.%02d.%02d ", ha->fw_major_version, | ||
408 | ha->fw_minor_version, | ||
409 | ha->fw_subminor_version); | ||
410 | 407 | ||
411 | if (ha->fw_attributes & BIT_0) | 408 | sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version, |
412 | strcat(str, "[Class 2] "); | 409 | ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); |
413 | if (ha->fw_attributes & BIT_1) | ||
414 | strcat(str, "[IP] "); | ||
415 | if (ha->fw_attributes & BIT_2) | ||
416 | strcat(str, "[Multi-ID] "); | ||
417 | if (ha->fw_attributes & BIT_3) | ||
418 | strcat(str, "[SB-2] "); | ||
419 | if (ha->fw_attributes & BIT_4) | ||
420 | strcat(str, "[T10 CRC] "); | ||
421 | if (ha->fw_attributes & BIT_5) | ||
422 | strcat(str, "[VI] "); | ||
423 | if (ha->fw_attributes & BIT_10) | ||
424 | strcat(str, "[84XX] "); | ||
425 | if (ha->fw_attributes & BIT_13) | ||
426 | strcat(str, "[Experimental]"); | ||
427 | return str; | 410 | return str; |
428 | } | 411 | } |
429 | 412 | ||
@@ -1489,6 +1472,44 @@ static struct isp_operations qla25xx_isp_ops = { | |||
1489 | .rd_req_reg = qla24xx_rd_req_reg, | 1472 | .rd_req_reg = qla24xx_rd_req_reg, |
1490 | }; | 1473 | }; |
1491 | 1474 | ||
1475 | static struct isp_operations qla81xx_isp_ops = { | ||
1476 | .pci_config = qla25xx_pci_config, | ||
1477 | .reset_chip = qla24xx_reset_chip, | ||
1478 | .chip_diag = qla24xx_chip_diag, | ||
1479 | .config_rings = qla24xx_config_rings, | ||
1480 | .reset_adapter = qla24xx_reset_adapter, | ||
1481 | .nvram_config = qla81xx_nvram_config, | ||
1482 | .update_fw_options = qla81xx_update_fw_options, | ||
1483 | .load_risc = qla24xx_load_risc, | ||
1484 | .pci_info_str = qla24xx_pci_info_str, | ||
1485 | .fw_version_str = qla24xx_fw_version_str, | ||
1486 | .intr_handler = qla24xx_intr_handler, | ||
1487 | .enable_intrs = qla24xx_enable_intrs, | ||
1488 | .disable_intrs = qla24xx_disable_intrs, | ||
1489 | .abort_command = qla24xx_abort_command, | ||
1490 | .target_reset = qla24xx_abort_target, | ||
1491 | .lun_reset = qla24xx_lun_reset, | ||
1492 | .fabric_login = qla24xx_login_fabric, | ||
1493 | .fabric_logout = qla24xx_fabric_logout, | ||
1494 | .calc_req_entries = NULL, | ||
1495 | .build_iocbs = NULL, | ||
1496 | .prep_ms_iocb = qla24xx_prep_ms_iocb, | ||
1497 | .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb, | ||
1498 | .read_nvram = qla25xx_read_nvram_data, | ||
1499 | .write_nvram = qla25xx_write_nvram_data, | ||
1500 | .fw_dump = qla81xx_fw_dump, | ||
1501 | .beacon_on = qla24xx_beacon_on, | ||
1502 | .beacon_off = qla24xx_beacon_off, | ||
1503 | .beacon_blink = qla24xx_beacon_blink, | ||
1504 | .read_optrom = qla25xx_read_optrom_data, | ||
1505 | .write_optrom = qla24xx_write_optrom_data, | ||
1506 | .get_flash_version = qla24xx_get_flash_version, | ||
1507 | .start_scsi = qla24xx_start_scsi, | ||
1508 | .wrt_req_reg = qla24xx_wrt_req_reg, | ||
1509 | .wrt_rsp_reg = qla24xx_wrt_rsp_reg, | ||
1510 | .rd_req_reg = qla24xx_rd_req_reg, | ||
1511 | }; | ||
1512 | |||
1492 | static inline void | 1513 | static inline void |
1493 | qla2x00_set_isp_flags(struct qla_hw_data *ha) | 1514 | qla2x00_set_isp_flags(struct qla_hw_data *ha) |
1494 | { | 1515 | { |
@@ -1568,6 +1589,13 @@ qla2x00_set_isp_flags(struct qla_hw_data *ha) | |||
1568 | ha->device_type |= DT_IIDMA; | 1589 | ha->device_type |= DT_IIDMA; |
1569 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; | 1590 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; |
1570 | break; | 1591 | break; |
1592 | case PCI_DEVICE_ID_QLOGIC_ISP8001: | ||
1593 | ha->device_type |= DT_ISP8001; | ||
1594 | ha->device_type |= DT_ZIO_SUPPORTED; | ||
1595 | ha->device_type |= DT_FWI2; | ||
1596 | ha->device_type |= DT_IIDMA; | ||
1597 | ha->fw_srisc_address = RISC_START_ADDRESS_2400; | ||
1598 | break; | ||
1571 | } | 1599 | } |
1572 | } | 1600 | } |
1573 | 1601 | ||
@@ -1630,7 +1658,7 @@ skip_pio: | |||
1630 | 1658 | ||
1631 | /* Determine queue resources */ | 1659 | /* Determine queue resources */ |
1632 | ha->max_queues = 1; | 1660 | ha->max_queues = 1; |
1633 | if (ql2xmaxqueues <= 1 || !IS_QLA25XX(ha)) | 1661 | if (ql2xmaxqueues <= 1 || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) |
1634 | goto mqiobase_exit; | 1662 | goto mqiobase_exit; |
1635 | ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), | 1663 | ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), |
1636 | pci_resource_len(ha->pdev, 3)); | 1664 | pci_resource_len(ha->pdev, 3)); |
@@ -1707,7 +1735,8 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1707 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 || | 1735 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 || |
1708 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 || | 1736 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 || |
1709 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || | 1737 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 || |
1710 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532) { | 1738 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 || |
1739 | pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001) { | ||
1711 | bars = pci_select_bars(pdev, IORESOURCE_MEM); | 1740 | bars = pci_select_bars(pdev, IORESOURCE_MEM); |
1712 | sht = &qla24xx_driver_template; | 1741 | sht = &qla24xx_driver_template; |
1713 | mem_only = 1; | 1742 | mem_only = 1; |
@@ -1761,6 +1790,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1761 | rsp_length = RESPONSE_ENTRY_CNT_2100; | 1790 | rsp_length = RESPONSE_ENTRY_CNT_2100; |
1762 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; | 1791 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; |
1763 | ha->gid_list_info_size = 4; | 1792 | ha->gid_list_info_size = 4; |
1793 | ha->flash_conf_off = ~0; | ||
1794 | ha->flash_data_off = ~0; | ||
1795 | ha->nvram_conf_off = ~0; | ||
1796 | ha->nvram_data_off = ~0; | ||
1764 | ha->isp_ops = &qla2100_isp_ops; | 1797 | ha->isp_ops = &qla2100_isp_ops; |
1765 | } else if (IS_QLA2200(ha)) { | 1798 | } else if (IS_QLA2200(ha)) { |
1766 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1799 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
@@ -1768,6 +1801,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1768 | rsp_length = RESPONSE_ENTRY_CNT_2100; | 1801 | rsp_length = RESPONSE_ENTRY_CNT_2100; |
1769 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; | 1802 | ha->max_loop_id = SNS_LAST_LOOP_ID_2100; |
1770 | ha->gid_list_info_size = 4; | 1803 | ha->gid_list_info_size = 4; |
1804 | ha->flash_conf_off = ~0; | ||
1805 | ha->flash_data_off = ~0; | ||
1806 | ha->nvram_conf_off = ~0; | ||
1807 | ha->nvram_data_off = ~0; | ||
1771 | ha->isp_ops = &qla2100_isp_ops; | 1808 | ha->isp_ops = &qla2100_isp_ops; |
1772 | } else if (IS_QLA23XX(ha)) { | 1809 | } else if (IS_QLA23XX(ha)) { |
1773 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1810 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
@@ -1777,6 +1814,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1777 | ha->gid_list_info_size = 6; | 1814 | ha->gid_list_info_size = 6; |
1778 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) | 1815 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
1779 | ha->optrom_size = OPTROM_SIZE_2322; | 1816 | ha->optrom_size = OPTROM_SIZE_2322; |
1817 | ha->flash_conf_off = ~0; | ||
1818 | ha->flash_data_off = ~0; | ||
1819 | ha->nvram_conf_off = ~0; | ||
1820 | ha->nvram_data_off = ~0; | ||
1780 | ha->isp_ops = &qla2300_isp_ops; | 1821 | ha->isp_ops = &qla2300_isp_ops; |
1781 | } else if (IS_QLA24XX_TYPE(ha)) { | 1822 | } else if (IS_QLA24XX_TYPE(ha)) { |
1782 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1823 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
@@ -1788,6 +1829,10 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1788 | ha->optrom_size = OPTROM_SIZE_24XX; | 1829 | ha->optrom_size = OPTROM_SIZE_24XX; |
1789 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; | 1830 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; |
1790 | ha->isp_ops = &qla24xx_isp_ops; | 1831 | ha->isp_ops = &qla24xx_isp_ops; |
1832 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; | ||
1833 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA; | ||
1834 | ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; | ||
1835 | ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; | ||
1791 | } else if (IS_QLA25XX(ha)) { | 1836 | } else if (IS_QLA25XX(ha)) { |
1792 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | 1837 | ha->mbx_count = MAILBOX_REGISTER_COUNT; |
1793 | req_length = REQUEST_ENTRY_CNT_24XX; | 1838 | req_length = REQUEST_ENTRY_CNT_24XX; |
@@ -1798,6 +1843,23 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1798 | ha->optrom_size = OPTROM_SIZE_25XX; | 1843 | ha->optrom_size = OPTROM_SIZE_25XX; |
1799 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; | 1844 | ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; |
1800 | ha->isp_ops = &qla25xx_isp_ops; | 1845 | ha->isp_ops = &qla25xx_isp_ops; |
1846 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; | ||
1847 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA; | ||
1848 | ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; | ||
1849 | ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; | ||
1850 | } else if (IS_QLA81XX(ha)) { | ||
1851 | ha->mbx_count = MAILBOX_REGISTER_COUNT; | ||
1852 | req_length = REQUEST_ENTRY_CNT_24XX; | ||
1853 | rsp_length = RESPONSE_ENTRY_CNT_2300; | ||
1854 | ha->max_loop_id = SNS_LAST_LOOP_ID_2300; | ||
1855 | ha->init_cb_size = sizeof(struct mid_init_cb_81xx); | ||
1856 | ha->gid_list_info_size = 8; | ||
1857 | ha->optrom_size = OPTROM_SIZE_81XX; | ||
1858 | ha->isp_ops = &qla81xx_isp_ops; | ||
1859 | ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; | ||
1860 | ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; | ||
1861 | ha->nvram_conf_off = ~0; | ||
1862 | ha->nvram_data_off = ~0; | ||
1801 | } | 1863 | } |
1802 | 1864 | ||
1803 | mutex_init(&ha->vport_lock); | 1865 | mutex_init(&ha->vport_lock); |
@@ -2894,13 +2956,14 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
2894 | 2956 | ||
2895 | /* Firmware interface routines. */ | 2957 | /* Firmware interface routines. */ |
2896 | 2958 | ||
2897 | #define FW_BLOBS 6 | 2959 | #define FW_BLOBS 7 |
2898 | #define FW_ISP21XX 0 | 2960 | #define FW_ISP21XX 0 |
2899 | #define FW_ISP22XX 1 | 2961 | #define FW_ISP22XX 1 |
2900 | #define FW_ISP2300 2 | 2962 | #define FW_ISP2300 2 |
2901 | #define FW_ISP2322 3 | 2963 | #define FW_ISP2322 3 |
2902 | #define FW_ISP24XX 4 | 2964 | #define FW_ISP24XX 4 |
2903 | #define FW_ISP25XX 5 | 2965 | #define FW_ISP25XX 5 |
2966 | #define FW_ISP81XX 6 | ||
2904 | 2967 | ||
2905 | #define FW_FILE_ISP21XX "ql2100_fw.bin" | 2968 | #define FW_FILE_ISP21XX "ql2100_fw.bin" |
2906 | #define FW_FILE_ISP22XX "ql2200_fw.bin" | 2969 | #define FW_FILE_ISP22XX "ql2200_fw.bin" |
@@ -2908,6 +2971,7 @@ qla2x00_timer(scsi_qla_host_t *vha) | |||
2908 | #define FW_FILE_ISP2322 "ql2322_fw.bin" | 2971 | #define FW_FILE_ISP2322 "ql2322_fw.bin" |
2909 | #define FW_FILE_ISP24XX "ql2400_fw.bin" | 2972 | #define FW_FILE_ISP24XX "ql2400_fw.bin" |
2910 | #define FW_FILE_ISP25XX "ql2500_fw.bin" | 2973 | #define FW_FILE_ISP25XX "ql2500_fw.bin" |
2974 | #define FW_FILE_ISP81XX "ql8100_fw.bin" | ||
2911 | 2975 | ||
2912 | static DEFINE_MUTEX(qla_fw_lock); | 2976 | static DEFINE_MUTEX(qla_fw_lock); |
2913 | 2977 | ||
@@ -2918,6 +2982,7 @@ static struct fw_blob qla_fw_blobs[FW_BLOBS] = { | |||
2918 | { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, }, | 2982 | { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, }, |
2919 | { .name = FW_FILE_ISP24XX, }, | 2983 | { .name = FW_FILE_ISP24XX, }, |
2920 | { .name = FW_FILE_ISP25XX, }, | 2984 | { .name = FW_FILE_ISP25XX, }, |
2985 | { .name = FW_FILE_ISP81XX, }, | ||
2921 | }; | 2986 | }; |
2922 | 2987 | ||
2923 | struct fw_blob * | 2988 | struct fw_blob * |
@@ -2939,6 +3004,8 @@ qla2x00_request_firmware(scsi_qla_host_t *vha) | |||
2939 | blob = &qla_fw_blobs[FW_ISP24XX]; | 3004 | blob = &qla_fw_blobs[FW_ISP24XX]; |
2940 | } else if (IS_QLA25XX(ha)) { | 3005 | } else if (IS_QLA25XX(ha)) { |
2941 | blob = &qla_fw_blobs[FW_ISP25XX]; | 3006 | blob = &qla_fw_blobs[FW_ISP25XX]; |
3007 | } else if (IS_QLA81XX(ha)) { | ||
3008 | blob = &qla_fw_blobs[FW_ISP81XX]; | ||
2942 | } | 3009 | } |
2943 | 3010 | ||
2944 | mutex_lock(&qla_fw_lock); | 3011 | mutex_lock(&qla_fw_lock); |
@@ -3092,6 +3159,7 @@ static struct pci_device_id qla2xxx_pci_tbl[] = { | |||
3092 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, | 3159 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) }, |
3093 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, | 3160 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) }, |
3094 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, | 3161 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) }, |
3162 | { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) }, | ||
3095 | { 0 }, | 3163 | { 0 }, |
3096 | }; | 3164 | }; |
3097 | MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl); | 3165 | MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl); |
@@ -3180,3 +3248,4 @@ MODULE_FIRMWARE(FW_FILE_ISP2300); | |||
3180 | MODULE_FIRMWARE(FW_FILE_ISP2322); | 3248 | MODULE_FIRMWARE(FW_FILE_ISP2322); |
3181 | MODULE_FIRMWARE(FW_FILE_ISP24XX); | 3249 | MODULE_FIRMWARE(FW_FILE_ISP24XX); |
3182 | MODULE_FIRMWARE(FW_FILE_ISP25XX); | 3250 | MODULE_FIRMWARE(FW_FILE_ISP25XX); |
3251 | MODULE_FIRMWARE(FW_FILE_ISP81XX); | ||