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authorAndrew Vasquez <andrew.vasquez@qlogic.com>2009-06-03 12:55:30 -0400
committerJames Bottomley <James.Bottomley@HansenPartnership.com>2009-06-08 15:47:00 -0400
commit18e7555a38eaadb757353c4b76667e07166ad26c (patch)
tree3b8b0f43076aff5d87c0c8800fb3c4a221af78a0 /drivers/scsi/qla2xxx/qla_mbx.c
parent656e89122a737b60cebc7b8fcb669faf0e7bc905 (diff)
[SCSI] qla2xxx: Synchronize MPI settings after a PE Reset.
Ensure MPS remains in synchronization across all NIC/FCoE functions after a reset. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_mbx.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_mbx.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index f21557845d6f..451ece0760b0 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -3545,3 +3545,66 @@ qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
3545 3545
3546 return rval; 3546 return rval;
3547} 3547}
3548
3549int
3550qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
3551{
3552 int rval;
3553 mbx_cmd_t mc;
3554 mbx_cmd_t *mcp = &mc;
3555
3556 if (!IS_FWI2_CAPABLE(vha->hw))
3557 return QLA_FUNCTION_FAILED;
3558
3559 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
3560
3561 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
3562 mcp->mb[1] = LSW(risc_addr);
3563 mcp->mb[8] = MSW(risc_addr);
3564 mcp->out_mb = MBX_8|MBX_1|MBX_0;
3565 mcp->in_mb = MBX_3|MBX_2|MBX_0;
3566 mcp->tov = 30;
3567 mcp->flags = 0;
3568 rval = qla2x00_mailbox_command(vha, mcp);
3569 if (rval != QLA_SUCCESS) {
3570 DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
3571 vha->host_no, rval, mcp->mb[0]));
3572 } else {
3573 DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
3574 *data = mcp->mb[3] << 16 | mcp->mb[2];
3575 }
3576
3577 return rval;
3578}
3579
3580int
3581qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
3582{
3583 int rval;
3584 mbx_cmd_t mc;
3585 mbx_cmd_t *mcp = &mc;
3586
3587 if (!IS_FWI2_CAPABLE(vha->hw))
3588 return QLA_FUNCTION_FAILED;
3589
3590 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
3591
3592 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
3593 mcp->mb[1] = LSW(risc_addr);
3594 mcp->mb[2] = LSW(data);
3595 mcp->mb[3] = MSW(data);
3596 mcp->mb[8] = MSW(risc_addr);
3597 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
3598 mcp->in_mb = MBX_0;
3599 mcp->tov = 30;
3600 mcp->flags = 0;
3601 rval = qla2x00_mailbox_command(vha, mcp);
3602 if (rval != QLA_SUCCESS) {
3603 DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
3604 vha->host_no, rval, mcp->mb[0]));
3605 } else {
3606 DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
3607 }
3608
3609 return rval;
3610}