diff options
author | Andrew Vasquez <andrew.vasquez@qlogic.com> | 2007-07-19 18:05:56 -0400 |
---|---|---|
committer | James Bottomley <jejb@mulgrave.localdomain> | 2007-07-20 09:59:09 -0400 |
commit | e428924ccdf4644c58e23c2314ab970ff3afc607 (patch) | |
tree | d46654e03de740a6fdb2be998edf592ad7002d63 /drivers/scsi/qla2xxx/qla_mbx.c | |
parent | 80ed71ce1a3369521c693ebf30abb9cfe1dc7e66 (diff) |
[SCSI] qla2xxx: Generalize FW-Interface-2 support.
In preparation for new ISP types.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_mbx.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_mbx.c | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index 2cd0cff25928..321acc2c98c6 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -90,7 +90,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *pvha, mbx_cmd_t *mcp) | |||
90 | spin_lock_irqsave(&ha->hardware_lock, flags); | 90 | spin_lock_irqsave(&ha->hardware_lock, flags); |
91 | 91 | ||
92 | /* Load mailbox registers. */ | 92 | /* Load mailbox registers. */ |
93 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) | 93 | if (IS_FWI2_CAPABLE(ha)) |
94 | optr = (uint16_t __iomem *)®->isp24.mailbox0; | 94 | optr = (uint16_t __iomem *)®->isp24.mailbox0; |
95 | else | 95 | else |
96 | optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0); | 96 | optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0); |
@@ -154,7 +154,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *pvha, mbx_cmd_t *mcp) | |||
154 | 154 | ||
155 | set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); | 155 | set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); |
156 | 156 | ||
157 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) | 157 | if (IS_FWI2_CAPABLE(ha)) |
158 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); | 158 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
159 | else | 159 | else |
160 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | 160 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); |
@@ -175,7 +175,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *pvha, mbx_cmd_t *mcp) | |||
175 | DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__, | 175 | DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__, |
176 | ha->host_no, command)); | 176 | ha->host_no, command)); |
177 | 177 | ||
178 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) | 178 | if (IS_FWI2_CAPABLE(ha)) |
179 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); | 179 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
180 | else | 180 | else |
181 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | 181 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); |
@@ -228,7 +228,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *pvha, mbx_cmd_t *mcp) | |||
228 | uint16_t mb0; | 228 | uint16_t mb0; |
229 | uint32_t ictrl; | 229 | uint32_t ictrl; |
230 | 230 | ||
231 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 231 | if (IS_FWI2_CAPABLE(ha)) { |
232 | mb0 = RD_REG_WORD(®->isp24.mailbox0); | 232 | mb0 = RD_REG_WORD(®->isp24.mailbox0); |
233 | ictrl = RD_REG_DWORD(®->isp24.ictrl); | 233 | ictrl = RD_REG_DWORD(®->isp24.ictrl); |
234 | } else { | 234 | } else { |
@@ -322,7 +322,7 @@ qla2x00_load_ram(scsi_qla_host_t *ha, dma_addr_t req_dma, uint32_t risc_addr, | |||
322 | 322 | ||
323 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); | 323 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); |
324 | 324 | ||
325 | if (MSW(risc_addr) || IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 325 | if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) { |
326 | mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED; | 326 | mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED; |
327 | mcp->mb[8] = MSW(risc_addr); | 327 | mcp->mb[8] = MSW(risc_addr); |
328 | mcp->out_mb = MBX_8|MBX_0; | 328 | mcp->out_mb = MBX_8|MBX_0; |
@@ -336,7 +336,7 @@ qla2x00_load_ram(scsi_qla_host_t *ha, dma_addr_t req_dma, uint32_t risc_addr, | |||
336 | mcp->mb[6] = MSW(MSD(req_dma)); | 336 | mcp->mb[6] = MSW(MSD(req_dma)); |
337 | mcp->mb[7] = LSW(MSD(req_dma)); | 337 | mcp->mb[7] = LSW(MSD(req_dma)); |
338 | mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1; | 338 | mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1; |
339 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 339 | if (IS_FWI2_CAPABLE(ha)) { |
340 | mcp->mb[4] = MSW(risc_code_size); | 340 | mcp->mb[4] = MSW(risc_code_size); |
341 | mcp->mb[5] = LSW(risc_code_size); | 341 | mcp->mb[5] = LSW(risc_code_size); |
342 | mcp->out_mb |= MBX_5|MBX_4; | 342 | mcp->out_mb |= MBX_5|MBX_4; |
@@ -387,7 +387,7 @@ qla2x00_execute_fw(scsi_qla_host_t *ha, uint32_t risc_addr) | |||
387 | mcp->mb[0] = MBC_EXECUTE_FIRMWARE; | 387 | mcp->mb[0] = MBC_EXECUTE_FIRMWARE; |
388 | mcp->out_mb = MBX_0; | 388 | mcp->out_mb = MBX_0; |
389 | mcp->in_mb = MBX_0; | 389 | mcp->in_mb = MBX_0; |
390 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 390 | if (IS_FWI2_CAPABLE(ha)) { |
391 | mcp->mb[1] = MSW(risc_addr); | 391 | mcp->mb[1] = MSW(risc_addr); |
392 | mcp->mb[2] = LSW(risc_addr); | 392 | mcp->mb[2] = LSW(risc_addr); |
393 | mcp->mb[3] = 0; | 393 | mcp->mb[3] = 0; |
@@ -410,7 +410,7 @@ qla2x00_execute_fw(scsi_qla_host_t *ha, uint32_t risc_addr) | |||
410 | DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__, | 410 | DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__, |
411 | ha->host_no, rval, mcp->mb[0])); | 411 | ha->host_no, rval, mcp->mb[0])); |
412 | } else { | 412 | } else { |
413 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 413 | if (IS_FWI2_CAPABLE(ha)) { |
414 | DEBUG11(printk("%s(%ld): done exchanges=%x.\n", | 414 | DEBUG11(printk("%s(%ld): done exchanges=%x.\n", |
415 | __func__, ha->host_no, mcp->mb[1])); | 415 | __func__, ha->host_no, mcp->mb[1])); |
416 | } else { | 416 | } else { |
@@ -551,7 +551,7 @@ qla2x00_set_fw_options(scsi_qla_host_t *ha, uint16_t *fwopts) | |||
551 | mcp->mb[3] = fwopts[3]; | 551 | mcp->mb[3] = fwopts[3]; |
552 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | 552 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; |
553 | mcp->in_mb = MBX_0; | 553 | mcp->in_mb = MBX_0; |
554 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 554 | if (IS_FWI2_CAPABLE(ha)) { |
555 | mcp->in_mb |= MBX_1; | 555 | mcp->in_mb |= MBX_1; |
556 | } else { | 556 | } else { |
557 | mcp->mb[10] = fwopts[10]; | 557 | mcp->mb[10] = fwopts[10]; |
@@ -664,7 +664,7 @@ qla2x00_verify_checksum(scsi_qla_host_t *ha, uint32_t risc_addr) | |||
664 | mcp->mb[0] = MBC_VERIFY_CHECKSUM; | 664 | mcp->mb[0] = MBC_VERIFY_CHECKSUM; |
665 | mcp->out_mb = MBX_0; | 665 | mcp->out_mb = MBX_0; |
666 | mcp->in_mb = MBX_0; | 666 | mcp->in_mb = MBX_0; |
667 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 667 | if (IS_FWI2_CAPABLE(ha)) { |
668 | mcp->mb[1] = MSW(risc_addr); | 668 | mcp->mb[1] = MSW(risc_addr); |
669 | mcp->mb[2] = LSW(risc_addr); | 669 | mcp->mb[2] = LSW(risc_addr); |
670 | mcp->out_mb |= MBX_2|MBX_1; | 670 | mcp->out_mb |= MBX_2|MBX_1; |
@@ -681,8 +681,8 @@ qla2x00_verify_checksum(scsi_qla_host_t *ha, uint32_t risc_addr) | |||
681 | 681 | ||
682 | if (rval != QLA_SUCCESS) { | 682 | if (rval != QLA_SUCCESS) { |
683 | DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__, | 683 | DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__, |
684 | ha->host_no, rval, (IS_QLA24XX(ha) || IS_QLA54XX(ha) ? | 684 | ha->host_no, rval, IS_FWI2_CAPABLE(ha) ? |
685 | (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1]))); | 685 | (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1])); |
686 | } else { | 686 | } else { |
687 | DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no)); | 687 | DEBUG11(printk("%s(%ld): done.\n", __func__, ha->host_no)); |
688 | } | 688 | } |
@@ -739,7 +739,7 @@ qla2x00_issue_iocb(scsi_qla_host_t *ha, void* buffer, dma_addr_t phys_addr, | |||
739 | 739 | ||
740 | /* Mask reserved bits. */ | 740 | /* Mask reserved bits. */ |
741 | sts_entry->entry_status &= | 741 | sts_entry->entry_status &= |
742 | IS_QLA24XX(ha) || IS_QLA54XX(ha) ? RF_MASK_24XX :RF_MASK; | 742 | IS_FWI2_CAPABLE(ha) ? RF_MASK_24XX :RF_MASK; |
743 | } | 743 | } |
744 | 744 | ||
745 | return rval; | 745 | return rval; |
@@ -1085,7 +1085,7 @@ qla2x00_get_port_database(scsi_qla_host_t *ha, fc_port_t *fcport, uint8_t opt) | |||
1085 | memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE)); | 1085 | memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE)); |
1086 | 1086 | ||
1087 | mcp->mb[0] = MBC_GET_PORT_DATABASE; | 1087 | mcp->mb[0] = MBC_GET_PORT_DATABASE; |
1088 | if (opt != 0 && !IS_QLA24XX(ha) && !IS_QLA54XX(ha)) | 1088 | if (opt != 0 && !IS_FWI2_CAPABLE(ha)) |
1089 | mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE; | 1089 | mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE; |
1090 | mcp->mb[2] = MSW(pd_dma); | 1090 | mcp->mb[2] = MSW(pd_dma); |
1091 | mcp->mb[3] = LSW(pd_dma); | 1091 | mcp->mb[3] = LSW(pd_dma); |
@@ -1094,7 +1094,7 @@ qla2x00_get_port_database(scsi_qla_host_t *ha, fc_port_t *fcport, uint8_t opt) | |||
1094 | mcp->mb[9] = ha->vp_idx; | 1094 | mcp->mb[9] = ha->vp_idx; |
1095 | mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; | 1095 | mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; |
1096 | mcp->in_mb = MBX_0; | 1096 | mcp->in_mb = MBX_0; |
1097 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 1097 | if (IS_FWI2_CAPABLE(ha)) { |
1098 | mcp->mb[1] = fcport->loop_id; | 1098 | mcp->mb[1] = fcport->loop_id; |
1099 | mcp->mb[10] = opt; | 1099 | mcp->mb[10] = opt; |
1100 | mcp->out_mb |= MBX_10|MBX_1; | 1100 | mcp->out_mb |= MBX_10|MBX_1; |
@@ -1107,15 +1107,15 @@ qla2x00_get_port_database(scsi_qla_host_t *ha, fc_port_t *fcport, uint8_t opt) | |||
1107 | mcp->mb[1] = fcport->loop_id << 8 | opt; | 1107 | mcp->mb[1] = fcport->loop_id << 8 | opt; |
1108 | mcp->out_mb |= MBX_1; | 1108 | mcp->out_mb |= MBX_1; |
1109 | } | 1109 | } |
1110 | mcp->buf_size = (IS_QLA24XX(ha) || IS_QLA54XX(ha) ? | 1110 | mcp->buf_size = IS_FWI2_CAPABLE(ha) ? |
1111 | PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE); | 1111 | PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE; |
1112 | mcp->flags = MBX_DMA_IN; | 1112 | mcp->flags = MBX_DMA_IN; |
1113 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); | 1113 | mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); |
1114 | rval = qla2x00_mailbox_command(ha, mcp); | 1114 | rval = qla2x00_mailbox_command(ha, mcp); |
1115 | if (rval != QLA_SUCCESS) | 1115 | if (rval != QLA_SUCCESS) |
1116 | goto gpd_error_out; | 1116 | goto gpd_error_out; |
1117 | 1117 | ||
1118 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 1118 | if (IS_FWI2_CAPABLE(ha)) { |
1119 | pd24 = (struct port_database_24xx *) pd; | 1119 | pd24 = (struct port_database_24xx *) pd; |
1120 | 1120 | ||
1121 | /* Check for logged in state. */ | 1121 | /* Check for logged in state. */ |
@@ -1333,7 +1333,7 @@ qla2x00_lip_reset(scsi_qla_host_t *ha) | |||
1333 | 1333 | ||
1334 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); | 1334 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); |
1335 | 1335 | ||
1336 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 1336 | if (IS_FWI2_CAPABLE(ha)) { |
1337 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; | 1337 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; |
1338 | mcp->mb[1] = BIT_6; | 1338 | mcp->mb[1] = BIT_6; |
1339 | mcp->mb[2] = 0; | 1339 | mcp->mb[2] = 0; |
@@ -1637,7 +1637,7 @@ qla2x00_login_local_device(scsi_qla_host_t *ha, fc_port_t *fcport, | |||
1637 | mbx_cmd_t mc; | 1637 | mbx_cmd_t mc; |
1638 | mbx_cmd_t *mcp = &mc; | 1638 | mbx_cmd_t *mcp = &mc; |
1639 | 1639 | ||
1640 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) | 1640 | if (IS_FWI2_CAPABLE(ha)) |
1641 | return qla24xx_login_fabric(ha, fcport->loop_id, | 1641 | return qla24xx_login_fabric(ha, fcport->loop_id, |
1642 | fcport->d_id.b.domain, fcport->d_id.b.area, | 1642 | fcport->d_id.b.domain, fcport->d_id.b.area, |
1643 | fcport->d_id.b.al_pa, mb_ret, opt); | 1643 | fcport->d_id.b.al_pa, mb_ret, opt); |
@@ -1821,7 +1821,7 @@ qla2x00_full_login_lip(scsi_qla_host_t *ha) | |||
1821 | ha->host_no)); | 1821 | ha->host_no)); |
1822 | 1822 | ||
1823 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; | 1823 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; |
1824 | mcp->mb[1] = IS_QLA24XX(ha) || IS_QLA54XX(ha) ? BIT_3: 0; | 1824 | mcp->mb[1] = IS_FWI2_CAPABLE(ha) ? BIT_3: 0; |
1825 | mcp->mb[2] = 0; | 1825 | mcp->mb[2] = 0; |
1826 | mcp->mb[3] = 0; | 1826 | mcp->mb[3] = 0; |
1827 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; | 1827 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; |
@@ -1871,7 +1871,7 @@ qla2x00_get_id_list(scsi_qla_host_t *ha, void *id_list, dma_addr_t id_list_dma, | |||
1871 | 1871 | ||
1872 | mcp->mb[0] = MBC_GET_ID_LIST; | 1872 | mcp->mb[0] = MBC_GET_ID_LIST; |
1873 | mcp->out_mb = MBX_0; | 1873 | mcp->out_mb = MBX_0; |
1874 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 1874 | if (IS_FWI2_CAPABLE(ha)) { |
1875 | mcp->mb[2] = MSW(id_list_dma); | 1875 | mcp->mb[2] = MSW(id_list_dma); |
1876 | mcp->mb[3] = LSW(id_list_dma); | 1876 | mcp->mb[3] = LSW(id_list_dma); |
1877 | mcp->mb[6] = MSW(MSD(id_list_dma)); | 1877 | mcp->mb[6] = MSW(MSD(id_list_dma)); |
@@ -2063,7 +2063,7 @@ qla2x00_get_link_status(scsi_qla_host_t *ha, uint16_t loop_id, | |||
2063 | mcp->mb[7] = LSW(MSD(stat_buf_dma)); | 2063 | mcp->mb[7] = LSW(MSD(stat_buf_dma)); |
2064 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; | 2064 | mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; |
2065 | mcp->in_mb = MBX_0; | 2065 | mcp->in_mb = MBX_0; |
2066 | if (IS_QLA24XX(ha) || IS_QLA54XX(ha)) { | 2066 | if (IS_FWI2_CAPABLE(ha)) { |
2067 | mcp->mb[1] = loop_id; | 2067 | mcp->mb[1] = loop_id; |
2068 | mcp->mb[4] = 0; | 2068 | mcp->mb[4] = 0; |
2069 | mcp->mb[10] = 0; | 2069 | mcp->mb[10] = 0; |
@@ -2334,7 +2334,7 @@ qla2x00_system_error(scsi_qla_host_t *ha) | |||
2334 | mbx_cmd_t mc; | 2334 | mbx_cmd_t mc; |
2335 | mbx_cmd_t *mcp = &mc; | 2335 | mbx_cmd_t *mcp = &mc; |
2336 | 2336 | ||
2337 | if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) | 2337 | if (!IS_FWI2_CAPABLE(ha)) |
2338 | return QLA_FUNCTION_FAILED; | 2338 | return QLA_FUNCTION_FAILED; |
2339 | 2339 | ||
2340 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); | 2340 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); |
@@ -2444,7 +2444,7 @@ qla2x00_stop_firmware(scsi_qla_host_t *ha) | |||
2444 | mbx_cmd_t mc; | 2444 | mbx_cmd_t mc; |
2445 | mbx_cmd_t *mcp = &mc; | 2445 | mbx_cmd_t *mcp = &mc; |
2446 | 2446 | ||
2447 | if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) | 2447 | if (!IS_FWI2_CAPABLE(ha)) |
2448 | return QLA_FUNCTION_FAILED; | 2448 | return QLA_FUNCTION_FAILED; |
2449 | 2449 | ||
2450 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); | 2450 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); |
@@ -2474,7 +2474,7 @@ qla2x00_trace_control(scsi_qla_host_t *ha, uint16_t ctrl, dma_addr_t eft_dma, | |||
2474 | mbx_cmd_t mc; | 2474 | mbx_cmd_t mc; |
2475 | mbx_cmd_t *mcp = &mc; | 2475 | mbx_cmd_t *mcp = &mc; |
2476 | 2476 | ||
2477 | if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) | 2477 | if (!IS_FWI2_CAPABLE(ha)) |
2478 | return QLA_FUNCTION_FAILED; | 2478 | return QLA_FUNCTION_FAILED; |
2479 | 2479 | ||
2480 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); | 2480 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); |
@@ -2514,7 +2514,7 @@ qla2x00_read_sfp(scsi_qla_host_t *ha, dma_addr_t sfp_dma, uint16_t addr, | |||
2514 | mbx_cmd_t mc; | 2514 | mbx_cmd_t mc; |
2515 | mbx_cmd_t *mcp = &mc; | 2515 | mbx_cmd_t *mcp = &mc; |
2516 | 2516 | ||
2517 | if (!IS_QLA24XX(ha) && !IS_QLA54XX(ha)) | 2517 | if (!IS_FWI2_CAPABLE(ha)) |
2518 | return QLA_FUNCTION_FAILED; | 2518 | return QLA_FUNCTION_FAILED; |
2519 | 2519 | ||
2520 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); | 2520 | DEBUG11(printk("%s(%ld): entered.\n", __func__, ha->host_no)); |